| 1 | |
| 2 | %YAML 1.2
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| 3 | ---
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| 4 | $id: http://devicetree.org/schemas/jcore,pit.yaml#
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| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 6 |
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| 7 | title: J-Core Programmable Interval Timer and Clocksource
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| 8 |
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| 9 | maintainers:
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| 10 | - Rich Felker <[email protected]>
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| 11 |
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| 12 | properties:
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| 13 | compatible:
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| 14 | const: jcore,pit
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| 15 |
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| 16 | reg:
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| 17 | description:
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| 18 | Memory region(s) for timer/clocksource registers. For SMP, there should be
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| 19 | one region per cpu, indexed by the sequential, zero-based hardware cpu
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| 20 | number.
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| 21 |
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| 22 | interrupts:
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| 23 | description:
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| 24 | An interrupt to assign for the timer. The actual pit core is integrated
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| 25 | with the aic and allows the timer interrupt assignment to be programmed by
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| 26 | software, but this property is required in order to reserve an interrupt
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| 27 | number that doesn't conflict with other devices.
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| 28 | maxItems: 1
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| 29 |
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| 30 | required:
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| 31 | - compatible
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| 32 | - reg
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| 33 | - interrupts
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| 34 |
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| 35 | additionalProperties: false
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| 36 |
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| 37 | examples:
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| 38 | - |
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| 39 | timer@200 {
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| 40 | compatible = "jcore,pit";
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| 41 | reg = <0x200 0x30 0x500 0x30>;
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| 42 | interrupts = <0x48>;
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| 43 | };
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