| 1 | ========================
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| 2 | The Common Clk Framework
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| 3 | ========================
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| 4 |
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| 5 | :Author: Mike Turquette <[email protected]>
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| 6 |
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| 7 | This document endeavours to explain the common clk framework details,
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| 8 | and how to port a platform over to this framework. It is not yet a
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| 9 | detailed explanation of the clock api in include/linux/clk.h, but
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| 10 | perhaps someday it will include that information.
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| 11 |
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| 12 | Introduction and interface split
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| 13 | ================================
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| 14 |
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| 15 | The common clk framework is an interface to control the clock nodes
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| 16 | available on various devices today. This may come in the form of clock
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| 17 | gating, rate adjustment, muxing or other operations. This framework is
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| 18 | enabled with the CONFIG_COMMON_CLK option.
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| 19 |
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| 20 | The interface itself is divided into two halves, each shielded from the
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| 21 | details of its counterpart. First is the common definition of struct
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| 22 | clk which unifies the framework-level accounting and infrastructure that
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| 23 | has traditionally been duplicated across a variety of platforms. Second
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| 24 | is a common implementation of the clk.h api, defined in
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| 25 | drivers/clk/clk.c. Finally there is struct clk_ops, whose operations
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| 26 | are invoked by the clk api implementation.
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| 27 |
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| 28 | The second half of the interface is comprised of the hardware-specific
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| 29 | callbacks registered with struct clk_ops and the corresponding
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| 30 | hardware-specific structures needed to model a particular clock. For
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| 31 | the remainder of this document any reference to a callback in struct
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| 32 | clk_ops, such as .enable or .set_rate, implies the hardware-specific
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| 33 | implementation of that code. Likewise, references to struct clk_foo
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| 34 | serve as a convenient shorthand for the implementation of the
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| 35 | hardware-specific bits for the hypothetical "foo" hardware.
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| 36 |
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| 37 | Tying the two halves of this interface together is struct clk_hw, which
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| 38 | is defined in struct clk_foo and pointed to within struct clk_core. This
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| 39 | allows for easy navigation between the two discrete halves of the common
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| 40 | clock interface.
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| 41 |
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| 42 | Common data structures and api
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| 43 | ==============================
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| 44 |
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| 45 | .. kernel-doc:: drivers/clk/clk.c
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| 46 | :identifiers: struct clk_core
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| 47 |
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| 48 | The members above make up the core of the clk tree topology. The clk
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| 49 | api itself defines several driver-facing functions which operate on
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| 50 | struct clk. That api is documented in include/linux/clk.h.
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| 51 |
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| 52 | Platforms and devices utilizing the common struct clk_core use the struct
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| 53 | clk_ops pointer in struct clk_core to perform the hardware-specific parts of
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| 54 | the operations defined in clk-provider.h, and can set one or more
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| 55 | framework-level flags documented below.
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| 56 |
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| 57 | .. kernel-doc:: include/linux/clk-provider.h
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| 58 | :identifiers: struct clk_ops
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| 59 |
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| 60 | Core flags
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| 61 | ==========
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| 62 |
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| 63 | .. kernel-doc:: include/linux/clk-provider.h
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| 64 | :doc: clk framework flags
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| 65 |
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| 66 | Hardware clk implementations
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| 67 | ============================
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| 68 |
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| 69 | The strength of the common struct clk_core comes from its .ops and .hw pointers
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| 70 | which abstract the details of struct clk from the hardware-specific bits, and
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| 71 | vice versa. To illustrate consider the simple gateable clk implementation in
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| 72 | drivers/clk/clk-gate.c::
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| 73 |
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| 74 | struct clk_gate {
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| 75 | struct clk_hw hw;
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| 76 | void __iomem *reg;
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| 77 | u8 bit_idx;
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| 78 | ...
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| 79 | };
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| 80 |
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| 81 | struct clk_gate contains struct clk_hw hw as well as hardware-specific
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| 82 | knowledge about which register and bit controls this clk's gating.
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| 83 | Nothing about clock topology or accounting, such as enable_count or
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| 84 | notifier_count, is needed here. That is all handled by the common
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| 85 | framework code and struct clk_core.
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| 86 |
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| 87 | Let's walk through enabling this clk from driver code::
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| 88 |
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| 89 | struct clk *clk;
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| 90 | clk = clk_get(NULL, "my_gateable_clk");
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| 91 |
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| 92 | clk_prepare(clk);
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| 93 | clk_enable(clk);
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| 94 |
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| 95 | The call graph for clk_enable is very simple::
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| 96 |
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| 97 | clk_enable(clk);
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| 98 | clk->ops->enable(clk->hw);
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| 99 | [resolves to...]
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| 100 | clk_gate_enable(hw);
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| 101 | [resolves struct clk gate with to_clk_gate(hw)]
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| 102 | clk_gate_set_bit(gate);
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| 103 |
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| 104 | And the definition of clk_gate_set_bit::
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| 105 |
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| 106 | static void clk_gate_set_bit(struct clk_gate *gate)
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| 107 | {
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| 108 | u32 reg;
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| 109 |
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| 110 | reg = __raw_readl(gate->reg);
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| 111 | reg |= BIT(gate->bit_idx);
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| 112 | writel(reg, gate->reg);
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| 113 | }
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| 114 |
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| 115 | Note that to_clk_gate is defined as::
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| 116 |
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| 117 | #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
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| 118 |
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| 119 | This pattern of abstraction is used for every clock hardware
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| 120 | representation.
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| 121 |
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| 122 | Supporting your own clk hardware
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| 123 | ================================
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| 124 |
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| 125 | When implementing support for a new type of clock it is only necessary to
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| 126 | include the following header::
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| 127 |
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| 128 | #include <linux/clk-provider.h>
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| 129 |
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| 130 | To construct a clk hardware structure for your platform you must define
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| 131 | the following::
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| 132 |
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| 133 | struct clk_foo {
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| 134 | struct clk_hw hw;
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| 135 | ... hardware specific data goes here ...
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| 136 | };
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| 137 |
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| 138 | To take advantage of your data you'll need to support valid operations
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| 139 | for your clk::
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| 140 |
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| 141 | struct clk_ops clk_foo_ops = {
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| 142 | .enable = &clk_foo_enable,
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| 143 | .disable = &clk_foo_disable,
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| 144 | };
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| 145 |
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| 146 | Implement the above functions using container_of::
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| 147 |
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| 148 | #define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)
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| 149 |
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| 150 | int clk_foo_enable(struct clk_hw *hw)
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| 151 | {
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| 152 | struct clk_foo *foo;
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| 153 |
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| 154 | foo = to_clk_foo(hw);
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| 155 |
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| 156 | ... perform magic on foo ...
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| 157 |
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| 158 | return 0;
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| 159 | };
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| 160 |
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| 161 | Below is a matrix detailing which clk_ops are mandatory based upon the
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| 162 | hardware capabilities of that clock. A cell marked as "y" means
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| 163 | mandatory, a cell marked as "n" implies that either including that
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| 164 | callback is invalid or otherwise unnecessary. Empty cells are either
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| 165 | optional or must be evaluated on a case-by-case basis.
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| 166 |
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| 167 | .. table:: clock hardware characteristics
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| 168 |
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| 169 | +----------------+------+-------------+---------------+-------------+------+
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| 170 | | | gate | change rate | single parent | multiplexer | root |
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| 171 | +================+======+=============+===============+=============+======+
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| 172 | |.prepare | | | | | |
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| 173 | +----------------+------+-------------+---------------+-------------+------+
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| 174 | |.unprepare | | | | | |
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| 175 | +----------------+------+-------------+---------------+-------------+------+
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| 176 | +----------------+------+-------------+---------------+-------------+------+
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| 177 | |.enable | y | | | | |
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| 178 | +----------------+------+-------------+---------------+-------------+------+
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| 179 | |.disable | y | | | | |
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| 180 | +----------------+------+-------------+---------------+-------------+------+
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| 181 | |.is_enabled | y | | | | |
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| 182 | +----------------+------+-------------+---------------+-------------+------+
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| 183 | +----------------+------+-------------+---------------+-------------+------+
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| 184 | |.recalc_rate | | y | | | |
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| 185 | +----------------+------+-------------+---------------+-------------+------+
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| 186 | |.determine_rate | | y | | | |
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| 187 | +----------------+------+-------------+---------------+-------------+------+
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| 188 | |.set_rate | | y | | | |
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| 189 | +----------------+------+-------------+---------------+-------------+------+
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| 190 | +----------------+------+-------------+---------------+-------------+------+
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| 191 | |.set_parent | | | n | y | n |
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| 192 | +----------------+------+-------------+---------------+-------------+------+
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| 193 | |.get_parent | | | n | y | n |
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| 194 | +----------------+------+-------------+---------------+-------------+------+
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| 195 | +----------------+------+-------------+---------------+-------------+------+
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| 196 | |.recalc_accuracy| | | | | |
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| 197 | +----------------+------+-------------+---------------+-------------+------+
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| 198 | +----------------+------+-------------+---------------+-------------+------+
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| 199 | |.init | | | | | |
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| 200 | +----------------+------+-------------+---------------+-------------+------+
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| 201 |
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| 202 | Finally, register your clock at run-time with a hardware-specific
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| 203 | registration function. This function simply populates struct clk_foo's
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| 204 | data and then passes the common struct clk parameters to the framework
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| 205 | with a call to::
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| 206 |
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| 207 | clk_register(...)
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| 208 |
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| 209 | See the basic clock types in ``drivers/clk/clk-*.c`` for examples.
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| 210 |
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| 211 | Disabling clock gating of unused clocks
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| 212 | =======================================
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| 213 |
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| 214 | Sometimes during development it can be useful to be able to bypass the
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| 215 | default disabling of unused clocks. For example, if drivers aren't enabling
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| 216 | clocks properly but rely on them being on from the bootloader, bypassing
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| 217 | the disabling means that the driver will remain functional while the issues
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| 218 | are sorted out.
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| 219 |
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| 220 | You can see which clocks have been disabled by booting your kernel with these
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| 221 | parameters::
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| 222 |
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| 223 | tp_printk trace_event=clk:clk_disable
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| 224 |
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| 225 | To bypass this disabling, include "clk_ignore_unused" in the bootargs to the
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| 226 | kernel.
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| 227 |
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| 228 | Locking
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| 229 | =======
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| 230 |
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| 231 | The common clock framework uses two global locks, the prepare lock and the
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| 232 | enable lock.
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| 233 |
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| 234 | The enable lock is a spinlock and is held across calls to the .enable,
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| 235 | .disable operations. Those operations are thus not allowed to sleep,
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| 236 | and calls to the clk_enable(), clk_disable() API functions are allowed in
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| 237 | atomic context.
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| 238 |
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| 239 | For clk_is_enabled() API, it is also designed to be allowed to be used in
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| 240 | atomic context. However, it doesn't really make any sense to hold the enable
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| 241 | lock in core, unless you want to do something else with the information of
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| 242 | the enable state with that lock held. Otherwise, seeing if a clk is enabled is
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| 243 | a one-shot read of the enabled state, which could just as easily change after
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| 244 | the function returns because the lock is released. Thus the user of this API
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| 245 | needs to handle synchronizing the read of the state with whatever they're
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| 246 | using it for to make sure that the enable state doesn't change during that
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| 247 | time.
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| 248 |
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| 249 | The prepare lock is a mutex and is held across calls to all other operations.
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| 250 | All those operations are allowed to sleep, and calls to the corresponding API
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| 251 | functions are not allowed in atomic context.
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| 252 |
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| 253 | This effectively divides operations in two groups from a locking perspective.
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| 254 |
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| 255 | Drivers don't need to manually protect resources shared between the operations
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| 256 | of one group, regardless of whether those resources are shared by multiple
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| 257 | clocks or not. However, access to resources that are shared between operations
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| 258 | of the two groups needs to be protected by the drivers. An example of such a
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| 259 | resource would be a register that controls both the clock rate and the clock
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| 260 | enable/disable state.
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| 261 |
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| 262 | The clock framework is reentrant, in that a driver is allowed to call clock
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| 263 | framework functions from within its implementation of clock operations. This
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| 264 | can for instance cause a .set_rate operation of one clock being called from
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| 265 | within the .set_rate operation of another clock. This case must be considered
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| 266 | in the driver implementations, but the code flow is usually controlled by the
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| 267 | driver in that case.
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| 268 |
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| 269 | Note that locking must also be considered when code outside of the common
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| 270 | clock framework needs to access resources used by the clock operations. This
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| 271 | is considered out of scope of this document.
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