| 1 | ========================
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| 2 | libATA Developer's Guide
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| 3 | ========================
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| 4 |
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| 5 | :Author: Jeff Garzik
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| 6 |
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| 7 | Introduction
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| 8 | ============
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| 9 |
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| 10 | libATA is a library used inside the Linux kernel to support ATA host
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| 11 | controllers and devices. libATA provides an ATA driver API, class
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| 12 | transports for ATA and ATAPI devices, and SCSI<->ATA translation for ATA
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| 13 | devices according to the T10 SAT specification.
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| 14 |
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| 15 | This Guide documents the libATA driver API, library functions, library
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| 16 | internals, and a couple sample ATA low-level drivers.
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| 17 |
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| 18 | libata Driver API
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| 19 | =================
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| 20 |
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| 21 | :c:type:`struct ata_port_operations <ata_port_operations>`
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| 22 | is defined for every low-level libata
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| 23 | hardware driver, and it controls how the low-level driver interfaces
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| 24 | with the ATA and SCSI layers.
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| 25 |
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| 26 | FIS-based drivers will hook into the system with ``->qc_prep()`` and
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| 27 | ``->qc_issue()`` high-level hooks. Hardware which behaves in a manner
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| 28 | similar to PCI IDE hardware may utilize several generic helpers,
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| 29 | defining at a bare minimum the bus I/O addresses of the ATA shadow
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| 30 | register blocks.
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| 31 |
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| 32 | :c:type:`struct ata_port_operations <ata_port_operations>`
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| 33 | ----------------------------------------------------------
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| 34 |
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| 35 | Post-IDENTIFY device configuration
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| 36 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 37 |
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| 38 | ::
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| 39 |
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| 40 | void (*dev_config) (struct ata_port *, struct ata_device *);
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| 41 |
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| 42 |
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| 43 | Called after IDENTIFY [PACKET] DEVICE is issued to each device found.
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| 44 | Typically used to apply device-specific fixups prior to issue of SET
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| 45 | FEATURES - XFER MODE, and prior to operation.
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| 46 |
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| 47 | This entry may be specified as NULL in ata_port_operations.
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| 48 |
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| 49 | Set PIO/DMA mode
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| 50 | ~~~~~~~~~~~~~~~~
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| 51 |
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| 52 | ::
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| 53 |
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| 54 | void (*set_piomode) (struct ata_port *, struct ata_device *);
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| 55 | void (*set_dmamode) (struct ata_port *, struct ata_device *);
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| 56 | void (*post_set_mode) (struct ata_port *);
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| 57 | unsigned int (*mode_filter) (struct ata_port *, struct ata_device *, unsigned int);
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| 58 |
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| 59 |
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| 60 | Hooks called prior to the issue of SET FEATURES - XFER MODE command. The
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| 61 | optional ``->mode_filter()`` hook is called when libata has built a mask of
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| 62 | the possible modes. This is passed to the ``->mode_filter()`` function
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| 63 | which should return a mask of valid modes after filtering those
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| 64 | unsuitable due to hardware limits. It is not valid to use this interface
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| 65 | to add modes.
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| 66 |
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| 67 | ``dev->pio_mode`` and ``dev->dma_mode`` are guaranteed to be valid when
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| 68 | ``->set_piomode()`` and when ``->set_dmamode()`` is called. The timings for
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| 69 | any other drive sharing the cable will also be valid at this point. That
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| 70 | is the library records the decisions for the modes of each drive on a
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| 71 | channel before it attempts to set any of them.
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| 72 |
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| 73 | ``->post_set_mode()`` is called unconditionally, after the SET FEATURES -
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| 74 | XFER MODE command completes successfully.
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| 75 |
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| 76 | ``->set_piomode()`` is always called (if present), but ``->set_dma_mode()``
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| 77 | is only called if DMA is possible.
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| 78 |
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| 79 | Taskfile read/write
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| 80 | ~~~~~~~~~~~~~~~~~~~
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| 81 |
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| 82 | ::
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| 83 |
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| 84 | void (*sff_tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
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| 85 | void (*sff_tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
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| 86 |
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| 87 |
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| 88 | ``->tf_load()`` is called to load the given taskfile into hardware
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| 89 | registers / DMA buffers. ``->tf_read()`` is called to read the hardware
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| 90 | registers / DMA buffers, to obtain the current set of taskfile register
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| 91 | values. Most drivers for taskfile-based hardware (PIO or MMIO) use
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| 92 | :c:func:`ata_sff_tf_load` and :c:func:`ata_sff_tf_read` for these hooks.
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| 93 |
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| 94 | PIO data read/write
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| 95 | ~~~~~~~~~~~~~~~~~~~
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| 96 |
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| 97 | ::
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| 98 |
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| 99 | void (*sff_data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
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| 100 |
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| 101 |
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| 102 | All bmdma-style drivers must implement this hook. This is the low-level
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| 103 | operation that actually copies the data bytes during a PIO data
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| 104 | transfer. Typically the driver will choose one of
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| 105 | :c:func:`ata_sff_data_xfer`, or :c:func:`ata_sff_data_xfer32`.
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| 106 |
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| 107 | ATA command execute
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| 108 | ~~~~~~~~~~~~~~~~~~~
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| 109 |
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| 110 | ::
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| 111 |
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| 112 | void (*sff_exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
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| 113 |
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| 114 |
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| 115 | causes an ATA command, previously loaded with ``->tf_load()``, to be
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| 116 | initiated in hardware. Most drivers for taskfile-based hardware use
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| 117 | :c:func:`ata_sff_exec_command` for this hook.
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| 118 |
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| 119 | Per-cmd ATAPI DMA capabilities filter
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| 120 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 121 |
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| 122 | ::
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| 123 |
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| 124 | int (*check_atapi_dma) (struct ata_queued_cmd *qc);
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| 125 |
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| 126 |
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| 127 | Allow low-level driver to filter ATA PACKET commands, returning a status
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| 128 | indicating whether or not it is OK to use DMA for the supplied PACKET
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| 129 | command.
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| 130 |
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| 131 | This hook may be specified as NULL, in which case libata will assume
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| 132 | that atapi dma can be supported.
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| 133 |
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| 134 | Read specific ATA shadow registers
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| 135 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 136 |
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| 137 | ::
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| 138 |
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| 139 | u8 (*sff_check_status)(struct ata_port *ap);
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| 140 | u8 (*sff_check_altstatus)(struct ata_port *ap);
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| 141 |
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| 142 |
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| 143 | Reads the Status/AltStatus ATA shadow register from hardware. On some
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| 144 | hardware, reading the Status register has the side effect of clearing
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| 145 | the interrupt condition. Most drivers for taskfile-based hardware use
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| 146 | :c:func:`ata_sff_check_status` for this hook.
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| 147 |
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| 148 | Write specific ATA shadow register
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| 149 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 150 |
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| 151 | ::
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| 152 |
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| 153 | void (*sff_set_devctl)(struct ata_port *ap, u8 ctl);
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| 154 |
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| 155 |
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| 156 | Write the device control ATA shadow register to the hardware. Most
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| 157 | drivers don't need to define this.
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| 158 |
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| 159 | Select ATA device on bus
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| 160 | ~~~~~~~~~~~~~~~~~~~~~~~~
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| 161 |
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| 162 | ::
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| 163 |
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| 164 | void (*sff_dev_select)(struct ata_port *ap, unsigned int device);
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| 165 |
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| 166 |
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| 167 | Issues the low-level hardware command(s) that causes one of N hardware
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| 168 | devices to be considered 'selected' (active and available for use) on
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| 169 | the ATA bus. This generally has no meaning on FIS-based devices.
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| 170 |
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| 171 | Most drivers for taskfile-based hardware use :c:func:`ata_sff_dev_select` for
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| 172 | this hook.
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| 173 |
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| 174 | Private tuning method
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| 175 | ~~~~~~~~~~~~~~~~~~~~~
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| 176 |
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| 177 | ::
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| 178 |
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| 179 | void (*set_mode) (struct ata_port *ap);
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| 180 |
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| 181 |
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| 182 | By default libata performs drive and controller tuning in accordance
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| 183 | with the ATA timing rules and also applies blacklists and cable limits.
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| 184 | Some controllers need special handling and have custom tuning rules,
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| 185 | typically raid controllers that use ATA commands but do not actually do
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| 186 | drive timing.
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| 187 |
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| 188 | **Warning**
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| 189 |
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| 190 | This hook should not be used to replace the standard controller
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| 191 | tuning logic when a controller has quirks. Replacing the default
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| 192 | tuning logic in that case would bypass handling for drive and bridge
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| 193 | quirks that may be important to data reliability. If a controller
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| 194 | needs to filter the mode selection it should use the mode_filter
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| 195 | hook instead.
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| 196 |
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| 197 | Control PCI IDE BMDMA engine
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| 198 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 199 |
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| 200 | ::
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| 201 |
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| 202 | void (*bmdma_setup) (struct ata_queued_cmd *qc);
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| 203 | void (*bmdma_start) (struct ata_queued_cmd *qc);
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| 204 | void (*bmdma_stop) (struct ata_port *ap);
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| 205 | u8 (*bmdma_status) (struct ata_port *ap);
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| 206 |
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| 207 |
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| 208 | When setting up an IDE BMDMA transaction, these hooks arm
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| 209 | (``->bmdma_setup``), fire (``->bmdma_start``), and halt (``->bmdma_stop``) the
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| 210 | hardware's DMA engine. ``->bmdma_status`` is used to read the standard PCI
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| 211 | IDE DMA Status register.
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| 212 |
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| 213 | These hooks are typically either no-ops, or simply not implemented, in
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| 214 | FIS-based drivers.
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| 215 |
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| 216 | Most legacy IDE drivers use :c:func:`ata_bmdma_setup` for the
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| 217 | :c:func:`bmdma_setup` hook. :c:func:`ata_bmdma_setup` will write the pointer
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| 218 | to the PRD table to the IDE PRD Table Address register, enable DMA in the DMA
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| 219 | Command register, and call :c:func:`exec_command` to begin the transfer.
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| 220 |
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| 221 | Most legacy IDE drivers use :c:func:`ata_bmdma_start` for the
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| 222 | :c:func:`bmdma_start` hook. :c:func:`ata_bmdma_start` will write the
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| 223 | ATA_DMA_START flag to the DMA Command register.
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| 224 |
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| 225 | Many legacy IDE drivers use :c:func:`ata_bmdma_stop` for the
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| 226 | :c:func:`bmdma_stop` hook. :c:func:`ata_bmdma_stop` clears the ATA_DMA_START
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| 227 | flag in the DMA command register.
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| 228 |
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| 229 | Many legacy IDE drivers use :c:func:`ata_bmdma_status` as the
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| 230 | :c:func:`bmdma_status` hook.
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| 231 |
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| 232 | High-level taskfile hooks
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| 233 | ~~~~~~~~~~~~~~~~~~~~~~~~~
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| 234 |
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| 235 | ::
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| 236 |
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| 237 | enum ata_completion_errors (*qc_prep) (struct ata_queued_cmd *qc);
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| 238 | int (*qc_issue) (struct ata_queued_cmd *qc);
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| 239 |
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| 240 |
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| 241 | Higher-level hooks, these two hooks can potentially supersede several of
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| 242 | the above taskfile/DMA engine hooks. ``->qc_prep`` is called after the
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| 243 | buffers have been DMA-mapped, and is typically used to populate the
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| 244 | hardware's DMA scatter-gather table. Some drivers use the standard
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| 245 | :c:func:`ata_bmdma_qc_prep` and :c:func:`ata_bmdma_dumb_qc_prep` helper
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| 246 | functions, but more advanced drivers roll their own.
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| 247 |
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| 248 | ``->qc_issue`` is used to make a command active, once the hardware and S/G
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| 249 | tables have been prepared. IDE BMDMA drivers use the helper function
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| 250 | :c:func:`ata_sff_qc_issue` for taskfile protocol-based dispatch. More
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| 251 | advanced drivers implement their own ``->qc_issue``.
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| 252 |
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| 253 | :c:func:`ata_sff_qc_issue` calls ``->sff_tf_load()``, ``->bmdma_setup()``, and
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| 254 | ``->bmdma_start()`` as necessary to initiate a transfer.
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| 255 |
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| 256 | Exception and probe handling (EH)
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| 257 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 258 |
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| 259 | ::
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| 260 |
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| 261 | void (*freeze) (struct ata_port *ap);
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| 262 | void (*thaw) (struct ata_port *ap);
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| 263 |
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| 264 |
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| 265 | :c:func:`ata_port_freeze` is called when HSM violations or some other
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| 266 | condition disrupts normal operation of the port. A frozen port is not
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| 267 | allowed to perform any operation until the port is thawed, which usually
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| 268 | follows a successful reset.
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| 269 |
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| 270 | The optional ``->freeze()`` callback can be used for freezing the port
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| 271 | hardware-wise (e.g. mask interrupt and stop DMA engine). If a port
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| 272 | cannot be frozen hardware-wise, the interrupt handler must ack and clear
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| 273 | interrupts unconditionally while the port is frozen.
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| 274 |
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| 275 | The optional ``->thaw()`` callback is called to perform the opposite of
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| 276 | ``->freeze()``: prepare the port for normal operation once again. Unmask
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| 277 | interrupts, start DMA engine, etc.
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| 278 |
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| 279 | ::
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| 280 |
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| 281 | void (*error_handler) (struct ata_port *ap);
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| 282 |
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| 283 |
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| 284 | ``->error_handler()`` is a driver's hook into probe, hotplug, and recovery
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| 285 | and other exceptional conditions. The primary responsibility of an
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| 286 | implementation is to call :c:func:`ata_std_error_handler`.
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| 287 |
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| 288 | :c:func:`ata_std_error_handler` will perform a standard error handling sequence
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| 289 | to resurrect failed devices, detach lost devices and add new devices (if any).
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| 290 | This function will call the various reset operations for a port, as needed.
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| 291 | These operations are as follows.
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| 292 |
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| 293 | * The 'prereset' operation (which may be NULL) is called during an EH reset,
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| 294 | before any other action is taken.
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| 295 |
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| 296 | * The 'postreset' hook (which may be NULL) is called after the EH reset is
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| 297 | performed. Based on existing conditions, severity of the problem, and hardware
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| 298 | capabilities,
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| 299 |
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| 300 | * Either the 'softreset' operation or the 'hardreset' operation will be called
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| 301 | to perform the low-level EH reset. If both operations are defined,
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| 302 | 'hardreset' is preferred and used. If both are not defined, no low-level reset
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| 303 | is performed and EH assumes that an ATA class device is connected through the
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| 304 | link.
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| 305 |
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| 306 | ::
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| 307 |
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| 308 | void (*post_internal_cmd) (struct ata_queued_cmd *qc);
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| 309 |
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| 310 |
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| 311 | Perform any hardware-specific actions necessary to finish processing
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| 312 | after executing a probe-time or EH-time command via
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| 313 | :c:func:`ata_exec_internal`.
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| 314 |
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| 315 | Hardware interrupt handling
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| 316 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~
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| 317 |
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| 318 | ::
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| 319 |
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| 320 | irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
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| 321 | void (*irq_clear) (struct ata_port *);
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| 322 |
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| 323 |
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| 324 | ``->irq_handler`` is the interrupt handling routine registered with the
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| 325 | system, by libata. ``->irq_clear`` is called during probe just before the
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| 326 | interrupt handler is registered, to be sure hardware is quiet.
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| 327 |
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| 328 | The second argument, dev_instance, should be cast to a pointer to
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| 329 | :c:type:`struct ata_host_set <ata_host_set>`.
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| 330 |
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| 331 | Most legacy IDE drivers use :c:func:`ata_sff_interrupt` for the irq_handler
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| 332 | hook, which scans all ports in the host_set, determines which queued
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| 333 | command was active (if any), and calls ata_sff_host_intr(ap,qc).
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| 334 |
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| 335 | Most legacy IDE drivers use :c:func:`ata_sff_irq_clear` for the
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| 336 | :c:func:`irq_clear` hook, which simply clears the interrupt and error flags
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| 337 | in the DMA status register.
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| 338 |
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| 339 | SATA phy read/write
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| 340 | ~~~~~~~~~~~~~~~~~~~
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| 341 |
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| 342 | ::
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| 343 |
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| 344 | int (*scr_read) (struct ata_port *ap, unsigned int sc_reg,
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| 345 | u32 *val);
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| 346 | int (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
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| 347 | u32 val);
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| 348 |
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| 349 |
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| 350 | Read and write standard SATA phy registers.
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| 351 | sc_reg is one of SCR_STATUS, SCR_CONTROL, SCR_ERROR, or SCR_ACTIVE.
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| 352 |
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| 353 | Init and shutdown
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| 354 | ~~~~~~~~~~~~~~~~~
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| 355 |
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| 356 | ::
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| 357 |
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| 358 | int (*port_start) (struct ata_port *ap);
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| 359 | void (*port_stop) (struct ata_port *ap);
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| 360 | void (*host_stop) (struct ata_host_set *host_set);
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| 361 |
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| 362 |
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| 363 | ``->port_start()`` is called just after the data structures for each port
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| 364 | are initialized. Typically this is used to alloc per-port DMA buffers /
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| 365 | tables / rings, enable DMA engines, and similar tasks. Some drivers also
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| 366 | use this entry point as a chance to allocate driver-private memory for
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| 367 | ``ap->private_data``.
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| 368 |
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| 369 | Many drivers use :c:func:`ata_port_start` as this hook or call it from their
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| 370 | own :c:func:`port_start` hooks. :c:func:`ata_port_start` allocates space for
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| 371 | a legacy IDE PRD table and returns.
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| 372 |
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| 373 | ``->port_stop()`` is called after ``->host_stop()``. Its sole function is to
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| 374 | release DMA/memory resources, now that they are no longer actively being
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| 375 | used. Many drivers also free driver-private data from port at this time.
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| 376 |
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| 377 | ``->host_stop()`` is called after all ``->port_stop()`` calls have completed.
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| 378 | The hook must finalize hardware shutdown, release DMA and other
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| 379 | resources, etc. This hook may be specified as NULL, in which case it is
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| 380 | not called.
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| 381 |
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| 382 | Error handling
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| 383 | ==============
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| 384 |
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| 385 | This chapter describes how errors are handled under libata. Readers are
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| 386 | advised to read SCSI EH (Documentation/scsi/scsi_eh.rst) and ATA
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| 387 | exceptions doc first.
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| 388 |
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| 389 | Origins of commands
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| 390 | -------------------
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| 391 |
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| 392 | In libata, a command is represented with
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| 393 | :c:type:`struct ata_queued_cmd <ata_queued_cmd>` or qc.
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| 394 | qc's are preallocated during port initialization and repetitively used
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| 395 | for command executions. Currently only one qc is allocated per port but
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| 396 | yet-to-be-merged NCQ branch allocates one for each tag and maps each qc
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| 397 | to NCQ tag 1-to-1.
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| 398 |
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| 399 | libata commands can originate from two sources - libata itself and SCSI
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| 400 | midlayer. libata internal commands are used for initialization and error
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| 401 | handling. All normal blk requests and commands for SCSI emulation are
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| 402 | passed as SCSI commands through queuecommand callback of SCSI host
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| 403 | template.
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| 404 |
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| 405 | How commands are issued
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| 406 | -----------------------
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| 407 |
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| 408 | Internal commands
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| 409 | Once allocated qc's taskfile is initialized for the command to be
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| 410 | executed. qc currently has two mechanisms to notify completion. One
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| 411 | is via ``qc->complete_fn()`` callback and the other is completion
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| 412 | ``qc->waiting``. ``qc->complete_fn()`` callback is the asynchronous path
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| 413 | used by normal SCSI translated commands and ``qc->waiting`` is the
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| 414 | synchronous (issuer sleeps in process context) path used by internal
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| 415 | commands.
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| 416 |
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| 417 | Once initialization is complete, host_set lock is acquired and the
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| 418 | qc is issued.
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| 419 |
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| 420 | SCSI commands
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| 421 | All libata drivers use :c:func:`ata_scsi_queuecmd` as
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| 422 | ``hostt->queuecommand`` callback. scmds can either be simulated or
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| 423 | translated. No qc is involved in processing a simulated scmd. The
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| 424 | result is computed right away and the scmd is completed.
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| 425 |
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| 426 | ``qc->complete_fn()`` callback is used for completion notification. ATA
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| 427 | commands use :c:func:`ata_scsi_qc_complete` while ATAPI commands use
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| 428 | :c:func:`atapi_qc_complete`. Both functions end up calling ``qc->scsidone``
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| 429 | to notify upper layer when the qc is finished. After translation is
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| 430 | completed, the qc is issued with :c:func:`ata_qc_issue`.
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| 431 |
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| 432 | Note that SCSI midlayer invokes hostt->queuecommand while holding
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| 433 | host_set lock, so all above occur while holding host_set lock.
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| 434 |
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| 435 | How commands are processed
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| 436 | --------------------------
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| 437 |
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| 438 | Depending on which protocol and which controller are used, commands are
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| 439 | processed differently. For the purpose of discussion, a controller which
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| 440 | uses taskfile interface and all standard callbacks is assumed.
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| 441 |
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| 442 | Currently 6 ATA command protocols are used. They can be sorted into the
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| 443 | following four categories according to how they are processed.
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| 444 |
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| 445 | ATA NO DATA or DMA
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| 446 | ATA_PROT_NODATA and ATA_PROT_DMA fall into this category. These
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| 447 | types of commands don't require any software intervention once
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| 448 | issued. Device will raise interrupt on completion.
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| 449 |
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| 450 | ATA PIO
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| 451 | ATA_PROT_PIO is in this category. libata currently implements PIO
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| 452 | with polling. ATA_NIEN bit is set to turn off interrupt and
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| 453 | pio_task on ata_wq performs polling and IO.
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| 454 |
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| 455 | ATAPI NODATA or DMA
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| 456 | ATA_PROT_ATAPI_NODATA and ATA_PROT_ATAPI_DMA are in this
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| 457 | category. packet_task is used to poll BSY bit after issuing PACKET
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| 458 | command. Once BSY is turned off by the device, packet_task
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| 459 | transfers CDB and hands off processing to interrupt handler.
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| 460 |
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| 461 | ATAPI PIO
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| 462 | ATA_PROT_ATAPI is in this category. ATA_NIEN bit is set and, as
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| 463 | in ATAPI NODATA or DMA, packet_task submits cdb. However, after
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| 464 | submitting cdb, further processing (data transfer) is handed off to
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| 465 | pio_task.
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| 466 |
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| 467 | How commands are completed
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| 468 | --------------------------
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| 469 |
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| 470 | Once issued, all qc's are either completed with :c:func:`ata_qc_complete` or
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| 471 | time out. For commands which are handled by interrupts,
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| 472 | :c:func:`ata_host_intr` invokes :c:func:`ata_qc_complete`, and, for PIO tasks,
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| 473 | pio_task invokes :c:func:`ata_qc_complete`. In error cases, packet_task may
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| 474 | also complete commands.
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| 475 |
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| 476 | :c:func:`ata_qc_complete` does the following.
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| 477 |
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| 478 | 1. DMA memory is unmapped.
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| 479 |
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| 480 | 2. ATA_QCFLAG_ACTIVE is cleared from qc->flags.
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| 481 |
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| 482 | 3. :c:expr:`qc->complete_fn` callback is invoked. If the return value of the
|
| 483 | callback is not zero. Completion is short circuited and
|
| 484 | :c:func:`ata_qc_complete` returns.
|
| 485 |
|
| 486 | 4. :c:func:`__ata_qc_complete` is called, which does
|
| 487 |
|
| 488 | 1. ``qc->flags`` is cleared to zero.
|
| 489 |
|
| 490 | 2. ``ap->active_tag`` and ``qc->tag`` are poisoned.
|
| 491 |
|
| 492 | 3. ``qc->waiting`` is cleared & completed (in that order).
|
| 493 |
|
| 494 | 4. qc is deallocated by clearing appropriate bit in ``ap->qactive``.
|
| 495 |
|
| 496 | So, it basically notifies upper layer and deallocates qc. One exception
|
| 497 | is short-circuit path in #3 which is used by :c:func:`atapi_qc_complete`.
|
| 498 |
|
| 499 | For all non-ATAPI commands, whether it fails or not, almost the same
|
| 500 | code path is taken and very little error handling takes place. A qc is
|
| 501 | completed with success status if it succeeded, with failed status
|
| 502 | otherwise.
|
| 503 |
|
| 504 | However, failed ATAPI commands require more handling as REQUEST SENSE is
|
| 505 | needed to acquire sense data. If an ATAPI command fails,
|
| 506 | :c:func:`ata_qc_complete` is invoked with error status, which in turn invokes
|
| 507 | :c:func:`atapi_qc_complete` via ``qc->complete_fn()`` callback.
|
| 508 |
|
| 509 | This makes :c:func:`atapi_qc_complete` set ``scmd->result`` to
|
| 510 | SAM_STAT_CHECK_CONDITION, complete the scmd and return 1. As the
|
| 511 | sense data is empty but ``scmd->result`` is CHECK CONDITION, SCSI midlayer
|
| 512 | will invoke EH for the scmd, and returning 1 makes :c:func:`ata_qc_complete`
|
| 513 | to return without deallocating the qc. This leads us to
|
| 514 | :c:func:`ata_scsi_error` with partially completed qc.
|
| 515 |
|
| 516 | :c:func:`ata_scsi_error`
|
| 517 | ------------------------
|
| 518 |
|
| 519 | :c:func:`ata_scsi_error` is the current ``transportt->eh_strategy_handler()``
|
| 520 | for libata. As discussed above, this will be entered in two cases -
|
| 521 | timeout and ATAPI error completion. This function will check if a qc is active
|
| 522 | and has not failed yet. Such a qc will be marked with AC_ERR_TIMEOUT such that
|
| 523 | EH will know to handle it later. Then it calls low level libata driver's
|
| 524 | :c:func:`error_handler` callback.
|
| 525 |
|
| 526 | When the :c:func:`error_handler` callback is invoked it stops BMDMA and
|
| 527 | completes the qc. Note that as we're currently in EH, we cannot call
|
| 528 | scsi_done. As described in SCSI EH doc, a recovered scmd should be
|
| 529 | either retried with :c:func:`scsi_queue_insert` or finished with
|
| 530 | :c:func:`scsi_finish_command`. Here, we override ``qc->scsidone`` with
|
| 531 | :c:func:`scsi_finish_command` and calls :c:func:`ata_qc_complete`.
|
| 532 |
|
| 533 | If EH is invoked due to a failed ATAPI qc, the qc here is completed but
|
| 534 | not deallocated. The purpose of this half-completion is to use the qc as
|
| 535 | place holder to make EH code reach this place. This is a bit hackish,
|
| 536 | but it works.
|
| 537 |
|
| 538 | Once control reaches here, the qc is deallocated by invoking
|
| 539 | :c:func:`__ata_qc_complete` explicitly. Then, internal qc for REQUEST SENSE
|
| 540 | is issued. Once sense data is acquired, scmd is finished by directly
|
| 541 | invoking :c:func:`scsi_finish_command` on the scmd. Note that as we already
|
| 542 | have completed and deallocated the qc which was associated with the
|
| 543 | scmd, we don't need to/cannot call :c:func:`ata_qc_complete` again.
|
| 544 |
|
| 545 | Problems with the current EH
|
| 546 | ----------------------------
|
| 547 |
|
| 548 | - Error representation is too crude. Currently any and all error
|
| 549 | conditions are represented with ATA STATUS and ERROR registers.
|
| 550 | Errors which aren't ATA device errors are treated as ATA device
|
| 551 | errors by setting ATA_ERR bit. Better error descriptor which can
|
| 552 | properly represent ATA and other errors/exceptions is needed.
|
| 553 |
|
| 554 | - When handling timeouts, no action is taken to make device forget
|
| 555 | about the timed out command and ready for new commands.
|
| 556 |
|
| 557 | - EH handling via :c:func:`ata_scsi_error` is not properly protected from
|
| 558 | usual command processing. On EH entrance, the device is not in
|
| 559 | quiescent state. Timed out commands may succeed or fail any time.
|
| 560 | pio_task and atapi_task may still be running.
|
| 561 |
|
| 562 | - Too weak error recovery. Devices / controllers causing HSM mismatch
|
| 563 | errors and other errors quite often require reset to return to known
|
| 564 | state. Also, advanced error handling is necessary to support features
|
| 565 | like NCQ and hotplug.
|
| 566 |
|
| 567 | - ATA errors are directly handled in the interrupt handler and PIO
|
| 568 | errors in pio_task. This is problematic for advanced error handling
|
| 569 | for the following reasons.
|
| 570 |
|
| 571 | First, advanced error handling often requires context and internal qc
|
| 572 | execution.
|
| 573 |
|
| 574 | Second, even a simple failure (say, CRC error) needs information
|
| 575 | gathering and could trigger complex error handling (say, resetting &
|
| 576 | reconfiguring). Having multiple code paths to gather information,
|
| 577 | enter EH and trigger actions makes life painful.
|
| 578 |
|
| 579 | Third, scattered EH code makes implementing low level drivers
|
| 580 | difficult. Low level drivers override libata callbacks. If EH is
|
| 581 | scattered over several places, each affected callbacks should perform
|
| 582 | its part of error handling. This can be error prone and painful.
|
| 583 |
|
| 584 | libata Library
|
| 585 | ==============
|
| 586 |
|
| 587 | .. kernel-doc:: drivers/ata/libata-core.c
|
| 588 | :export:
|
| 589 |
|
| 590 | libata Core Internals
|
| 591 | =====================
|
| 592 |
|
| 593 | .. kernel-doc:: drivers/ata/libata-core.c
|
| 594 | :internal:
|
| 595 |
|
| 596 | .. kernel-doc:: drivers/ata/libata-eh.c
|
| 597 |
|
| 598 | libata SCSI translation/emulation
|
| 599 | =================================
|
| 600 |
|
| 601 | .. kernel-doc:: drivers/ata/libata-scsi.c
|
| 602 | :export:
|
| 603 |
|
| 604 | .. kernel-doc:: drivers/ata/libata-scsi.c
|
| 605 | :internal:
|
| 606 |
|
| 607 | ATA errors and exceptions
|
| 608 | =========================
|
| 609 |
|
| 610 | This chapter tries to identify what error/exception conditions exist for
|
| 611 | ATA/ATAPI devices and describe how they should be handled in
|
| 612 | implementation-neutral way.
|
| 613 |
|
| 614 | The term 'error' is used to describe conditions where either an explicit
|
| 615 | error condition is reported from device or a command has timed out.
|
| 616 |
|
| 617 | The term 'exception' is either used to describe exceptional conditions
|
| 618 | which are not errors (say, power or hotplug events), or to describe both
|
| 619 | errors and non-error exceptional conditions. Where explicit distinction
|
| 620 | between error and exception is necessary, the term 'non-error exception'
|
| 621 | is used.
|
| 622 |
|
| 623 | Exception categories
|
| 624 | --------------------
|
| 625 |
|
| 626 | Exceptions are described primarily with respect to legacy taskfile + bus
|
| 627 | master IDE interface. If a controller provides other better mechanism
|
| 628 | for error reporting, mapping those into categories described below
|
| 629 | shouldn't be difficult.
|
| 630 |
|
| 631 | In the following sections, two recovery actions - reset and
|
| 632 | reconfiguring transport - are mentioned. These are described further in
|
| 633 | `EH recovery actions <#exrec>`__.
|
| 634 |
|
| 635 | HSM violation
|
| 636 | ~~~~~~~~~~~~~
|
| 637 |
|
| 638 | This error is indicated when STATUS value doesn't match HSM requirement
|
| 639 | during issuing or execution any ATA/ATAPI command.
|
| 640 |
|
| 641 | - ATA_STATUS doesn't contain !BSY && DRDY && !DRQ while trying to
|
| 642 | issue a command.
|
| 643 |
|
| 644 | - !BSY && !DRQ during PIO data transfer.
|
| 645 |
|
| 646 | - DRQ on command completion.
|
| 647 |
|
| 648 | - !BSY && ERR after CDB transfer starts but before the last byte of CDB
|
| 649 | is transferred. ATA/ATAPI standard states that "The device shall not
|
| 650 | terminate the PACKET command with an error before the last byte of
|
| 651 | the command packet has been written" in the error outputs description
|
| 652 | of PACKET command and the state diagram doesn't include such
|
| 653 | transitions.
|
| 654 |
|
| 655 | In these cases, HSM is violated and not much information regarding the
|
| 656 | error can be acquired from STATUS or ERROR register. IOW, this error can
|
| 657 | be anything - driver bug, faulty device, controller and/or cable.
|
| 658 |
|
| 659 | As HSM is violated, reset is necessary to restore known state.
|
| 660 | Reconfiguring transport for lower speed might be helpful too as
|
| 661 | transmission errors sometimes cause this kind of errors.
|
| 662 |
|
| 663 | ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION)
|
| 664 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
| 665 |
|
| 666 | These are errors detected and reported by ATA/ATAPI devices indicating
|
| 667 | device problems. For this type of errors, STATUS and ERROR register
|
| 668 | values are valid and describe error condition. Note that some of ATA bus
|
| 669 | errors are detected by ATA/ATAPI devices and reported using the same
|
| 670 | mechanism as device errors. Those cases are described later in this
|
| 671 | section.
|
| 672 |
|
| 673 | For ATA commands, this type of errors are indicated by !BSY && ERR
|
| 674 | during command execution and on completion.
|
| 675 |
|
| 676 | For ATAPI commands,
|
| 677 |
|
| 678 | - !BSY && ERR && ABRT right after issuing PACKET indicates that PACKET
|
| 679 | command is not supported and falls in this category.
|
| 680 |
|
| 681 | - !BSY && ERR(==CHK) && !ABRT after the last byte of CDB is transferred
|
| 682 | indicates CHECK CONDITION and doesn't fall in this category.
|
| 683 |
|
| 684 | - !BSY && ERR(==CHK) && ABRT after the last byte of CDB is transferred
|
| 685 | \*probably\* indicates CHECK CONDITION and doesn't fall in this
|
| 686 | category.
|
| 687 |
|
| 688 | Of errors detected as above, the following are not ATA/ATAPI device
|
| 689 | errors but ATA bus errors and should be handled according to
|
| 690 | `ATA bus error <#excatATAbusErr>`__.
|
| 691 |
|
| 692 | CRC error during data transfer
|
| 693 | This is indicated by ICRC bit in the ERROR register and means that
|
| 694 | corruption occurred during data transfer. Up to ATA/ATAPI-7, the
|
| 695 | standard specifies that this bit is only applicable to UDMA
|
| 696 | transfers but ATA/ATAPI-8 draft revision 1f says that the bit may be
|
| 697 | applicable to multiword DMA and PIO.
|
| 698 |
|
| 699 | ABRT error during data transfer or on completion
|
| 700 | Up to ATA/ATAPI-7, the standard specifies that ABRT could be set on
|
| 701 | ICRC errors and on cases where a device is not able to complete a
|
| 702 | command. Combined with the fact that MWDMA and PIO transfer errors
|
| 703 | aren't allowed to use ICRC bit up to ATA/ATAPI-7, it seems to imply
|
| 704 | that ABRT bit alone could indicate transfer errors.
|
| 705 |
|
| 706 | However, ATA/ATAPI-8 draft revision 1f removes the part that ICRC
|
| 707 | errors can turn on ABRT. So, this is kind of gray area. Some
|
| 708 | heuristics are needed here.
|
| 709 |
|
| 710 | ATA/ATAPI device errors can be further categorized as follows.
|
| 711 |
|
| 712 | Media errors
|
| 713 | This is indicated by UNC bit in the ERROR register. ATA devices
|
| 714 | reports UNC error only after certain number of retries cannot
|
| 715 | recover the data, so there's nothing much else to do other than
|
| 716 | notifying upper layer.
|
| 717 |
|
| 718 | READ and WRITE commands report CHS or LBA of the first failed sector
|
| 719 | but ATA/ATAPI standard specifies that the amount of transferred data
|
| 720 | on error completion is indeterminate, so we cannot assume that
|
| 721 | sectors preceding the failed sector have been transferred and thus
|
| 722 | cannot complete those sectors successfully as SCSI does.
|
| 723 |
|
| 724 | Media changed / media change requested error
|
| 725 | <<TODO: fill here>>
|
| 726 |
|
| 727 | Address error
|
| 728 | This is indicated by IDNF bit in the ERROR register. Report to upper
|
| 729 | layer.
|
| 730 |
|
| 731 | Other errors
|
| 732 | This can be invalid command or parameter indicated by ABRT ERROR bit
|
| 733 | or some other error condition. Note that ABRT bit can indicate a lot
|
| 734 | of things including ICRC and Address errors. Heuristics needed.
|
| 735 |
|
| 736 | Depending on commands, not all STATUS/ERROR bits are applicable. These
|
| 737 | non-applicable bits are marked with "na" in the output descriptions but
|
| 738 | up to ATA/ATAPI-7 no definition of "na" can be found. However,
|
| 739 | ATA/ATAPI-8 draft revision 1f describes "N/A" as follows.
|
| 740 |
|
| 741 | 3.2.3.3a N/A
|
| 742 | A keyword the indicates a field has no defined value in this
|
| 743 | standard and should not be checked by the host or device. N/A
|
| 744 | fields should be cleared to zero.
|
| 745 |
|
| 746 | So, it seems reasonable to assume that "na" bits are cleared to zero by
|
| 747 | devices and thus need no explicit masking.
|
| 748 |
|
| 749 | ATAPI device CHECK CONDITION
|
| 750 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
| 751 |
|
| 752 | ATAPI device CHECK CONDITION error is indicated by set CHK bit (ERR bit)
|
| 753 | in the STATUS register after the last byte of CDB is transferred for a
|
| 754 | PACKET command. For this kind of errors, sense data should be acquired
|
| 755 | to gather information regarding the errors. REQUEST SENSE packet command
|
| 756 | should be used to acquire sense data.
|
| 757 |
|
| 758 | Once sense data is acquired, this type of errors can be handled
|
| 759 | similarly to other SCSI errors. Note that sense data may indicate ATA
|
| 760 | bus error (e.g. Sense Key 04h HARDWARE ERROR && ASC/ASCQ 47h/00h SCSI
|
| 761 | PARITY ERROR). In such cases, the error should be considered as an ATA
|
| 762 | bus error and handled according to `ATA bus error <#excatATAbusErr>`__.
|
| 763 |
|
| 764 | ATA device error (NCQ)
|
| 765 | ~~~~~~~~~~~~~~~~~~~~~~
|
| 766 |
|
| 767 | NCQ command error is indicated by cleared BSY and set ERR bit during NCQ
|
| 768 | command phase (one or more NCQ commands outstanding). Although STATUS
|
| 769 | and ERROR registers will contain valid values describing the error, READ
|
| 770 | LOG EXT is required to clear the error condition, determine which
|
| 771 | command has failed and acquire more information.
|
| 772 |
|
| 773 | READ LOG EXT Log Page 10h reports which tag has failed and taskfile
|
| 774 | register values describing the error. With this information the failed
|
| 775 | command can be handled as a normal ATA command error as in
|
| 776 | `ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION) <#excatDevErr>`__
|
| 777 | and all other in-flight commands must be retried. Note that this retry
|
| 778 | should not be counted - it's likely that commands retried this way would
|
| 779 | have completed normally if it were not for the failed command.
|
| 780 |
|
| 781 | Note that ATA bus errors can be reported as ATA device NCQ errors. This
|
| 782 | should be handled as described in `ATA bus error <#excatATAbusErr>`__.
|
| 783 |
|
| 784 | If READ LOG EXT Log Page 10h fails or reports NQ, we're thoroughly
|
| 785 | screwed. This condition should be treated according to
|
| 786 | `HSM violation <#excatHSMviolation>`__.
|
| 787 |
|
| 788 | ATA bus error
|
| 789 | ~~~~~~~~~~~~~
|
| 790 |
|
| 791 | ATA bus error means that data corruption occurred during transmission
|
| 792 | over ATA bus (SATA or PATA). This type of errors can be indicated by
|
| 793 |
|
| 794 | - ICRC or ABRT error as described in
|
| 795 | `ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION) <#excatDevErr>`__.
|
| 796 |
|
| 797 | - Controller-specific error completion with error information
|
| 798 | indicating transmission error.
|
| 799 |
|
| 800 | - On some controllers, command timeout. In this case, there may be a
|
| 801 | mechanism to determine that the timeout is due to transmission error.
|
| 802 |
|
| 803 | - Unknown/random errors, timeouts and all sorts of weirdities.
|
| 804 |
|
| 805 | As described above, transmission errors can cause wide variety of
|
| 806 | symptoms ranging from device ICRC error to random device lockup, and,
|
| 807 | for many cases, there is no way to tell if an error condition is due to
|
| 808 | transmission error or not; therefore, it's necessary to employ some kind
|
| 809 | of heuristic when dealing with errors and timeouts. For example,
|
| 810 | encountering repetitive ABRT errors for known supported command is
|
| 811 | likely to indicate ATA bus error.
|
| 812 |
|
| 813 | Once it's determined that ATA bus errors have possibly occurred,
|
| 814 | lowering ATA bus transmission speed is one of actions which may
|
| 815 | alleviate the problem. See `Reconfigure transport <#exrecReconf>`__ for
|
| 816 | more information.
|
| 817 |
|
| 818 | PCI bus error
|
| 819 | ~~~~~~~~~~~~~
|
| 820 |
|
| 821 | Data corruption or other failures during transmission over PCI (or other
|
| 822 | system bus). For standard BMDMA, this is indicated by Error bit in the
|
| 823 | BMDMA Status register. This type of errors must be logged as it
|
| 824 | indicates something is very wrong with the system. Resetting host
|
| 825 | controller is recommended.
|
| 826 |
|
| 827 | Late completion
|
| 828 | ~~~~~~~~~~~~~~~
|
| 829 |
|
| 830 | This occurs when timeout occurs and the timeout handler finds out that
|
| 831 | the timed out command has completed successfully or with error. This is
|
| 832 | usually caused by lost interrupts. This type of errors must be logged.
|
| 833 | Resetting host controller is recommended.
|
| 834 |
|
| 835 | Unknown error (timeout)
|
| 836 | ~~~~~~~~~~~~~~~~~~~~~~~
|
| 837 |
|
| 838 | This is when timeout occurs and the command is still processing or the
|
| 839 | host and device are in unknown state. When this occurs, HSM could be in
|
| 840 | any valid or invalid state. To bring the device to known state and make
|
| 841 | it forget about the timed out command, resetting is necessary. The timed
|
| 842 | out command may be retried.
|
| 843 |
|
| 844 | Timeouts can also be caused by transmission errors. Refer to
|
| 845 | `ATA bus error <#excatATAbusErr>`__ for more details.
|
| 846 |
|
| 847 | Hotplug and power management exceptions
|
| 848 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
| 849 |
|
| 850 | <<TODO: fill here>>
|
| 851 |
|
| 852 | EH recovery actions
|
| 853 | -------------------
|
| 854 |
|
| 855 | This section discusses several important recovery actions.
|
| 856 |
|
| 857 | Clearing error condition
|
| 858 | ~~~~~~~~~~~~~~~~~~~~~~~~
|
| 859 |
|
| 860 | Many controllers require its error registers to be cleared by error
|
| 861 | handler. Different controllers may have different requirements.
|
| 862 |
|
| 863 | For SATA, it's strongly recommended to clear at least SError register
|
| 864 | during error handling.
|
| 865 |
|
| 866 | Reset
|
| 867 | ~~~~~
|
| 868 |
|
| 869 | During EH, resetting is necessary in the following cases.
|
| 870 |
|
| 871 | - HSM is in unknown or invalid state
|
| 872 |
|
| 873 | - HBA is in unknown or invalid state
|
| 874 |
|
| 875 | - EH needs to make HBA/device forget about in-flight commands
|
| 876 |
|
| 877 | - HBA/device behaves weirdly
|
| 878 |
|
| 879 | Resetting during EH might be a good idea regardless of error condition
|
| 880 | to improve EH robustness. Whether to reset both or either one of HBA and
|
| 881 | device depends on situation but the following scheme is recommended.
|
| 882 |
|
| 883 | - When it's known that HBA is in ready state but ATA/ATAPI device is in
|
| 884 | unknown state, reset only device.
|
| 885 |
|
| 886 | - If HBA is in unknown state, reset both HBA and device.
|
| 887 |
|
| 888 | HBA resetting is implementation specific. For a controller complying to
|
| 889 | taskfile/BMDMA PCI IDE, stopping active DMA transaction may be
|
| 890 | sufficient iff BMDMA state is the only HBA context. But even mostly
|
| 891 | taskfile/BMDMA PCI IDE complying controllers may have implementation
|
| 892 | specific requirements and mechanism to reset themselves. This must be
|
| 893 | addressed by specific drivers.
|
| 894 |
|
| 895 | OTOH, ATA/ATAPI standard describes in detail ways to reset ATA/ATAPI
|
| 896 | devices.
|
| 897 |
|
| 898 | PATA hardware reset
|
| 899 | This is hardware initiated device reset signalled with asserted PATA
|
| 900 | RESET- signal. There is no standard way to initiate hardware reset
|
| 901 | from software although some hardware provides registers that allow
|
| 902 | driver to directly tweak the RESET- signal.
|
| 903 |
|
| 904 | Software reset
|
| 905 | This is achieved by turning CONTROL SRST bit on for at least 5us.
|
| 906 | Both PATA and SATA support it but, in case of SATA, this may require
|
| 907 | controller-specific support as the second Register FIS to clear SRST
|
| 908 | should be transmitted while BSY bit is still set. Note that on PATA,
|
| 909 | this resets both master and slave devices on a channel.
|
| 910 |
|
| 911 | EXECUTE DEVICE DIAGNOSTIC command
|
| 912 | Although ATA/ATAPI standard doesn't describe exactly, EDD implies
|
| 913 | some level of resetting, possibly similar level with software reset.
|
| 914 | Host-side EDD protocol can be handled with normal command processing
|
| 915 | and most SATA controllers should be able to handle EDD's just like
|
| 916 | other commands. As in software reset, EDD affects both devices on a
|
| 917 | PATA bus.
|
| 918 |
|
| 919 | Although EDD does reset devices, this doesn't suit error handling as
|
| 920 | EDD cannot be issued while BSY is set and it's unclear how it will
|
| 921 | act when device is in unknown/weird state.
|
| 922 |
|
| 923 | ATAPI DEVICE RESET command
|
| 924 | This is very similar to software reset except that reset can be
|
| 925 | restricted to the selected device without affecting the other device
|
| 926 | sharing the cable.
|
| 927 |
|
| 928 | SATA phy reset
|
| 929 | This is the preferred way of resetting a SATA device. In effect,
|
| 930 | it's identical to PATA hardware reset. Note that this can be done
|
| 931 | with the standard SCR Control register. As such, it's usually easier
|
| 932 | to implement than software reset.
|
| 933 |
|
| 934 | One more thing to consider when resetting devices is that resetting
|
| 935 | clears certain configuration parameters and they need to be set to their
|
| 936 | previous or newly adjusted values after reset.
|
| 937 |
|
| 938 | Parameters affected are.
|
| 939 |
|
| 940 | - CHS set up with INITIALIZE DEVICE PARAMETERS (seldom used)
|
| 941 |
|
| 942 | - Parameters set with SET FEATURES including transfer mode setting
|
| 943 |
|
| 944 | - Block count set with SET MULTIPLE MODE
|
| 945 |
|
| 946 | - Other parameters (SET MAX, MEDIA LOCK...)
|
| 947 |
|
| 948 | ATA/ATAPI standard specifies that some parameters must be maintained
|
| 949 | across hardware or software reset, but doesn't strictly specify all of
|
| 950 | them. Always reconfiguring needed parameters after reset is required for
|
| 951 | robustness. Note that this also applies when resuming from deep sleep
|
| 952 | (power-off).
|
| 953 |
|
| 954 | Also, ATA/ATAPI standard requires that IDENTIFY DEVICE / IDENTIFY PACKET
|
| 955 | DEVICE is issued after any configuration parameter is updated or a
|
| 956 | hardware reset and the result used for further operation. OS driver is
|
| 957 | required to implement revalidation mechanism to support this.
|
| 958 |
|
| 959 | Reconfigure transport
|
| 960 | ~~~~~~~~~~~~~~~~~~~~~
|
| 961 |
|
| 962 | For both PATA and SATA, a lot of corners are cut for cheap connectors,
|
| 963 | cables or controllers and it's quite common to see high transmission
|
| 964 | error rate. This can be mitigated by lowering transmission speed.
|
| 965 |
|
| 966 | The following is a possible scheme Jeff Garzik suggested.
|
| 967 |
|
| 968 | If more than $N (3?) transmission errors happen in 15 minutes,
|
| 969 |
|
| 970 | - if SATA, decrease SATA PHY speed. if speed cannot be decreased,
|
| 971 |
|
| 972 | - decrease UDMA xfer speed. if at UDMA0, switch to PIO4,
|
| 973 |
|
| 974 | - decrease PIO xfer speed. if at PIO3, complain, but continue
|
| 975 |
|
| 976 | ata_piix Internals
|
| 977 | ===================
|
| 978 |
|
| 979 | .. kernel-doc:: drivers/ata/ata_piix.c
|
| 980 | :internal:
|
| 981 |
|
| 982 | sata_sil Internals
|
| 983 | ===================
|
| 984 |
|
| 985 | .. kernel-doc:: drivers/ata/sata_sil.c
|
| 986 | :internal:
|
| 987 |
|
| 988 | Thanks
|
| 989 | ======
|
| 990 |
|
| 991 | The bulk of the ATA knowledge comes thanks to long conversations with
|
| 992 | Andre Hedrick (www.linux-ide.org), and long hours pondering the ATA and
|
| 993 | SCSI specifications.
|
| 994 |
|
| 995 | Thanks to Alan Cox for pointing out similarities between SATA and SCSI,
|
| 996 | and in general for motivation to hack on libata.
|
| 997 |
|
| 998 | libata's device detection method, ata_pio_devchk, and in general all
|
| 999 | the early probing was based on extensive study of Hale Landis's
|
| 1000 | probe/reset code in his ATADRVR driver (www.ata-atapi.com).
|