| 1 |
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| 2 | #ifndef _ALPHA_CMPXCHG_H
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| 3 | #define _ALPHA_CMPXCHG_H
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| 4 |
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| 5 | |
| 6 | * Atomic exchange.
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| 7 | * Since it can be used to implement critical sections
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| 8 | * it must clobber "memory" (also for interrupts in UP).
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| 9 |
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| 10 |
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| 11 | static inline unsigned long
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| 12 | ____xchg_u8(volatile char *m, unsigned long val)
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| 13 | {
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| 14 | unsigned long ret, tmp, addr64;
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| 15 |
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| 16 | __asm__ __volatile__(
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| 17 | " andnot %4,7,%3\n"
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| 18 | " insbl %1,%4,%1\n"
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| 19 | "1: ldq_l %2,0(%3)\n"
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| 20 | " extbl %2,%4,%0\n"
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| 21 | " mskbl %2,%4,%2\n"
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| 22 | " or %1,%2,%2\n"
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| 23 | " stq_c %2,0(%3)\n"
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| 24 | " beq %2,2f\n"
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| 25 | ".subsection 2\n"
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| 26 | "2: br 1b\n"
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| 27 | ".previous"
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| 28 | : "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
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| 29 | : "r" ((long)m), "1" (val) : "memory");
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| 30 |
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| 31 | return ret;
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| 32 | }
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| 33 |
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| 34 | static inline unsigned long
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| 35 | ____xchg_u16(volatile short *m, unsigned long val)
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| 36 | {
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| 37 | unsigned long ret, tmp, addr64;
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| 38 |
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| 39 | __asm__ __volatile__(
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| 40 | " andnot %4,7,%3\n"
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| 41 | " inswl %1,%4,%1\n"
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| 42 | "1: ldq_l %2,0(%3)\n"
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| 43 | " extwl %2,%4,%0\n"
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| 44 | " mskwl %2,%4,%2\n"
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| 45 | " or %1,%2,%2\n"
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| 46 | " stq_c %2,0(%3)\n"
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| 47 | " beq %2,2f\n"
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| 48 | ".subsection 2\n"
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| 49 | "2: br 1b\n"
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| 50 | ".previous"
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| 51 | : "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
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| 52 | : "r" ((long)m), "1" (val) : "memory");
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| 53 |
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| 54 | return ret;
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| 55 | }
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| 56 |
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| 57 | static inline unsigned long
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| 58 | ____xchg_u32(volatile int *m, unsigned long val)
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| 59 | {
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| 60 | unsigned long dummy;
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| 61 |
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| 62 | __asm__ __volatile__(
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| 63 | "1: ldl_l %0,%4\n"
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| 64 | " bis $31,%3,%1\n"
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| 65 | " stl_c %1,%2\n"
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| 66 | " beq %1,2f\n"
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| 67 | ".subsection 2\n"
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| 68 | "2: br 1b\n"
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| 69 | ".previous"
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| 70 | : "=&r" (val), "=&r" (dummy), "=m" (*m)
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| 71 | : "rI" (val), "m" (*m) : "memory");
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| 72 |
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| 73 | return val;
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| 74 | }
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| 75 |
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| 76 | static inline unsigned long
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| 77 | ____xchg_u64(volatile long *m, unsigned long val)
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| 78 | {
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| 79 | unsigned long dummy;
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| 80 |
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| 81 | __asm__ __volatile__(
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| 82 | "1: ldq_l %0,%4\n"
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| 83 | " bis $31,%3,%1\n"
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| 84 | " stq_c %1,%2\n"
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| 85 | " beq %1,2f\n"
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| 86 | ".subsection 2\n"
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| 87 | "2: br 1b\n"
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| 88 | ".previous"
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| 89 | : "=&r" (val), "=&r" (dummy), "=m" (*m)
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| 90 | : "rI" (val), "m" (*m) : "memory");
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| 91 |
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| 92 | return val;
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| 93 | }
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| 94 |
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| 95 | |
| 96 | if something tries to do an invalid xchg().
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| 97 | extern void __xchg_called_with_bad_pointer(void);
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| 98 |
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| 99 | static __always_inline unsigned long
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| 100 | ____xchg(volatile void *ptr, unsigned long x, int size)
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| 101 | {
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| 102 | return
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| 103 | size == 1 ? ____xchg_u8(ptr, x) :
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| 104 | size == 2 ? ____xchg_u16(ptr, x) :
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| 105 | size == 4 ? ____xchg_u32(ptr, x) :
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| 106 | size == 8 ? ____xchg_u64(ptr, x) :
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| 107 | (__xchg_called_with_bad_pointer(), x);
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| 108 | }
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| 109 |
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| 110 | |
| 111 | * Atomic compare and exchange. Compare OLD with MEM, if identical,
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| 112 | * store NEW in MEM. Return the initial value in MEM. Success is
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| 113 | * indicated by comparing RETURN with OLD.
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| 114 |
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| 115 |
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| 116 | static inline unsigned long
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| 117 | ____cmpxchg_u8(volatile char *m, unsigned char old, unsigned char new)
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| 118 | {
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| 119 | unsigned long prev, tmp, cmp, addr64;
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| 120 |
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| 121 | __asm__ __volatile__(
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| 122 | " andnot %5,7,%4\n"
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| 123 | " insbl %1,%5,%1\n"
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| 124 | "1: ldq_l %2,0(%4)\n"
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| 125 | " extbl %2,%5,%0\n"
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| 126 | " cmpeq %0,%6,%3\n"
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| 127 | " beq %3,2f\n"
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| 128 | " mskbl %2,%5,%2\n"
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| 129 | " or %1,%2,%2\n"
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| 130 | " stq_c %2,0(%4)\n"
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| 131 | " beq %2,3f\n"
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| 132 | "2:\n"
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| 133 | ".subsection 2\n"
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| 134 | "3: br 1b\n"
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| 135 | ".previous"
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| 136 | : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
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| 137 | : "r" ((long)m), "Ir" (old), "1" (new) : "memory");
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| 138 |
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| 139 | return prev;
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| 140 | }
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| 141 |
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| 142 | static inline unsigned long
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| 143 | ____cmpxchg_u16(volatile short *m, unsigned short old, unsigned short new)
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| 144 | {
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| 145 | unsigned long prev, tmp, cmp, addr64;
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| 146 |
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| 147 | __asm__ __volatile__(
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| 148 | " andnot %5,7,%4\n"
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| 149 | " inswl %1,%5,%1\n"
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| 150 | "1: ldq_l %2,0(%4)\n"
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| 151 | " extwl %2,%5,%0\n"
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| 152 | " cmpeq %0,%6,%3\n"
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| 153 | " beq %3,2f\n"
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| 154 | " mskwl %2,%5,%2\n"
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| 155 | " or %1,%2,%2\n"
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| 156 | " stq_c %2,0(%4)\n"
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| 157 | " beq %2,3f\n"
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| 158 | "2:\n"
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| 159 | ".subsection 2\n"
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| 160 | "3: br 1b\n"
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| 161 | ".previous"
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| 162 | : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
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| 163 | : "r" ((long)m), "Ir" (old), "1" (new) : "memory");
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| 164 |
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| 165 | return prev;
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| 166 | }
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| 167 |
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| 168 | static inline unsigned long
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| 169 | ____cmpxchg_u32(volatile int *m, int old, int new)
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| 170 | {
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| 171 | unsigned long prev, cmp;
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| 172 |
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| 173 | __asm__ __volatile__(
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| 174 | "1: ldl_l %0,%5\n"
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| 175 | " cmpeq %0,%3,%1\n"
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| 176 | " beq %1,2f\n"
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| 177 | " mov %4,%1\n"
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| 178 | " stl_c %1,%2\n"
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| 179 | " beq %1,3f\n"
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| 180 | "2:\n"
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| 181 | ".subsection 2\n"
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| 182 | "3: br 1b\n"
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| 183 | ".previous"
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| 184 | : "=&r"(prev), "=&r"(cmp), "=m"(*m)
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| 185 | : "r"((long) old), "r"(new), "m"(*m) : "memory");
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| 186 |
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| 187 | return prev;
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| 188 | }
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| 189 |
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| 190 | static inline unsigned long
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| 191 | ____cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
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| 192 | {
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| 193 | unsigned long prev, cmp;
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| 194 |
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| 195 | __asm__ __volatile__(
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| 196 | "1: ldq_l %0,%5\n"
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| 197 | " cmpeq %0,%3,%1\n"
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| 198 | " beq %1,2f\n"
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| 199 | " mov %4,%1\n"
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| 200 | " stq_c %1,%2\n"
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| 201 | " beq %1,3f\n"
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| 202 | "2:\n"
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| 203 | ".subsection 2\n"
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| 204 | "3: br 1b\n"
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| 205 | ".previous"
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| 206 | : "=&r"(prev), "=&r"(cmp), "=m"(*m)
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| 207 | : "r"((long) old), "r"(new), "m"(*m) : "memory");
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| 208 |
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| 209 | return prev;
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| 210 | }
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| 211 |
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| 212 | |
| 213 | if something tries to do an invalid cmpxchg().
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| 214 | extern void __cmpxchg_called_with_bad_pointer(void);
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| 215 |
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| 216 | static __always_inline unsigned long
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| 217 | ____cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
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| 218 | int size)
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| 219 | {
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| 220 | return
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| 221 | size == 1 ? ____cmpxchg_u8(ptr, old, new) :
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| 222 | size == 2 ? ____cmpxchg_u16(ptr, old, new) :
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| 223 | size == 4 ? ____cmpxchg_u32(ptr, old, new) :
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| 224 | size == 8 ? ____cmpxchg_u64(ptr, old, new) :
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| 225 | (__cmpxchg_called_with_bad_pointer(), old);
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| 226 | }
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| 227 |
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| 228 | #define xchg_local(ptr, x) \
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| 229 | ({ \
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| 230 | __typeof__(*(ptr)) _x_ = (x); \
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| 231 | (__typeof__(*(ptr))) ____xchg((ptr), (unsigned long)_x_, \
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| 232 | sizeof(*(ptr))); \
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| 233 | })
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| 234 |
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| 235 | #define arch_cmpxchg_local(ptr, o, n) \
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| 236 | ({ \
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| 237 | __typeof__(*(ptr)) _o_ = (o); \
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| 238 | __typeof__(*(ptr)) _n_ = (n); \
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| 239 | (__typeof__(*(ptr))) ____cmpxchg((ptr), (unsigned long)_o_, \
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| 240 | (unsigned long)_n_, \
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| 241 | sizeof(*(ptr))); \
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| 242 | })
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| 243 |
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| 244 | #define arch_cmpxchg64_local(ptr, o, n) \
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| 245 | ({ \
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| 246 | BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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| 247 | cmpxchg_local((ptr), (o), (n)); \
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| 248 | })
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| 249 |
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| 250 | |
| 251 | * The leading and the trailing memory barriers guarantee that these
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| 252 | * operations are fully ordered.
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| 253 |
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| 254 | #define arch_xchg(ptr, x) \
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| 255 | ({ \
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| 256 | __typeof__(*(ptr)) __ret; \
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| 257 | __typeof__(*(ptr)) _x_ = (x); \
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| 258 | smp_mb(); \
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| 259 | __ret = (__typeof__(*(ptr))) \
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| 260 | ____xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
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| 261 | smp_mb(); \
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| 262 | __ret; \
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| 263 | })
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| 264 |
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| 265 | #define arch_cmpxchg(ptr, o, n) \
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| 266 | ({ \
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| 267 | __typeof__(*(ptr)) __ret; \
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| 268 | __typeof__(*(ptr)) _o_ = (o); \
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| 269 | __typeof__(*(ptr)) _n_ = (n); \
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| 270 | smp_mb(); \
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| 271 | __ret = (__typeof__(*(ptr))) ____cmpxchg((ptr), \
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| 272 | (unsigned long)_o_, (unsigned long)_n_, sizeof(*(ptr)));\
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| 273 | smp_mb(); \
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| 274 | __ret; \
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| 275 | })
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| 276 |
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| 277 | #define arch_cmpxchg64(ptr, o, n) \
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| 278 | ({ \
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| 279 | BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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| 280 | arch_cmpxchg((ptr), (o), (n)); \
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| 281 | })
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| 282 |
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| 283 | #endif
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