| 1 | /* SPDX-License-Identifier: GPL-2.0 */
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| 2 | /*
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| 3 | * linux/arch/alpha/lib/memset.S
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| 4 | *
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| 5 | * This is an efficient (and small) implementation of the C library "memset()"
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| 6 | * function for the alpha.
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| 7 | *
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| 8 | * (C) Copyright 1996 Linus Torvalds
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| 9 | *
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| 10 | * This routine is "moral-ware": you are free to use it any way you wish, and
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| 11 | * the only obligation I put on you is a moral one: if you make any improvements
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| 12 | * to the routine, please send me your improvements for me to use similarly.
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| 13 | *
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| 14 | * The scheduling comments are according to the EV5 documentation (and done by
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| 15 | * hand, so they might well be incorrect, please do tell me about it..)
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| 16 | */
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| 17 | |
| 18 | .set noat
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| 19 | .set noreorder
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| 20 | .text
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| 21 | .globl memset
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| 22 | .globl __memset
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| 23 | .globl ___memset
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| 24 | .globl __memset16
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| 25 | .globl __constant_c_memset
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| 26 |
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| 27 | .ent ___memset
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| 28 | .align 5
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| 29 | ___memset:
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| 30 | .frame $30,0,$26,0
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| 31 | .prologue 0
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| 32 |
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| 33 | and $17,255,$1 /* E1 */
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| 34 | insbl $17,1,$17 /* .. E0 */
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| 35 | bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
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| 36 | sll $17,16,$1 /* E1 (p-c latency, next cycle) */
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| 37 |
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| 38 | bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
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| 39 | sll $17,32,$1 /* E1 (p-c latency, next cycle) */
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| 40 | bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
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| 41 | ldq_u $31,0($30) /* .. E1 */
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| 42 |
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| 43 | .align 5
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| 44 | __constant_c_memset:
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| 45 | addq $18,$16,$6 /* E0 */
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| 46 | bis $16,$16,$0 /* .. E1 */
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| 47 | xor $16,$6,$1 /* E0 */
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| 48 | ble $18,end /* .. E1 */
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| 49 |
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| 50 | bic $1,7,$1 /* E0 */
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| 51 | beq $1,within_one_quad /* .. E1 (note EV5 zero-latency forwarding) */
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| 52 | and $16,7,$3 /* E0 */
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| 53 | beq $3,aligned /* .. E1 (note EV5 zero-latency forwarding) */
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| 54 |
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| 55 | ldq_u $4,0($16) /* E0 */
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| 56 | bis $16,$16,$5 /* .. E1 */
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| 57 | insql $17,$16,$2 /* E0 */
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| 58 | subq $3,8,$3 /* .. E1 */
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| 59 |
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| 60 | addq $18,$3,$18 /* E0 $18 is new count ($3 is negative) */
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| 61 | mskql $4,$16,$4 /* .. E1 (and possible load stall) */
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| 62 | subq $16,$3,$16 /* E0 $16 is new aligned destination */
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| 63 | bis $2,$4,$1 /* .. E1 */
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| 64 |
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| 65 | bis $31,$31,$31 /* E0 */
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| 66 | ldq_u $31,0($30) /* .. E1 */
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| 67 | stq_u $1,0($5) /* E0 */
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| 68 | bis $31,$31,$31 /* .. E1 */
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| 69 |
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| 70 | .align 4
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| 71 | aligned:
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| 72 | sra $18,3,$3 /* E0 */
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| 73 | and $18,7,$18 /* .. E1 */
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| 74 | bis $16,$16,$5 /* E0 */
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| 75 | beq $3,no_quad /* .. E1 */
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| 76 |
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| 77 | .align 3
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| 78 | loop:
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| 79 | stq $17,0($5) /* E0 */
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| 80 | subq $3,1,$3 /* .. E1 */
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| 81 | addq $5,8,$5 /* E0 */
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| 82 | bne $3,loop /* .. E1 */
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| 83 |
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| 84 | no_quad:
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| 85 | bis $31,$31,$31 /* E0 */
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| 86 | beq $18,end /* .. E1 */
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| 87 | ldq $7,0($5) /* E0 */
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| 88 | mskqh $7,$6,$2 /* .. E1 (and load stall) */
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| 89 |
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| 90 | insqh $17,$6,$4 /* E0 */
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| 91 | bis $2,$4,$1 /* .. E1 */
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| 92 | stq $1,0($5) /* E0 */
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| 93 | ret $31,($26),1 /* .. E1 */
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| 94 |
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| 95 | .align 3
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| 96 | within_one_quad:
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| 97 | ldq_u $1,0($16) /* E0 */
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| 98 | insql $17,$16,$2 /* E1 */
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| 99 | mskql $1,$16,$4 /* E0 (after load stall) */
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| 100 | bis $2,$4,$2 /* E0 */
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| 101 |
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| 102 | mskql $2,$6,$4 /* E0 */
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| 103 | mskqh $1,$6,$2 /* .. E1 */
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| 104 | bis $2,$4,$1 /* E0 */
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| 105 | stq_u $1,0($16) /* E0 */
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| 106 |
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| 107 | end:
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| 108 | ret $31,($26),1 /* E1 */
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| 109 | .end ___memset
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| 110 | EXPORT_SYMBOL(___memset)
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| 111 | EXPORT_SYMBOL(__constant_c_memset)
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| 112 |
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| 113 | .align 5
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| 114 | .ent __memset16
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| 115 | __memset16:
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| 116 | .prologue 0
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| 117 |
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| 118 | inswl $17,0,$1 /* E0 */
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| 119 | inswl $17,2,$2 /* E0 */
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| 120 | inswl $17,4,$3 /* E0 */
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| 121 | or $1,$2,$1 /* .. E1 */
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| 122 | inswl $17,6,$4 /* E0 */
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| 123 | or $1,$3,$1 /* .. E1 */
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| 124 | or $1,$4,$17 /* E0 */
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| 125 | br __constant_c_memset /* .. E1 */
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| 126 |
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| 127 | .end __memset16
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| 128 | EXPORT_SYMBOL(__memset16)
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| 129 |
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| 130 | memset = ___memset
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| 131 | __memset = ___memset
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| 132 | EXPORT_SYMBOL(memset)
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| 133 | EXPORT_SYMBOL(__memset)
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