| 1 | |
| 2 | |
| 3 | * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
| 4 | *
|
| 5 | * RajeshwarR: Dec 11, 2007
|
| 6 | * -- Added support for Inter Processor Interrupts
|
| 7 | *
|
| 8 | * Vineetg: Nov 1st, 2007
|
| 9 | * -- Initial Write (Borrowed heavily from ARM)
|
| 10 |
|
| 11 |
|
| 12 | #include <linux/spinlock.h>
|
| 13 | #include <linux/sched/mm.h>
|
| 14 | #include <linux/interrupt.h>
|
| 15 | #include <linux/mm.h>
|
| 16 | #include <linux/cpu.h>
|
| 17 | #include <linux/irq.h>
|
| 18 | #include <linux/atomic.h>
|
| 19 | #include <linux/cpumask.h>
|
| 20 | #include <linux/reboot.h>
|
| 21 | #include <linux/irqdomain.h>
|
| 22 | #include <linux/export.h>
|
| 23 | #include <linux/of_fdt.h>
|
| 24 | #include <linux/string.h>
|
| 25 |
|
| 26 | #include <asm/mach_desc.h>
|
| 27 | #include <asm/setup.h>
|
| 28 | #include <asm/smp.h>
|
| 29 | #include <asm/processor.h>
|
| 30 |
|
| 31 | #ifndef CONFIG_ARC_HAS_LLSC
|
| 32 | arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
|
| 33 |
|
| 34 | EXPORT_SYMBOL_GPL(smp_atomic_ops_lock);
|
| 35 | #endif
|
| 36 |
|
| 37 | struct plat_smp_ops __weak plat_smp_ops;
|
| 38 |
|
| 39 |
|
| 40 | struct task_struct *secondary_idle_tsk;
|
| 41 |
|
| 42 | static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask)
|
| 43 | {
|
| 44 | unsigned long dt_root = of_get_flat_dt_root();
|
| 45 | const char *buf;
|
| 46 | int len;
|
| 47 |
|
| 48 | buf = of_get_flat_dt_prop(dt_root, name, &len);
|
| 49 | if (!buf || !memchr(buf, '\0', len))
|
| 50 | return -EINVAL;
|
| 51 |
|
| 52 | if (cpulist_parse(buf, cpumask))
|
| 53 | return -EINVAL;
|
| 54 |
|
| 55 | return 0;
|
| 56 | }
|
| 57 |
|
| 58 | |
| 59 | * Read from DeviceTree and setup cpu possible mask. If there is no
|
| 60 | * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
|
| 61 |
|
| 62 | static void __init arc_init_cpu_possible(void)
|
| 63 | {
|
| 64 | struct cpumask cpumask;
|
| 65 |
|
| 66 | if (arc_get_cpu_map("possible-cpus", &cpumask)) {
|
| 67 | pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n",
|
| 68 | NR_CPUS);
|
| 69 |
|
| 70 | cpumask_setall(&cpumask);
|
| 71 | }
|
| 72 |
|
| 73 | if (!cpumask_test_cpu(0, &cpumask))
|
| 74 | panic("Master cpu (cpu[0]) is missed in cpu possible mask!");
|
| 75 |
|
| 76 | init_cpu_possible(&cpumask);
|
| 77 | }
|
| 78 |
|
| 79 | |
| 80 | * Called from setup_arch() before calling setup_processor()
|
| 81 | *
|
| 82 | * - Initialise the CPU possible map early - this describes the CPUs
|
| 83 | * which may be present or become present in the system.
|
| 84 | * - Call early smp init hook. This can initialize a specific multi-core
|
| 85 | * IP which is say common to several platforms (hence not part of
|
| 86 | * platform specific int_early() hook)
|
| 87 |
|
| 88 | void __init smp_init_cpus(void)
|
| 89 | {
|
| 90 | arc_init_cpu_possible();
|
| 91 |
|
| 92 | if (plat_smp_ops.init_early_smp)
|
| 93 | plat_smp_ops.init_early_smp();
|
| 94 | }
|
| 95 |
|
| 96 |
|
| 97 | void __init smp_prepare_cpus(unsigned int max_cpus)
|
| 98 | {
|
| 99 | |
| 100 | * if platform didn't set the present map already, do it now
|
| 101 | * boot cpu is set to present already by init/main.c
|
| 102 |
|
| 103 | if (num_present_cpus() <= 1)
|
| 104 | init_cpu_present(cpu_possible_mask);
|
| 105 | }
|
| 106 |
|
| 107 | void __init smp_cpus_done(unsigned int max_cpus)
|
| 108 | {
|
| 109 |
|
| 110 | }
|
| 111 |
|
| 112 | |
| 113 | * Default smp boot helper for Run-on-reset case where all cores start off
|
| 114 | * together. Non-masters need to wait for Master to start running.
|
| 115 | * This is implemented using a flag in memory, which Non-masters spin-wait on.
|
| 116 | * Master sets it to cpu-id of core to "ungate" it.
|
| 117 |
|
| 118 | static volatile int wake_flag;
|
| 119 |
|
| 120 | #ifdef CONFIG_ISA_ARCOMPACT
|
| 121 |
|
| 122 | #define __boot_read(f) f
|
| 123 | #define __boot_write(f, v) f = v
|
| 124 |
|
| 125 | #else
|
| 126 |
|
| 127 | #define __boot_read(f) arc_read_uncached_32(&f)
|
| 128 | #define __boot_write(f, v) arc_write_uncached_32(&f, v)
|
| 129 |
|
| 130 | #endif
|
| 131 |
|
| 132 | static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
|
| 133 | {
|
| 134 | BUG_ON(cpu == 0);
|
| 135 |
|
| 136 | __boot_write(wake_flag, cpu);
|
| 137 | }
|
| 138 |
|
| 139 | void arc_platform_smp_wait_to_boot(int cpu)
|
| 140 | {
|
| 141 |
|
| 142 | if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
|
| 143 | return;
|
| 144 |
|
| 145 | while (__boot_read(wake_flag) != cpu)
|
| 146 | ;
|
| 147 |
|
| 148 | __boot_write(wake_flag, 0);
|
| 149 | }
|
| 150 |
|
| 151 | const char *arc_platform_smp_cpuinfo(void)
|
| 152 | {
|
| 153 | return plat_smp_ops.info ? : "";
|
| 154 | }
|
| 155 |
|
| 156 | |
| 157 | * The very first "C" code executed by secondary
|
| 158 | * Called from asm stub in head.S
|
| 159 | * "current"/R25 already setup by low level boot code
|
| 160 |
|
| 161 | void start_kernel_secondary(void)
|
| 162 | {
|
| 163 | struct mm_struct *mm = &init_mm;
|
| 164 | unsigned int cpu = smp_processor_id();
|
| 165 |
|
| 166 |
|
| 167 | setup_processor();
|
| 168 |
|
| 169 | mmget(mm);
|
| 170 | mmgrab(mm);
|
| 171 | current->active_mm = mm;
|
| 172 | cpumask_set_cpu(cpu, mm_cpumask(mm));
|
| 173 |
|
| 174 |
|
| 175 | if (plat_smp_ops.init_per_cpu)
|
| 176 | plat_smp_ops.init_per_cpu(cpu);
|
| 177 |
|
| 178 | if (machine_desc->init_per_cpu)
|
| 179 | machine_desc->init_per_cpu(cpu);
|
| 180 |
|
| 181 | notify_cpu_starting(cpu);
|
| 182 | set_cpu_online(cpu, true);
|
| 183 |
|
| 184 | pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
|
| 185 |
|
| 186 | local_irq_enable();
|
| 187 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
|
| 188 | }
|
| 189 |
|
| 190 | |
| 191 | * Called from kernel_init( ) -> smp_init( ) - for each CPU
|
| 192 | *
|
| 193 | * At this point, Secondary Processor is "HALT"ed:
|
| 194 | * -It booted, but was halted in head.S
|
| 195 | * -It was configured to halt-on-reset
|
| 196 | * So need to wake it up.
|
| 197 | *
|
| 198 | * Essential requirements being where to run from (PC) and stack (SP)
|
| 199 |
|
| 200 | int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
| 201 | {
|
| 202 | unsigned long wait_till;
|
| 203 |
|
| 204 | secondary_idle_tsk = idle;
|
| 205 |
|
| 206 | pr_info("Idle Task [%d] %p", cpu, idle);
|
| 207 | pr_info("Trying to bring up CPU%u ...\n", cpu);
|
| 208 |
|
| 209 | if (plat_smp_ops.cpu_kick)
|
| 210 | plat_smp_ops.cpu_kick(cpu,
|
| 211 | (unsigned long)first_lines_of_secondary);
|
| 212 | else
|
| 213 | arc_default_smp_cpu_kick(cpu, (unsigned long)NULL);
|
| 214 |
|
| 215 |
|
| 216 | wait_till = jiffies + HZ;
|
| 217 | while (time_before(jiffies, wait_till)) {
|
| 218 | if (cpu_online(cpu))
|
| 219 | break;
|
| 220 | }
|
| 221 |
|
| 222 | if (!cpu_online(cpu)) {
|
| 223 | pr_info("Timeout: CPU%u FAILED to come up !!!\n", cpu);
|
| 224 | return -1;
|
| 225 | }
|
| 226 |
|
| 227 | secondary_idle_tsk = NULL;
|
| 228 |
|
| 229 | return 0;
|
| 230 | }
|
| 231 |
|
| 232 |
|
| 233 |
|
| 234 |
|
| 235 |
|
| 236 | enum ipi_msg_type {
|
| 237 | IPI_EMPTY = 0,
|
| 238 | IPI_RESCHEDULE = 1,
|
| 239 | IPI_CALL_FUNC,
|
| 240 | IPI_CPU_STOP,
|
| 241 | };
|
| 242 |
|
| 243 | |
| 244 | * In arches with IRQ for each msg type (above), receiver can use IRQ-id to
|
| 245 | * figure out what msg was sent. For those which don't (ARC has dedicated IPI
|
| 246 | * IRQ), the msg-type needs to be conveyed via per-cpu data
|
| 247 |
|
| 248 |
|
| 249 | static DEFINE_PER_CPU(unsigned long, ipi_data);
|
| 250 |
|
| 251 | static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
|
| 252 | {
|
| 253 | unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
|
| 254 | unsigned long old, new;
|
| 255 | unsigned long flags;
|
| 256 |
|
| 257 | pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
|
| 258 |
|
| 259 | local_irq_save(flags);
|
| 260 |
|
| 261 | |
| 262 | * Atomically write new msg bit (in case others are writing too),
|
| 263 | * and read back old value
|
| 264 |
|
| 265 | do {
|
| 266 | new = old = *ipi_data_ptr;
|
| 267 | new |= 1U << msg;
|
| 268 | } while (cmpxchg(ipi_data_ptr, old, new) != old);
|
| 269 |
|
| 270 | |
| 271 | * Call the platform specific IPI kick function, but avoid if possible:
|
| 272 | * Only do so if there's no pending msg from other concurrent sender(s).
|
| 273 | * Otherwise, receiver will see this msg as well when it takes the
|
| 274 | * IPI corresponding to that msg. This is true, even if it is already in
|
| 275 | * IPI handler, because !@old means it has not yet dequeued the msg(s)
|
| 276 | * so @new msg can be a free-loader
|
| 277 |
|
| 278 | if (plat_smp_ops.ipi_send && !old)
|
| 279 | plat_smp_ops.ipi_send(cpu);
|
| 280 |
|
| 281 | local_irq_restore(flags);
|
| 282 | }
|
| 283 |
|
| 284 | static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
|
| 285 | {
|
| 286 | unsigned int cpu;
|
| 287 |
|
| 288 | for_each_cpu(cpu, callmap)
|
| 289 | ipi_send_msg_one(cpu, msg);
|
| 290 | }
|
| 291 |
|
| 292 | void arch_smp_send_reschedule(int cpu)
|
| 293 | {
|
| 294 | ipi_send_msg_one(cpu, IPI_RESCHEDULE);
|
| 295 | }
|
| 296 |
|
| 297 | void smp_send_stop(void)
|
| 298 | {
|
| 299 | struct cpumask targets;
|
| 300 | cpumask_copy(&targets, cpu_online_mask);
|
| 301 | cpumask_clear_cpu(smp_processor_id(), &targets);
|
| 302 | ipi_send_msg(&targets, IPI_CPU_STOP);
|
| 303 | }
|
| 304 |
|
| 305 | void arch_send_call_function_single_ipi(int cpu)
|
| 306 | {
|
| 307 | ipi_send_msg_one(cpu, IPI_CALL_FUNC);
|
| 308 | }
|
| 309 |
|
| 310 | void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
| 311 | {
|
| 312 | ipi_send_msg(mask, IPI_CALL_FUNC);
|
| 313 | }
|
| 314 |
|
| 315 | |
| 316 | * ipi_cpu_stop - handle IPI from smp_send_stop()
|
| 317 |
|
| 318 | static void ipi_cpu_stop(void)
|
| 319 | {
|
| 320 | machine_halt();
|
| 321 | }
|
| 322 |
|
| 323 | static inline int __do_IPI(unsigned long msg)
|
| 324 | {
|
| 325 | int rc = 0;
|
| 326 |
|
| 327 | switch (msg) {
|
| 328 | case IPI_RESCHEDULE:
|
| 329 | scheduler_ipi();
|
| 330 | break;
|
| 331 |
|
| 332 | case IPI_CALL_FUNC:
|
| 333 | generic_smp_call_function_interrupt();
|
| 334 | break;
|
| 335 |
|
| 336 | case IPI_CPU_STOP:
|
| 337 | ipi_cpu_stop();
|
| 338 | break;
|
| 339 |
|
| 340 | default:
|
| 341 | rc = 1;
|
| 342 | }
|
| 343 |
|
| 344 | return rc;
|
| 345 | }
|
| 346 |
|
| 347 | |
| 348 | * arch-common ISR to handle for inter-processor interrupts
|
| 349 | * Has hooks for platform specific IPI
|
| 350 |
|
| 351 | static irqreturn_t do_IPI(int irq, void *dev_id)
|
| 352 | {
|
| 353 | unsigned long pending;
|
| 354 | unsigned long __maybe_unused copy;
|
| 355 |
|
| 356 | pr_debug("IPI [%ld] received on cpu %d\n",
|
| 357 | *this_cpu_ptr(&ipi_data), smp_processor_id());
|
| 358 |
|
| 359 | if (plat_smp_ops.ipi_clear)
|
| 360 | plat_smp_ops.ipi_clear(irq);
|
| 361 |
|
| 362 | |
| 363 | * "dequeue" the msg corresponding to this IPI (and possibly other
|
| 364 | * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
|
| 365 |
|
| 366 | copy = pending = xchg(this_cpu_ptr(&ipi_data), 0);
|
| 367 |
|
| 368 | do {
|
| 369 | unsigned long msg = __ffs(pending);
|
| 370 | int rc;
|
| 371 |
|
| 372 | rc = __do_IPI(msg);
|
| 373 | if (rc)
|
| 374 | pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
|
| 375 | pending &= ~(1U << msg);
|
| 376 | } while (pending);
|
| 377 |
|
| 378 | return IRQ_HANDLED;
|
| 379 | }
|
| 380 |
|
| 381 | |
| 382 | * API called by platform code to hookup arch-common ISR to their IPI IRQ
|
| 383 | *
|
| 384 | * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map
|
| 385 | * function needs to call irq_set_percpu_devid() for IPI IRQ, otherwise
|
| 386 | * request_percpu_irq() below will fail
|
| 387 |
|
| 388 | static DEFINE_PER_CPU(int, ipi_dev);
|
| 389 |
|
| 390 | int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq)
|
| 391 | {
|
| 392 | int *dev = per_cpu_ptr(&ipi_dev, cpu);
|
| 393 | unsigned int virq = irq_find_mapping(NULL, hwirq);
|
| 394 |
|
| 395 | if (!virq)
|
| 396 | panic("Cannot find virq for root domain and hwirq=%lu", hwirq);
|
| 397 |
|
| 398 |
|
| 399 | if (!cpu) {
|
| 400 | int rc;
|
| 401 |
|
| 402 | rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev);
|
| 403 | if (rc)
|
| 404 | panic("Percpu IRQ request failed for %u\n", virq);
|
| 405 | }
|
| 406 |
|
| 407 | enable_percpu_irq(virq, 0);
|
| 408 |
|
| 409 | return 0;
|
| 410 | }
|