| 1 |
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| 2 | #ifndef __ASM_ARM_DIV64
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| 3 | #define __ASM_ARM_DIV64
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| 4 |
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| 5 | #include <linux/types.h>
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| 6 | #include <asm/compiler.h>
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| 7 |
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| 8 | |
| 9 | * The semantics of __div64_32() are:
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| 10 | *
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| 11 | * uint32_t __div64_32(uint64_t *n, uint32_t base)
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| 12 | * {
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| 13 | * uint32_t remainder = *n % base;
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| 14 | * *n = *n / base;
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| 15 | * return remainder;
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| 16 | * }
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| 17 | *
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| 18 | * In other words, a 64-bit dividend with a 32-bit divisor producing
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| 19 | * a 64-bit result and a 32-bit remainder. To accomplish this optimally
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| 20 | * we override the generic version in lib/div64.c to call our __do_div64
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| 21 | * assembly implementation with completely non standard calling convention
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| 22 | * for arguments and results (beware).
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| 23 |
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| 24 | static inline uint32_t __div64_32(uint64_t *n, uint32_t base)
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| 25 | {
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| 26 | register unsigned int __base asm("r4") = base;
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| 27 | register unsigned long long __n asm("r0") = *n;
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| 28 | register unsigned long long __res asm("r2");
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| 29 | unsigned int __rem;
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| 30 | asm( __asmeq("%0", "r0")
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| 31 | __asmeq("%1", "r2")
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| 32 | __asmeq("%2", "r4")
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| 33 | "bl __do_div64"
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| 34 | : "+r" (__n), "=r" (__res)
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| 35 | : "r" (__base)
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| 36 | : "ip", "lr", "cc");
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| 37 | __rem = __n >> 32;
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| 38 | *n = __res;
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| 39 | return __rem;
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| 40 | }
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| 41 | #define __div64_32 __div64_32
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| 42 |
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| 43 | #if !defined(CONFIG_AEABI)
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| 44 |
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| 45 | |
| 46 | * In OABI configurations, some uses of the do_div function
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| 47 | * cause gcc to run out of registers. To work around that,
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| 48 | * we can force the use of the out-of-line version for
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| 49 | * configurations that build a OABI kernel.
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| 50 |
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| 51 | #define do_div(n, base) __div64_32(&(n), base)
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| 52 |
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| 53 | #else
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| 54 |
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| 55 | #ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE
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| 56 | static __always_inline
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| 57 | #else
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| 58 | static inline
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| 59 | #endif
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| 60 | uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)
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| 61 | {
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| 62 | unsigned long long res;
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| 63 | register unsigned int tmp asm("ip") = 0;
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| 64 | bool no_ovf = __builtin_constant_p(m) &&
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| 65 | ((m >> 32) + (m & 0xffffffff) < 0x100000000);
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| 66 |
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| 67 | if (!bias) {
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| 68 | asm ( "umull %Q0, %R0, %Q1, %Q2\n\t"
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| 69 | "mov %Q0, #0"
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| 70 | : "=&r" (res)
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| 71 | : "r" (m), "r" (n)
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| 72 | : "cc");
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| 73 | } else if (no_ovf) {
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| 74 | res = m;
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| 75 | asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t"
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| 76 | "mov %Q0, #0"
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| 77 | : "+&r" (res)
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| 78 | : "r" (m), "r" (n)
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| 79 | : "cc");
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| 80 | } else {
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| 81 | asm ( "umull %Q0, %R0, %Q2, %Q3\n\t"
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| 82 | "cmn %Q0, %Q2\n\t"
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| 83 | "adcs %R0, %R0, %R2\n\t"
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| 84 | "adc %Q0, %1, #0"
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| 85 | : "=&r" (res), "+&r" (tmp)
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| 86 | : "r" (m), "r" (n)
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| 87 | : "cc");
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| 88 | }
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| 89 |
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| 90 | if (no_ovf) {
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| 91 | asm ( "umlal %R0, %Q0, %R1, %Q2\n\t"
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| 92 | "umlal %R0, %Q0, %Q1, %R2\n\t"
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| 93 | "mov %R0, #0\n\t"
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| 94 | "umlal %Q0, %R0, %R1, %R2"
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| 95 | : "+&r" (res)
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| 96 | : "r" (m), "r" (n)
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| 97 | : "cc");
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| 98 | } else {
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| 99 | asm ( "umlal %R0, %Q0, %R2, %Q3\n\t"
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| 100 | "umlal %R0, %1, %Q2, %R3\n\t"
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| 101 | "mov %R0, #0\n\t"
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| 102 | "adds %Q0, %1, %Q0\n\t"
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| 103 | "adc %R0, %R0, #0\n\t"
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| 104 | "umlal %Q0, %R0, %R2, %R3"
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| 105 | : "+&r" (res), "+&r" (tmp)
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| 106 | : "r" (m), "r" (n)
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| 107 | : "cc");
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| 108 | }
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| 109 |
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| 110 | return res;
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| 111 | }
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| 112 | #define __arch_xprod_64 __arch_xprod_64
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| 113 |
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| 114 | #include <asm-generic/div64.h>
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| 115 |
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| 116 | #endif
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| 117 |
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| 118 | #endif
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