| 1 | /* SPDX-License-Identifier: GPL-2.0-only */
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| 2 | /*
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| 3 | * linux/arch/arm/kernel/entry-v7m.S
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| 4 | *
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| 5 | * Copyright (C) 2008 ARM Ltd.
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| 6 | *
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| 7 | * Low-level vector interface routines for the ARMv7-M architecture
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| 8 | */
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| 9 | |
| 10 | |
| 11 | |
| 12 | |
| 13 |
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| 14 | |
| 15 |
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| 16 | |
| 17 | |
| 18 | |
| 19 |
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| 20 | __invalid_entry:
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| 21 | v7m_exception_entry
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| 22 | |
| 23 | adr r0, strerr
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| 24 | mrs r1, ipsr
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| 25 | mov r2, lr
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| 26 | bl _printk
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| 27 | |
| 28 | mov r0, sp
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| 29 | bl show_regs
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| 30 | 1: b 1b
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| 31 | ENDPROC(__invalid_entry)
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| 32 |
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| 33 | strerr: .asciz "\nUnhandled exception: IPSR = %08lx LR = %08lx\n"
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| 34 |
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| 35 | .align 2
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| 36 | __irq_entry:
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| 37 | v7m_exception_entry
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| 38 |
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| 39 | @
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| 40 | @ Invoke the IRQ handler
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| 41 | @
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| 42 | mov r0, sp
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| 43 | ldr_this_cpu sp, irq_stack_ptr, r1, r2
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| 44 |
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| 45 | @
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| 46 | @ If we took the interrupt while running in the kernel, we may already
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| 47 | @ be using the IRQ stack, so revert to the original value in that case.
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| 48 | @
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| 49 | subs r2, sp, r0 @ SP above bottom of IRQ stack?
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| 50 | rsbscs r2, r2, |
| 51 | movcs sp, r0
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| 52 |
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| 53 | push {r0, lr} @ preserve LR and original SP
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| 54 |
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| 55 | @ routine called with r0 = struct pt_regs *
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| 56 | bl generic_handle_arch_irq
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| 57 |
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| 58 | pop {r0, lr}
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| 59 | mov sp, r0
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| 60 |
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| 61 | @
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| 62 | @ Check for any pending work if returning to user
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| 63 | @
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| 64 | ldr r1, =BASEADDR_V7M_SCB
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| 65 | ldr r0, [r1, V7M_SCB_ICSR]
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| 66 | tst r0, V7M_SCB_ICSR_RETTOBASE
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| 67 | beq 2f
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| 68 |
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| 69 | get_thread_info tsk
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| 70 | ldr r2, [tsk, |
| 71 | movs r2, r2, lsl |
| 72 | beq 2f @ no work pending
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| 73 | mov r0, |
| 74 | str r0, [r1, V7M_SCB_ICSR] @ raise PendSV
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| 75 |
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| 76 | 2:
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| 77 | @ registers r0-r3 and r12 are automatically restored on exception
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| 78 | @ return. r4-r7 were not clobbered in v7m_exception_entry so for
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| 79 | @ correctness they don't need to be restored. So only r8-r11 must be
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| 80 | @ restored here. The easiest way to do so is to restore r0-r7, too.
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| 81 | ldmia sp!, {r0-r11}
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| 82 | add sp, #PT_REGS_SIZE-S_IP
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| 83 | cpsie i
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| 84 | bx lr
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| 85 | ENDPROC(__irq_entry)
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| 86 |
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| 87 | __pendsv_entry:
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| 88 | v7m_exception_entry
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| 89 |
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| 90 | ldr r1, =BASEADDR_V7M_SCB
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| 91 | mov r0, #V7M_SCB_ICSR_PENDSVCLR
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| 92 | str r0, [r1, V7M_SCB_ICSR] @ clear PendSV
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| 93 |
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| 94 | @ execute the pending work, including reschedule
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| 95 | get_thread_info tsk
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| 96 | mov why, #0
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| 97 | b ret_to_user_from_irq
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| 98 | ENDPROC(__pendsv_entry)
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| 99 |
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| 100 | /*
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| 101 | * Register switch for ARMv7-M processors.
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| 102 | * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
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| 103 | * previous and next are guaranteed not to be the same.
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| 104 | */
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| 105 | ENTRY(__switch_to)
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| 106 | .fnstart
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| 107 | .cantunwind
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| 108 | add ip, r1, #TI_CPU_SAVE
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| 109 | stmia ip!, {r4 - r11} @ Store most regs on stack
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| 110 | str sp, [ip], #4
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| 111 | str lr, [ip], #4
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| 112 | mov r5, r0
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| 113 | mov r6, r2 @ Preserve 'next'
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| 114 | add r4, r2, #TI_CPU_SAVE
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| 115 | ldr r0, =thread_notify_head
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| 116 | mov r1, #THREAD_NOTIFY_SWITCH
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| 117 | bl atomic_notifier_call_chain
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| 118 | mov r0, r5
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| 119 | mov r1, r6
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| 120 | ldmia r4, {r4 - r12, lr} @ Load all regs saved previously
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| 121 | set_current r1, r2
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| 122 | mov sp, ip
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| 123 | bx lr
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| 124 | .fnend
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| 125 | ENDPROC(__switch_to)
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| 126 |
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| 127 | .data
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| 128 | #if CONFIG_CPU_V7M_NUM_IRQ <= 112
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| 129 | .align 9
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| 130 | #else
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| 131 | .align 10
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| 132 | #endif
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| 133 |
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| 134 | /*
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| 135 | * Vector table (Natural alignment need to be ensured)
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| 136 | */
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| 137 | ENTRY(vector_table)
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| 138 | .long 0 @ 0 - Reset stack pointer
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| 139 | .long __invalid_entry @ 1 - Reset
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| 140 | .long __invalid_entry @ 2 - NMI
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| 141 | .long __invalid_entry @ 3 - HardFault
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| 142 | .long __invalid_entry @ 4 - MemManage
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| 143 | .long __invalid_entry @ 5 - BusFault
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| 144 | .long __invalid_entry @ 6 - UsageFault
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| 145 | .long __invalid_entry @ 7 - Reserved
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| 146 | .long __invalid_entry @ 8 - Reserved
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| 147 | .long __invalid_entry @ 9 - Reserved
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| 148 | .long __invalid_entry @ 10 - Reserved
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| 149 | .long vector_swi @ 11 - SVCall
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| 150 | .long __invalid_entry @ 12 - Debug Monitor
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| 151 | .long __invalid_entry @ 13 - Reserved
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| 152 | .long __pendsv_entry @ 14 - PendSV
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| 153 | .long __invalid_entry @ 15 - SysTick
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| 154 | .rept CONFIG_CPU_V7M_NUM_IRQ
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| 155 | .long __irq_entry @ External Interrupts
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| 156 | .endr
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| 157 | .align 2
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| 158 | .globl exc_ret
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| 159 | exc_ret:
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| 160 | .space 4
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