| 1 | /*
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| 2 | * linux/arch/arm/kernel/fiqasm.S
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| 3 | *
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| 4 | * Derived from code originally in linux/arch/arm/kernel/fiq.c:
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| 5 | *
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| 6 | * Copyright (C) 1998 Russell King
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| 7 | * Copyright (C) 1998, 1999 Phil Blundell
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| 8 | * Copyright (C) 2011, Linaro Limited
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| 9 | *
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| 10 | * FIQ support written by Philip Blundell <philb@gnu.org>, 1998.
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| 11 | *
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| 12 | * FIQ support re-written by Russell King to be more generic
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| 13 | *
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| 14 | * v7/Thumb-2 compatibility modifications by Linaro Limited, 2011.
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| 15 | */
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| 16 |
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| 17 | |
| 18 | |
| 19 |
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| 20 | /*
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| 21 | * Taking an interrupt in FIQ mode is death, so both these functions
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| 22 | * disable irqs for the duration.
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| 23 | */
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| 24 |
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| 25 | ENTRY(__set_fiq_regs)
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| 26 | mov r2, |
| 27 | mrs r1, cpsr
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| 28 | msr cpsr_c, r2 @ select FIQ mode
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| 29 | mov r0, r0 @ avoid hazard prior to ARMv4
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| 30 | ldmia r0!, {r8 - r12}
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| 31 | ldr sp, [r0], |
| 32 | ldr lr, [r0]
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| 33 | msr cpsr_c, r1 @ return to SVC mode
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| 34 | mov r0, r0 @ avoid hazard prior to ARMv4
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| 35 | ret lr
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| 36 | ENDPROC(__set_fiq_regs)
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| 37 |
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| 38 | ENTRY(__get_fiq_regs)
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| 39 | mov r2, |
| 40 | mrs r1, cpsr
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| 41 | msr cpsr_c, r2 @ select FIQ mode
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| 42 | mov r0, r0 @ avoid hazard prior to ARMv4
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| 43 | stmia r0!, {r8 - r12}
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| 44 | str sp, [r0], |
| 45 | str lr, [r0]
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| 46 | msr cpsr_c, r1 @ return to SVC mode
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| 47 | mov r0, r0 @ avoid hazard prior to ARMv4
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| 48 | ret lr
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| 49 | ENDPROC(__get_fiq_regs)
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