| 1 | |
| 2 | |
| 3 | * linux/arch/arm/kernel/opcodes.c
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| 4 | *
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| 5 | * A32 condition code lookup feature moved from nwfpe/fpopcode.c
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| 6 |
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| 7 |
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| 8 | #include <linux/module.h>
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| 9 | #include <asm/opcodes.h>
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| 10 |
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| 11 | #define ARM_OPCODE_CONDITION_UNCOND 0xf
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| 12 |
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| 13 | |
| 14 | * condition code lookup table
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| 15 | * index into the table is test code: EQ, NE, ... LT, GT, AL, NV
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| 16 | *
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| 17 | * bit position in short is condition code: NZCV
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| 18 |
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| 19 | static const unsigned short cc_map[16] = {
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| 20 | 0xF0F0,
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| 21 | 0x0F0F,
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| 22 | 0xCCCC,
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| 23 | 0x3333,
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| 24 | 0xFF00,
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| 25 | 0x00FF,
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| 26 | 0xAAAA,
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| 27 | 0x5555,
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| 28 | 0x0C0C,
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| 29 | 0xF3F3,
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| 30 | 0xAA55,
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| 31 | 0x55AA,
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| 32 | 0x0A05,
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| 33 | 0xF5FA,
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| 34 | 0xFFFF,
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| 35 | 0
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| 36 | };
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| 37 |
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| 38 | |
| 39 | * Returns:
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| 40 | * ARM_OPCODE_CONDTEST_FAIL - if condition fails
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| 41 | * ARM_OPCODE_CONDTEST_PASS - if condition passes (including AL)
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| 42 | * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional
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| 43 | * opcode space from v5 onwards
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| 44 | *
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| 45 | * Code that tests whether a conditional instruction would pass its condition
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| 46 | * check should check that return value == ARM_OPCODE_CONDTEST_PASS.
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| 47 | *
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| 48 | * Code that tests if a condition means that the instruction would be executed
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| 49 | * (regardless of conditional or unconditional) should instead check that the
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| 50 | * return value != ARM_OPCODE_CONDTEST_FAIL.
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| 51 |
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| 52 | asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr)
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| 53 | {
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| 54 | u32 cc_bits = opcode >> 28;
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| 55 | u32 psr_cond = psr >> 28;
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| 56 | unsigned int ret;
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| 57 |
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| 58 | if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {
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| 59 | if ((cc_map[cc_bits] >> (psr_cond)) & 1)
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| 60 | ret = ARM_OPCODE_CONDTEST_PASS;
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| 61 | else
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| 62 | ret = ARM_OPCODE_CONDTEST_FAIL;
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| 63 | } else {
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| 64 | ret = ARM_OPCODE_CONDTEST_UNCOND;
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| 65 | }
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| 66 |
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| 67 | return ret;
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| 68 | }
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| 69 | EXPORT_SYMBOL_GPL(arm_check_condition);
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