| 1 | |
| 2 | |
| 3 | * linux/arch/arm/kernel/swp_emulate.c
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| 4 | *
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| 5 | * Copyright (C) 2009 ARM Limited
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| 6 | * __user_* functions adapted from include/asm/uaccess.h
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| 7 | *
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| 8 | * Implements emulation of the SWP/SWPB instructions using load-exclusive and
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| 9 | * store-exclusive for processors that have them disabled (or future ones that
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| 10 | * might not implement them).
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| 11 | *
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| 12 | * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
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| 13 | * Where: Rt = destination
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| 14 | * Rt2 = source
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| 15 | * Rn = address
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| 16 |
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| 17 |
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| 18 | #include <linux/init.h>
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| 19 | #include <linux/kernel.h>
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| 20 | #include <linux/proc_fs.h>
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| 21 | #include <linux/seq_file.h>
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| 22 | #include <linux/sched.h>
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| 23 | #include <linux/sched/mm.h>
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| 24 | #include <linux/syscalls.h>
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| 25 | #include <linux/perf_event.h>
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| 26 |
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| 27 | #include <asm/opcodes.h>
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| 28 | #include <asm/system_info.h>
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| 29 | #include <asm/traps.h>
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| 30 | #include <linux/uaccess.h>
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| 31 |
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| 32 | |
| 33 | * Error-checking SWP macros implemented using ldrex{b}/strex{b}
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| 34 |
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| 35 | #define __user_swpX_asm(data, addr, res, temp, B) \
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| 36 | __asm__ __volatile__( \
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| 37 | ".arch armv7-a\n" \
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| 38 | "0: ldrex"B" %2, [%3]\n" \
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| 39 | "1: strex"B" %0, %1, [%3]\n" \
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| 40 | " cmp %0, #0\n" \
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| 41 | " moveq %1, %2\n" \
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| 42 | " movne %0, %4\n" \
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| 43 | "2:\n" \
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| 44 | " .section .text.fixup,\"ax\"\n" \
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| 45 | " .align 2\n" \
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| 46 | "3: mov %0, %5\n" \
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| 47 | " b 2b\n" \
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| 48 | " .previous\n" \
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| 49 | " .section __ex_table,\"a\"\n" \
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| 50 | " .align 3\n" \
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| 51 | " .long 0b, 3b\n" \
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| 52 | " .long 1b, 3b\n" \
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| 53 | " .previous" \
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| 54 | : "=&r" (res), "+r" (data), "=&r" (temp) \
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| 55 | : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \
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| 56 | : "cc", "memory")
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| 57 |
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| 58 | #define __user_swp_asm(data, addr, res, temp) \
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| 59 | __user_swpX_asm(data, addr, res, temp, "")
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| 60 | #define __user_swpb_asm(data, addr, res, temp) \
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| 61 | __user_swpX_asm(data, addr, res, temp, "b")
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| 62 |
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| 63 | |
| 64 | * Macros/defines for extracting register numbers from instruction.
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| 65 |
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| 66 | #define EXTRACT_REG_NUM(instruction, offset) \
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| 67 | (((instruction) & (0xf << (offset))) >> (offset))
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| 68 | #define RN_OFFSET 16
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| 69 | #define RT_OFFSET 12
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| 70 | #define RT2_OFFSET 0
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| 71 | |
| 72 | * Bit 22 of the instruction encoding distinguishes between
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| 73 | * the SWP and SWPB variants (bit set means SWPB).
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| 74 |
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| 75 | #define TYPE_SWPB (1 << 22)
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| 76 |
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| 77 | static unsigned long swpcounter;
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| 78 | static unsigned long swpbcounter;
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| 79 | static unsigned long abtcounter;
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| 80 | static pid_t previous_pid;
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| 81 |
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| 82 | #ifdef CONFIG_PROC_FS
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| 83 | static int proc_status_show(struct seq_file *m, void *v)
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| 84 | {
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| 85 | seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
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| 86 | seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
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| 87 | seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
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| 88 | if (previous_pid != 0)
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| 89 | seq_printf(m, "Last process:\t\t%d\n", previous_pid);
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| 90 | return 0;
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| 91 | }
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| 92 | #endif
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| 93 |
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| 94 | |
| 95 | * Set up process info to signal segmentation fault - called on access error.
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| 96 |
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| 97 | static void set_segfault(struct pt_regs *regs, unsigned long addr)
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| 98 | {
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| 99 | int si_code;
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| 100 |
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| 101 | mmap_read_lock(current->mm);
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| 102 | if (find_vma(current->mm, addr) == NULL)
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| 103 | si_code = SEGV_MAPERR;
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| 104 | else
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| 105 | si_code = SEGV_ACCERR;
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| 106 | mmap_read_unlock(current->mm);
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| 107 |
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| 108 | pr_debug("SWP{B} emulation: access caused memory abort!\n");
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| 109 | arm_notify_die("Illegal memory access", regs,
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| 110 | SIGSEGV, si_code,
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| 111 | (void __user *)instruction_pointer(regs),
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| 112 | 0, 0);
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| 113 |
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| 114 | abtcounter++;
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| 115 | }
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| 116 |
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| 117 | static int emulate_swpX(unsigned int address, unsigned int *data,
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| 118 | unsigned int type)
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| 119 | {
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| 120 | unsigned int res = 0;
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| 121 |
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| 122 | if ((type != TYPE_SWPB) && (address & 0x3)) {
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| 123 |
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| 124 | pr_debug("SWP instruction on unaligned pointer!\n");
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| 125 | return -EFAULT;
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| 126 | }
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| 127 |
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| 128 | while (1) {
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| 129 | unsigned long temp;
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| 130 | unsigned int __ua_flags;
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| 131 |
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| 132 | __ua_flags = uaccess_save_and_enable();
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| 133 | if (type == TYPE_SWPB)
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| 134 | __user_swpb_asm(*data, address, res, temp);
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| 135 | else
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| 136 | __user_swp_asm(*data, address, res, temp);
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| 137 | uaccess_restore(__ua_flags);
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| 138 |
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| 139 | if (likely(res != -EAGAIN) || signal_pending(current))
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| 140 | break;
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| 141 |
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| 142 | cond_resched();
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| 143 | }
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| 144 |
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| 145 | if (res == 0) {
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| 146 | if (type == TYPE_SWPB)
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| 147 | swpbcounter++;
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| 148 | else
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| 149 | swpcounter++;
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| 150 | }
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| 151 |
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| 152 | return res;
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| 153 | }
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| 154 |
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| 155 | |
| 156 | * swp_handler logs the id of calling process, dissects the instruction, sanity
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| 157 | * checks the memory location, calls emulate_swpX for the actual operation and
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| 158 | * deals with fixup/error handling before returning
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| 159 |
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| 160 | static int swp_handler(struct pt_regs *regs, unsigned int instr)
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| 161 | {
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| 162 | unsigned int address, destreg, data, type;
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| 163 | unsigned int res = 0;
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| 164 |
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| 165 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
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| 166 |
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| 167 | res = arm_check_condition(instr, regs->ARM_cpsr);
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| 168 | switch (res) {
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| 169 | case ARM_OPCODE_CONDTEST_PASS:
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| 170 | break;
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| 171 | case ARM_OPCODE_CONDTEST_FAIL:
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| 172 |
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| 173 | regs->ARM_pc += 4;
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| 174 | return 0;
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| 175 | case ARM_OPCODE_CONDTEST_UNCOND:
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| 176 |
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| 177 | return -EFAULT;
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| 178 | default:
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| 179 | return -EINVAL;
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| 180 | }
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| 181 |
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| 182 | if (current->pid != previous_pid) {
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| 183 | pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
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| 184 | current->comm, (unsigned long)current->pid);
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| 185 | previous_pid = current->pid;
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| 186 | }
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| 187 |
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| 188 | address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
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| 189 | data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
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| 190 | destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
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| 191 |
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| 192 | type = instr & TYPE_SWPB;
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| 193 |
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| 194 | pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
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| 195 | EXTRACT_REG_NUM(instr, RN_OFFSET), address,
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| 196 | destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
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| 197 |
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| 198 |
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| 199 | if (!access_ok((void __user *)(address & ~3), 4)) {
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| 200 | pr_debug("SWP{B} emulation: access to %p not allowed!\n",
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| 201 | (void *)address);
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| 202 | res = -EFAULT;
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| 203 | } else {
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| 204 | res = emulate_swpX(address, &data, type);
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| 205 | }
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| 206 |
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| 207 | if (res == 0) {
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| 208 | |
| 209 | * On successful emulation, revert the adjustment to the PC
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| 210 | * made in kernel/traps.c in order to resume execution at the
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| 211 | * instruction following the SWP{B}.
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| 212 |
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| 213 | regs->ARM_pc += 4;
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| 214 | regs->uregs[destreg] = data;
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| 215 | } else if (res == -EFAULT) {
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| 216 | |
| 217 | * Memory errors do not mean emulation failed.
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| 218 | * Set up signal info to return SEGV, then return OK
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| 219 |
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| 220 | set_segfault(regs, address);
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| 221 | }
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| 222 |
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| 223 | return 0;
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| 224 | }
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| 225 |
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| 226 | |
| 227 | * Only emulate SWP/SWPB executed in ARM state/User mode.
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| 228 | * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
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| 229 |
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| 230 | static struct undef_hook swp_hook = {
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| 231 | .instr_mask = 0x0fb00ff0,
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| 232 | .instr_val = 0x01000090,
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| 233 | .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
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| 234 | .cpsr_val = USR_MODE,
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| 235 | .fn = swp_handler
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| 236 | };
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| 237 |
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| 238 | |
| 239 | * Register handler and create status file in /proc/cpu
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| 240 | * Invoked as late_initcall, since not needed before init spawned.
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| 241 |
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| 242 | static int __init swp_emulation_init(void)
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| 243 | {
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| 244 | if (cpu_architecture() < CPU_ARCH_ARMv7)
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| 245 | return 0;
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| 246 |
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| 247 | #ifdef CONFIG_PROC_FS
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| 248 | if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
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| 249 | proc_status_show))
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| 250 | return -ENOMEM;
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| 251 | #endif
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| 252 |
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| 253 | pr_notice("Registering SWP/SWPB emulation handler\n");
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| 254 | register_undef_hook(&swp_hook);
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| 255 |
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| 256 | return 0;
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| 257 | }
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| 258 |
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| 259 | late_initcall(swp_emulation_init);
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