| 1 | /* SPDX-License-Identifier: GPL-2.0 */
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| 2 | /* ld script to make ARM Linux kernel
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| 3 | * taken from the i386 version by Russell King
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| 4 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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| 5 | */
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| 6 |
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| 7 | /* No __ro_after_init data in the .rodata section - which will always be ro */
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| 8 | |
| 9 |
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| 10 | |
| 11 |
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| 12 | |
| 13 | |
| 14 | |
| 15 | |
| 16 | |
| 17 |
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| 18 | OUTPUT_ARCH(arm)
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| 19 | ENTRY(stext)
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| 20 |
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| 21 | |
| 22 | jiffies = jiffies_64;
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| 23 | |
| 24 | jiffies = jiffies_64 + 4;
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| 25 | |
| 26 |
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| 27 | SECTIONS
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| 28 | {
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| 29 | /*
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| 30 | * XXX: The linker does not define how output sections are
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| 31 | * assigned to input sections when there are multiple statements
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| 32 | * matching the same input section name. There is no documented
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| 33 | * order of matching.
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| 34 | *
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| 35 | * unwind exit sections must be discarded before the rest of the
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| 36 | * unwind sections get included.
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| 37 | */
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| 38 | /DISCARD/ : {
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| 39 | ARM_DISCARD
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| 40 | *(.alt.smp.init)
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| 41 | *(.pv_table)
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| 42 | |
| 43 | *(.ARM.exidx) *(.ARM.exidx.*)
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| 44 | *(.ARM.extab) *(.ARM.extab.*)
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| 45 | |
| 46 | }
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| 47 |
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| 48 | . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
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| 49 | _xiprom = .; /* XIP ROM area to be mapped */
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| 50 |
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| 51 | .head.text : {
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| 52 | _text = .;
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| 53 | HEAD_TEXT
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| 54 | }
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| 55 |
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| 56 | .text : { /* Real text segment */
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| 57 | _stext = .; /* Text and read-only data */
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| 58 | ARM_TEXT
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| 59 | }
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| 60 |
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| 61 | RO_DATA(PAGE_SIZE)
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| 62 |
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| 63 | . = ALIGN(4);
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| 64 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
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| 65 | __start___ex_table = .;
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| 66 | ARM_MMU_KEEP(*(__ex_table))
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| 67 | __stop___ex_table = .;
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| 68 | }
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| 69 |
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| 70 | |
| 71 | ARM_UNWIND_SECTIONS
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| 72 | |
| 73 |
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| 74 | _etext = .; /* End of text and rodata section */
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| 75 |
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| 76 | ARM_VECTORS
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| 77 | INIT_TEXT_SECTION(8)
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| 78 | .exit.text : {
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| 79 | ARM_EXIT_KEEP(EXIT_TEXT)
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| 80 | }
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| 81 | .init.proc.info : {
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| 82 | ARM_CPU_DISCARD(PROC_INFO)
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| 83 | }
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| 84 | .init.arch.info : {
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| 85 | __arch_info_begin = .;
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| 86 | KEEP(*(.arch.info.init))
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| 87 | __arch_info_end = .;
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| 88 | }
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| 89 | .init.tagtable : {
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| 90 | __tagtable_begin = .;
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| 91 | *(.taglist.init)
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| 92 | __tagtable_end = .;
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| 93 | }
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| 94 | .init.rodata : {
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| 95 | INIT_SETUP(16)
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| 96 | INIT_CALLS
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| 97 | CON_INITCALL
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| 98 | INIT_RAM_FS
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| 99 | }
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| 100 |
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| 101 | |
| 102 | . = ALIGN(SZ_128K);
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| 103 | |
| 104 | _exiprom = .; /* End of XIP ROM area */
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| 105 |
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| 106 | /*
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| 107 | * From this point, stuff is considered writable and will be copied to RAM
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| 108 | */
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| 109 | __data_loc = ALIGN(4); /* location in file */
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| 110 | . = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */
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| 111 | |
| 112 | |
| 113 |
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| 114 | . = ALIGN(THREAD_SIZE);
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| 115 | _sdata = .;
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| 116 | RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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| 117 | .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
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| 118 | *(.data..ro_after_init)
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| 119 | }
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| 120 | _edata = .;
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| 121 |
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| 122 | . = ALIGN(PAGE_SIZE);
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| 123 | __init_begin = .;
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| 124 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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| 125 | INIT_DATA
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| 126 | }
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| 127 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
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| 128 | ARM_EXIT_KEEP(EXIT_DATA)
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| 129 | }
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| 130 | |
| 131 | PERCPU_SECTION(L1_CACHE_BYTES)
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| 132 | |
| 133 |
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| 134 | |
| 135 | ARM_TCM
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| 136 | |
| 137 |
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| 138 | /*
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| 139 | * End of copied data. We need a dummy section to get its LMA.
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| 140 | * Also located before final ALIGN() as trailing padding is not stored
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| 141 | * in the resulting binary file and useless to copy.
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| 142 | */
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| 143 | .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
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| 144 | _edata_loc = LOADADDR(.data.endmark);
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| 145 |
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| 146 | . = ALIGN(PAGE_SIZE);
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| 147 | __init_end = .;
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| 148 |
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| 149 | BSS_SECTION(0, 0, 8)
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| 150 | |
| 151 | . = ALIGN(PMSAv8_MINALIGN);
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| 152 | |
| 153 | _end = .;
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| 154 |
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| 155 | STABS_DEBUG
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| 156 | DWARF_DEBUG
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| 157 | MODINFO
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| 158 | ARM_DETAILS
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| 159 |
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| 160 | ARM_ASSERTS
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| 161 | }
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| 162 |
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| 163 | /*
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| 164 | * These must never be empty
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| 165 | * If you have to comment these two assert statements out, your
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| 166 | * binutils is too old (for other reasons as well)
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| 167 | */
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| 168 | ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
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| 169 | |
| 170 | ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
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| 171 | |
| 172 |
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| 173 | |
| 174 | /*
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| 175 | * The .bss is used as a stack area for __inflate_kernel_data() whose stack
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| 176 | * frame is 9568 bytes. Make sure it has extra room left.
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| 177 | */
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| 178 | ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
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| 179 | |
| 180 |
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| 181 | |
| 182 | /*
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| 183 | * Due to PMSAv7 restriction on base address and size we have to
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| 184 | * enforce minimal alignment restrictions. It was seen that weaker
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| 185 | * alignment restriction on _xiprom will likely force XIP address
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| 186 | * space spawns multiple MPU regions thus it is likely we run in
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| 187 | * situation when we are reprogramming MPU region we run on with
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| 188 | * something which doesn't cover reprogramming code itself, so as soon
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| 189 | * as we update MPU settings we'd immediately try to execute straight
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| 190 | * from background region which is XN.
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| 191 | * It seem that alignment in 1M should suit most users.
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| 192 | * _exiprom is aligned as 1/8 of 1M so can be covered by subregion
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| 193 | * disable
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| 194 | */
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| 195 | ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
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| 196 | ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
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| 197 | |