| 1 | |
| 2 | |
| 3 | * ARMv8 single-step debug support and mdscr context switching.
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| 4 | *
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| 5 | * Copyright (C) 2012 ARM Limited
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| 6 | *
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| 7 | * Author: Will Deacon <[email protected]>
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| 8 |
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| 9 |
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| 10 | #include <linux/cpu.h>
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| 11 | #include <linux/debugfs.h>
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| 12 | #include <linux/hardirq.h>
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| 13 | #include <linux/init.h>
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| 14 | #include <linux/ptrace.h>
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| 15 | #include <linux/kprobes.h>
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| 16 | #include <linux/stat.h>
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| 17 | #include <linux/uaccess.h>
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| 18 | #include <linux/sched/task_stack.h>
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| 19 |
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| 20 | #include <asm/cpufeature.h>
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| 21 | #include <asm/cputype.h>
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| 22 | #include <asm/daifflags.h>
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| 23 | #include <asm/debug-monitors.h>
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| 24 | #include <asm/exception.h>
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| 25 | #include <asm/kgdb.h>
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| 26 | #include <asm/kprobes.h>
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| 27 | #include <asm/system_misc.h>
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| 28 | #include <asm/traps.h>
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| 29 | #include <asm/uprobes.h>
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| 30 |
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| 31 |
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| 32 | u8 debug_monitors_arch(void)
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| 33 | {
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| 34 | return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1),
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| 35 | ID_AA64DFR0_EL1_DebugVer_SHIFT);
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| 36 | }
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| 37 |
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| 38 | |
| 39 | * MDSCR access routines.
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| 40 |
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| 41 | static void mdscr_write(u64 mdscr)
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| 42 | {
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| 43 | write_sysreg(mdscr, mdscr_el1);
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| 44 | }
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| 45 | NOKPROBE_SYMBOL(mdscr_write);
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| 46 |
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| 47 | static u64 mdscr_read(void)
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| 48 | {
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| 49 | return read_sysreg(mdscr_el1);
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| 50 | }
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| 51 | NOKPROBE_SYMBOL(mdscr_read);
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| 52 |
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| 53 | |
| 54 | * Allow root to disable self-hosted debug from userspace.
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| 55 | * This is useful if you want to connect an external JTAG debugger.
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| 56 |
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| 57 | static bool debug_enabled = true;
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| 58 |
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| 59 | static int create_debug_debugfs_entry(void)
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| 60 | {
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| 61 | debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
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| 62 | return 0;
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| 63 | }
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| 64 | fs_initcall(create_debug_debugfs_entry);
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| 65 |
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| 66 | static int __init early_debug_disable(char *buf)
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| 67 | {
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| 68 | debug_enabled = false;
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| 69 | return 0;
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| 70 | }
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| 71 |
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| 72 | early_param("nodebugmon", early_debug_disable);
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| 73 |
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| 74 | |
| 75 | * Keep track of debug users on each core.
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| 76 | * The ref counts are per-cpu so we use a local_t type.
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| 77 |
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| 78 | static DEFINE_PER_CPU(int, mde_ref_count);
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| 79 | static DEFINE_PER_CPU(int, kde_ref_count);
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| 80 |
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| 81 | void enable_debug_monitors(enum dbg_active_el el)
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| 82 | {
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| 83 | u64 mdscr, enable = 0;
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| 84 |
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| 85 | WARN_ON(preemptible());
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| 86 |
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| 87 | if (this_cpu_inc_return(mde_ref_count) == 1)
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| 88 | enable = MDSCR_EL1_MDE;
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| 89 |
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| 90 | if (el == DBG_ACTIVE_EL1 &&
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| 91 | this_cpu_inc_return(kde_ref_count) == 1)
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| 92 | enable |= MDSCR_EL1_KDE;
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| 93 |
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| 94 | if (enable && debug_enabled) {
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| 95 | mdscr = mdscr_read();
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| 96 | mdscr |= enable;
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| 97 | mdscr_write(mdscr);
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| 98 | }
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| 99 | }
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| 100 | NOKPROBE_SYMBOL(enable_debug_monitors);
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| 101 |
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| 102 | void disable_debug_monitors(enum dbg_active_el el)
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| 103 | {
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| 104 | u64 mdscr, disable = 0;
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| 105 |
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| 106 | WARN_ON(preemptible());
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| 107 |
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| 108 | if (this_cpu_dec_return(mde_ref_count) == 0)
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| 109 | disable = ~MDSCR_EL1_MDE;
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| 110 |
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| 111 | if (el == DBG_ACTIVE_EL1 &&
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| 112 | this_cpu_dec_return(kde_ref_count) == 0)
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| 113 | disable &= ~MDSCR_EL1_KDE;
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| 114 |
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| 115 | if (disable) {
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| 116 | mdscr = mdscr_read();
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| 117 | mdscr &= disable;
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| 118 | mdscr_write(mdscr);
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| 119 | }
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| 120 | }
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| 121 | NOKPROBE_SYMBOL(disable_debug_monitors);
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| 122 |
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| 123 | |
| 124 | * OS lock clearing.
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| 125 |
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| 126 | static int clear_os_lock(unsigned int cpu)
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| 127 | {
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| 128 | write_sysreg(0, osdlr_el1);
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| 129 | write_sysreg(0, oslar_el1);
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| 130 | isb();
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| 131 | return 0;
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| 132 | }
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| 133 |
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| 134 | static int __init debug_monitors_init(void)
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| 135 | {
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| 136 | return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING,
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| 137 | "arm64/debug_monitors:starting",
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| 138 | clear_os_lock, NULL);
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| 139 | }
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| 140 | postcore_initcall(debug_monitors_init);
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| 141 |
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| 142 | |
| 143 | * Single step API and exception handling.
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| 144 |
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| 145 | static void set_user_regs_spsr_ss(struct user_pt_regs *regs)
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| 146 | {
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| 147 | regs->pstate |= DBG_SPSR_SS;
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| 148 | }
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| 149 | NOKPROBE_SYMBOL(set_user_regs_spsr_ss);
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| 150 |
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| 151 | static void clear_user_regs_spsr_ss(struct user_pt_regs *regs)
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| 152 | {
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| 153 | regs->pstate &= ~DBG_SPSR_SS;
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| 154 | }
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| 155 | NOKPROBE_SYMBOL(clear_user_regs_spsr_ss);
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| 156 |
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| 157 | #define set_regs_spsr_ss(r) set_user_regs_spsr_ss(&(r)->user_regs)
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| 158 | #define clear_regs_spsr_ss(r) clear_user_regs_spsr_ss(&(r)->user_regs)
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| 159 |
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| 160 | static void send_user_sigtrap(int si_code)
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| 161 | {
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| 162 | struct pt_regs *regs = current_pt_regs();
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| 163 |
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| 164 | if (WARN_ON(!user_mode(regs)))
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| 165 | return;
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| 166 |
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| 167 | if (!regs_irqs_disabled(regs))
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| 168 | local_irq_enable();
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| 169 |
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| 170 | arm64_force_sig_fault(SIGTRAP, si_code, instruction_pointer(regs),
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| 171 | "User debug trap");
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| 172 | }
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| 173 |
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| 174 | |
| 175 | * We have already unmasked interrupts and enabled preemption
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| 176 | * when calling do_el0_softstep() from entry-common.c.
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| 177 |
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| 178 | void do_el0_softstep(unsigned long esr, struct pt_regs *regs)
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| 179 | {
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| 180 | if (uprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
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| 181 | return;
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| 182 |
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| 183 | send_user_sigtrap(TRAP_TRACE);
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| 184 | |
| 185 | * ptrace will disable single step unless explicitly
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| 186 | * asked to re-enable it. For other clients, it makes
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| 187 | * sense to leave it enabled (i.e. rewind the controls
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| 188 | * to the active-not-pending state).
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| 189 |
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| 190 | user_rewind_single_step(current);
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| 191 | }
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| 192 |
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| 193 | void do_el1_softstep(unsigned long esr, struct pt_regs *regs)
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| 194 | {
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| 195 | if (kgdb_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
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| 196 | return;
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| 197 |
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| 198 | pr_warn("Unexpected kernel single-step exception at EL1\n");
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| 199 | |
| 200 | * Re-enable stepping since we know that we will be
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| 201 | * returning to regs.
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| 202 |
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| 203 | set_regs_spsr_ss(regs);
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| 204 | }
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| 205 | NOKPROBE_SYMBOL(do_el1_softstep);
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| 206 |
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| 207 | static int call_el1_break_hook(struct pt_regs *regs, unsigned long esr)
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| 208 | {
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| 209 | if (esr_brk_comment(esr) == BUG_BRK_IMM)
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| 210 | return bug_brk_handler(regs, esr);
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| 211 |
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| 212 | if (IS_ENABLED(CONFIG_CFI) && esr_is_cfi_brk(esr))
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| 213 | return cfi_brk_handler(regs, esr);
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| 214 |
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| 215 | if (esr_brk_comment(esr) == FAULT_BRK_IMM)
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| 216 | return reserved_fault_brk_handler(regs, esr);
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| 217 |
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| 218 | if (IS_ENABLED(CONFIG_KASAN_SW_TAGS) &&
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| 219 | (esr_brk_comment(esr) & ~KASAN_BRK_MASK) == KASAN_BRK_IMM)
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| 220 | return kasan_brk_handler(regs, esr);
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| 221 |
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| 222 | if (IS_ENABLED(CONFIG_UBSAN_TRAP) && esr_is_ubsan_brk(esr))
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| 223 | return ubsan_brk_handler(regs, esr);
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| 224 |
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| 225 | if (IS_ENABLED(CONFIG_KGDB)) {
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| 226 | if (esr_brk_comment(esr) == KGDB_DYN_DBG_BRK_IMM)
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| 227 | return kgdb_brk_handler(regs, esr);
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| 228 | if (esr_brk_comment(esr) == KGDB_COMPILED_DBG_BRK_IMM)
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| 229 | return kgdb_compiled_brk_handler(regs, esr);
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| 230 | }
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| 231 |
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| 232 | if (IS_ENABLED(CONFIG_KPROBES)) {
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| 233 | if (esr_brk_comment(esr) == KPROBES_BRK_IMM)
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| 234 | return kprobe_brk_handler(regs, esr);
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| 235 | if (esr_brk_comment(esr) == KPROBES_BRK_SS_IMM)
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| 236 | return kprobe_ss_brk_handler(regs, esr);
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| 237 | }
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| 238 |
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| 239 | if (IS_ENABLED(CONFIG_KRETPROBES) &&
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| 240 | esr_brk_comment(esr) == KRETPROBES_BRK_IMM)
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| 241 | return kretprobe_brk_handler(regs, esr);
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| 242 |
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| 243 | return DBG_HOOK_ERROR;
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| 244 | }
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| 245 | NOKPROBE_SYMBOL(call_el1_break_hook);
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| 246 |
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| 247 | |
| 248 | * We have already unmasked interrupts and enabled preemption
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| 249 | * when calling do_el0_brk64() from entry-common.c.
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| 250 |
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| 251 | void do_el0_brk64(unsigned long esr, struct pt_regs *regs)
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| 252 | {
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| 253 | if (IS_ENABLED(CONFIG_UPROBES) &&
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| 254 | esr_brk_comment(esr) == UPROBES_BRK_IMM &&
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| 255 | uprobe_brk_handler(regs, esr) == DBG_HOOK_HANDLED)
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| 256 | return;
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| 257 |
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| 258 | send_user_sigtrap(TRAP_BRKPT);
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| 259 | }
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| 260 |
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| 261 | void do_el1_brk64(unsigned long esr, struct pt_regs *regs)
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| 262 | {
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| 263 | if (call_el1_break_hook(regs, esr) == DBG_HOOK_HANDLED)
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| 264 | return;
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| 265 |
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| 266 | die("Oops - BRK", regs, esr);
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| 267 | }
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| 268 | NOKPROBE_SYMBOL(do_el1_brk64);
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| 269 |
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| 270 | #ifdef CONFIG_COMPAT
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| 271 | void do_bkpt32(unsigned long esr, struct pt_regs *regs)
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| 272 | {
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| 273 | arm64_notify_die("aarch32 BKPT", regs, SIGTRAP, TRAP_BRKPT, regs->pc, esr);
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| 274 | }
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| 275 | #endif
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| 276 |
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| 277 | bool try_handle_aarch32_break(struct pt_regs *regs)
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| 278 | {
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| 279 | u32 arm_instr;
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| 280 | u16 thumb_instr;
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| 281 | bool bp = false;
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| 282 | void __user *pc = (void __user *)instruction_pointer(regs);
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| 283 |
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| 284 | if (!compat_user_mode(regs))
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| 285 | return false;
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| 286 |
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| 287 | if (compat_thumb_mode(regs)) {
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| 288 |
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| 289 | __le16 instr;
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| 290 | get_user(instr, (__le16 __user *)pc);
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| 291 | thumb_instr = le16_to_cpu(instr);
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| 292 | if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
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| 293 |
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| 294 | get_user(instr, (__le16 __user *)(pc + 2));
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| 295 | thumb_instr = le16_to_cpu(instr);
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| 296 | bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
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| 297 | } else {
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| 298 | bp = thumb_instr == AARCH32_BREAK_THUMB;
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| 299 | }
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| 300 | } else {
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| 301 |
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| 302 | __le32 instr;
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| 303 | get_user(instr, (__le32 __user *)pc);
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| 304 | arm_instr = le32_to_cpu(instr);
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| 305 | bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
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| 306 | }
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| 307 |
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| 308 | if (!bp)
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| 309 | return false;
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| 310 |
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| 311 | send_user_sigtrap(TRAP_BRKPT);
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| 312 | return true;
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| 313 | }
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| 314 | NOKPROBE_SYMBOL(try_handle_aarch32_break);
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| 315 |
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| 316 |
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| 317 | void user_rewind_single_step(struct task_struct *task)
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| 318 | {
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| 319 | |
| 320 | * If single step is active for this thread, then set SPSR.SS
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| 321 | * to 1 to avoid returning to the active-pending state.
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| 322 |
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| 323 | if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
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| 324 | set_regs_spsr_ss(task_pt_regs(task));
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| 325 | }
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| 326 | NOKPROBE_SYMBOL(user_rewind_single_step);
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| 327 |
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| 328 | void user_fastforward_single_step(struct task_struct *task)
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| 329 | {
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| 330 | if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
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| 331 | clear_regs_spsr_ss(task_pt_regs(task));
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| 332 | }
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| 333 |
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| 334 | void user_regs_reset_single_step(struct user_pt_regs *regs,
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| 335 | struct task_struct *task)
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| 336 | {
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| 337 | if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
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| 338 | set_user_regs_spsr_ss(regs);
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| 339 | else
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| 340 | clear_user_regs_spsr_ss(regs);
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| 341 | }
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| 342 |
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| 343 |
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| 344 | void kernel_enable_single_step(struct pt_regs *regs)
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| 345 | {
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| 346 | WARN_ON(!irqs_disabled());
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| 347 | set_regs_spsr_ss(regs);
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| 348 | mdscr_write(mdscr_read() | MDSCR_EL1_SS);
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| 349 | enable_debug_monitors(DBG_ACTIVE_EL1);
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| 350 | }
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| 351 | NOKPROBE_SYMBOL(kernel_enable_single_step);
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| 352 |
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| 353 | void kernel_disable_single_step(void)
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| 354 | {
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| 355 | WARN_ON(!irqs_disabled());
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| 356 | mdscr_write(mdscr_read() & ~MDSCR_EL1_SS);
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| 357 | disable_debug_monitors(DBG_ACTIVE_EL1);
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| 358 | }
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| 359 | NOKPROBE_SYMBOL(kernel_disable_single_step);
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| 360 |
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| 361 | int kernel_active_single_step(void)
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| 362 | {
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| 363 | WARN_ON(!irqs_disabled());
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| 364 | return mdscr_read() & MDSCR_EL1_SS;
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| 365 | }
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| 366 | NOKPROBE_SYMBOL(kernel_active_single_step);
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| 367 |
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| 368 | void kernel_rewind_single_step(struct pt_regs *regs)
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| 369 | {
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| 370 | set_regs_spsr_ss(regs);
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| 371 | }
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| 372 |
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| 373 | void kernel_fastforward_single_step(struct pt_regs *regs)
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| 374 | {
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| 375 | clear_regs_spsr_ss(regs);
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| 376 | }
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| 377 |
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| 378 |
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| 379 | void user_enable_single_step(struct task_struct *task)
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| 380 | {
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| 381 | struct thread_info *ti = task_thread_info(task);
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| 382 |
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| 383 | if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP))
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| 384 | set_regs_spsr_ss(task_pt_regs(task));
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| 385 | }
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| 386 | NOKPROBE_SYMBOL(user_enable_single_step);
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| 387 |
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| 388 | void user_disable_single_step(struct task_struct *task)
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| 389 | {
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| 390 | clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
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| 391 | }
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| 392 | NOKPROBE_SYMBOL(user_disable_single_step);
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