| 1 | |
| 2 | |
| 3 |
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| 4 | #include <linux/cache.h>
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| 5 | #include <linux/highmem.h>
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| 6 | #include <linux/mm.h>
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| 7 | #include <asm/cache.h>
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| 8 | #include <asm/tlbflush.h>
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| 9 |
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| 10 | void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,
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| 11 | unsigned long address, pte_t *pte, unsigned int nr)
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| 12 | {
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| 13 | unsigned long pfn = pte_pfn(*pte);
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| 14 | struct folio *folio;
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| 15 | unsigned int i;
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| 16 |
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| 17 | flush_tlb_page(vma, address);
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| 18 |
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| 19 | if (!pfn_valid(pfn))
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| 20 | return;
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| 21 |
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| 22 | folio = page_folio(pfn_to_page(pfn));
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| 23 |
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| 24 | if (test_and_set_bit(PG_dcache_clean, &folio->flags.f))
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| 25 | return;
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| 26 |
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| 27 | icache_inv_range(address, address + nr*PAGE_SIZE);
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| 28 | for (i = 0; i < folio_nr_pages(folio); i++) {
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| 29 | unsigned long addr = (unsigned long) kmap_local_folio(folio,
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| 30 | i * PAGE_SIZE);
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| 31 |
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| 32 | dcache_wb_range(addr, addr + PAGE_SIZE);
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| 33 | if (vma->vm_flags & VM_EXEC)
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| 34 | icache_inv_range(addr, addr + PAGE_SIZE);
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| 35 | kunmap_local((void *) addr);
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| 36 | }
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| 37 | }
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| 38 |
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| 39 | void flush_icache_deferred(struct mm_struct *mm)
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| 40 | {
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| 41 | unsigned int cpu = smp_processor_id();
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| 42 | cpumask_t *mask = &mm->context.icache_stale_mask;
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| 43 |
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| 44 | if (cpumask_test_cpu(cpu, mask)) {
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| 45 | cpumask_clear_cpu(cpu, mask);
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| 46 | |
| 47 | * Ensure the remote hart's writes are visible to this hart.
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| 48 | * This pairs with a barrier in flush_icache_mm.
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| 49 |
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| 50 | smp_mb();
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| 51 | local_icache_inv_all(NULL);
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| 52 | }
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| 53 | }
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| 54 |
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| 55 | void flush_icache_mm_range(struct mm_struct *mm,
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| 56 | unsigned long start, unsigned long end)
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| 57 | {
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| 58 | unsigned int cpu;
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| 59 | cpumask_t others, *mask;
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| 60 |
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| 61 | preempt_disable();
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| 62 |
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| 63 | #ifdef CONFIG_CPU_HAS_ICACHE_INS
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| 64 | if (mm == current->mm) {
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| 65 | icache_inv_range(start, end);
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| 66 | preempt_enable();
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| 67 | return;
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| 68 | }
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| 69 | #endif
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| 70 |
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| 71 |
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| 72 | mask = &mm->context.icache_stale_mask;
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| 73 | cpumask_setall(mask);
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| 74 |
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| 75 |
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| 76 | cpu = smp_processor_id();
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| 77 | cpumask_clear_cpu(cpu, mask);
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| 78 | local_icache_inv_all(NULL);
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| 79 |
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| 80 | |
| 81 | * Flush the I$ of other harts concurrently executing, and mark them as
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| 82 | * flushed.
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| 83 |
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| 84 | cpumask_andnot(&others, mm_cpumask(mm), cpumask_of(cpu));
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| 85 |
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| 86 | if (mm != current->active_mm || !cpumask_empty(&others)) {
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| 87 | on_each_cpu_mask(&others, local_icache_inv_all, NULL, 1);
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| 88 | cpumask_clear(mask);
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| 89 | }
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| 90 |
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| 91 | preempt_enable();
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| 92 | }
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