| 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | config MIPS |
| 3 | bool |
| 4 | default y |
| 5 | select ARCH_32BIT_OFF_T if !64BIT |
| 6 | select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT |
| 7 | select ARCH_HAS_CC_CAN_LINK |
| 8 | select ARCH_HAS_CPU_CACHE_ALIASING |
| 9 | select ARCH_HAS_CPU_FINALIZE_INIT |
| 10 | select ARCH_HAS_CURRENT_STACK_POINTER |
| 11 | select ARCH_HAS_DEBUG_VIRTUAL if !64BIT |
| 12 | select ARCH_HAS_DMA_OPS if MACH_JAZZ |
| 13 | select ARCH_HAS_FORTIFY_SOURCE |
| 14 | select ARCH_HAS_KCOV |
| 15 | select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA |
| 16 | select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) |
| 17 | select ARCH_HAS_STRNCPY_FROM_USER |
| 18 | select ARCH_HAS_STRNLEN_USER |
| 19 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
| 20 | select ARCH_HAS_UBSAN |
| 21 | select ARCH_HAS_GCOV_PROFILE_ALL |
| 22 | select ARCH_KEEP_MEMBLOCK |
| 23 | select ARCH_USE_BUILTIN_BSWAP |
| 24 | select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
| 25 | select ARCH_USE_MEMTEST |
| 26 | select ARCH_USE_QUEUED_RWLOCKS |
| 27 | select ARCH_USE_QUEUED_SPINLOCKS |
| 28 | select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES |
| 29 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
| 30 | select ARCH_WANT_IPC_PARSE_VERSION |
| 31 | select ARCH_WANT_LD_ORPHAN_WARN |
| 32 | select BUILDTIME_TABLE_SORT |
| 33 | select BUILTIN_DTB_ALL if BUILTIN_DTB |
| 34 | select CLONE_BACKWARDS |
| 35 | select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) |
| 36 | select CPU_PM if CPU_IDLE || SUSPEND |
| 37 | select GENERIC_ATOMIC64 if !64BIT |
| 38 | select GENERIC_BUILTIN_DTB if BUILTIN_DTB |
| 39 | select GENERIC_CMOS_UPDATE |
| 40 | select GENERIC_CPU_AUTOPROBE |
| 41 | select GENERIC_IRQ_PROBE |
| 42 | select GENERIC_IRQ_SHOW |
| 43 | select GENERIC_ISA_DMA if EISA |
| 44 | select GENERIC_LIB_ASHLDI3 |
| 45 | select GENERIC_LIB_ASHRDI3 |
| 46 | select GENERIC_LIB_CMPDI2 |
| 47 | select GENERIC_LIB_LSHRDI3 |
| 48 | select GENERIC_LIB_UCMPDI2 |
| 49 | select GENERIC_PCI_IOMAP |
| 50 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
| 51 | select GENERIC_SMP_IDLE_THREAD |
| 52 | select GENERIC_IDLE_POLL_SETUP |
| 53 | select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT |
| 54 | select HAS_IOPORT if !NO_IOPORT_MAP || ISA |
| 55 | select HAVE_ARCH_COMPILER_H |
| 56 | select HAVE_ARCH_JUMP_LABEL |
| 57 | select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT |
| 58 | select HAVE_ARCH_MMAP_RND_BITS if MMU |
| 59 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT |
| 60 | select HAVE_ARCH_SECCOMP_FILTER |
| 61 | select HAVE_ARCH_TRACEHOOK |
| 62 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES |
| 63 | select HAVE_ASM_MODVERSIONS |
| 64 | select HAVE_CONTEXT_TRACKING_USER |
| 65 | select HAVE_TIF_NOHZ |
| 66 | select HAVE_C_RECORDMCOUNT |
| 67 | select HAVE_DEBUG_KMEMLEAK |
| 68 | select HAVE_DEBUG_STACKOVERFLOW |
| 69 | select HAVE_DMA_CONTIGUOUS |
| 70 | select HAVE_DYNAMIC_FTRACE |
| 71 | select HAVE_EBPF_JIT if !CPU_MICROMIPS |
| 72 | select HAVE_EXIT_THREAD |
| 73 | select HAVE_GUP_FAST |
| 74 | select HAVE_FUNCTION_GRAPH_TRACER |
| 75 | select HAVE_FUNCTION_TRACER |
| 76 | select HAVE_GCC_PLUGINS |
| 77 | select HAVE_IOREMAP_PROT |
| 78 | select HAVE_IRQ_EXIT_ON_IRQ_STACK |
| 79 | select HAVE_IRQ_TIME_ACCOUNTING |
| 80 | select HAVE_KPROBES |
| 81 | select HAVE_KRETPROBES |
| 82 | select HAVE_LD_DEAD_CODE_DATA_ELIMINATION |
| 83 | select HAVE_MOD_ARCH_SPECIFIC |
| 84 | select HAVE_NMI |
| 85 | select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64 |
| 86 | select HAVE_PAGE_SIZE_16KB if !CPU_R3000 |
| 87 | select HAVE_PAGE_SIZE_64KB if !CPU_R3000 |
| 88 | select HAVE_PERF_EVENTS |
| 89 | select HAVE_PERF_REGS |
| 90 | select HAVE_PERF_USER_STACK_DUMP |
| 91 | select HAVE_REGS_AND_STACK_ACCESS_API |
| 92 | select HAVE_RSEQ |
| 93 | select HAVE_SPARSE_SYSCALL_NR |
| 94 | select HAVE_STACKPROTECTOR |
| 95 | select HAVE_SYSCALL_TRACEPOINTS |
| 96 | select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP |
| 97 | select IRQ_FORCED_THREADING |
| 98 | select ISA if EISA |
| 99 | select LOCK_MM_AND_FIND_VMA |
| 100 | select MMU_GATHER_RCU_TABLE_FREE |
| 101 | select MODULES_USE_ELF_REL if MODULES |
| 102 | select MODULES_USE_ELF_RELA if MODULES && 64BIT |
| 103 | select PERF_USE_VMALLOC |
| 104 | select PCI_MSI_ARCH_FALLBACKS if PCI_MSI |
| 105 | select RTC_LIB |
| 106 | select SYSCTL_EXCEPTION_TRACE |
| 107 | select TRACE_IRQFLAGS_SUPPORT |
| 108 | select ARCH_HAS_ELFCORE_COMPAT |
| 109 | select HAVE_ARCH_KCSAN if 64BIT |
| 110 | |
| 111 | config MIPS_FIXUP_BIGPHYS_ADDR |
| 112 | bool |
| 113 | |
| 114 | config MIPS_GENERIC |
| 115 | bool |
| 116 | |
| 117 | config MACH_GENERIC_CORE |
| 118 | bool |
| 119 | |
| 120 | config MACH_INGENIC |
| 121 | bool |
| 122 | select SYS_SUPPORTS_32BIT_KERNEL |
| 123 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 124 | select SYS_SUPPORTS_ZBOOT |
| 125 | select DMA_NONCOHERENT |
| 126 | select IRQ_MIPS_CPU |
| 127 | select PINCTRL |
| 128 | select GPIOLIB |
| 129 | select COMMON_CLK |
| 130 | select GENERIC_IRQ_CHIP |
| 131 | select BUILTIN_DTB if MIPS_NO_APPENDED_DTB |
| 132 | select USE_OF |
| 133 | select CPU_SUPPORTS_CPUFREQ |
| 134 | select MIPS_EXTERNAL_TIMER |
| 135 | |
| 136 | menu "Machine selection" |
| 137 | |
| 138 | choice |
| 139 | prompt "System type" |
| 140 | default MIPS_GENERIC_KERNEL |
| 141 | |
| 142 | config MIPS_GENERIC_KERNEL |
| 143 | bool "Generic board-agnostic MIPS kernel" |
| 144 | select MIPS_GENERIC |
| 145 | select BOOT_RAW |
| 146 | select BUILTIN_DTB |
| 147 | select CEVT_R4K |
| 148 | select CLKSRC_MIPS_GIC |
| 149 | select COMMON_CLK |
| 150 | select CPU_MIPSR2_IRQ_EI |
| 151 | select CPU_MIPSR2_IRQ_VI |
| 152 | select CSRC_R4K |
| 153 | select DMA_NONCOHERENT |
| 154 | select HAVE_PCI |
| 155 | select IRQ_MIPS_CPU |
| 156 | select MACH_GENERIC_CORE |
| 157 | select MIPS_AUTO_PFN_OFFSET |
| 158 | select MIPS_CPU_SCACHE |
| 159 | select MIPS_GIC |
| 160 | select MIPS_L1_CACHE_SHIFT_7 |
| 161 | select NO_EXCEPT_FILL |
| 162 | select PCI_DRIVERS_GENERIC |
| 163 | select SMP_UP if SMP |
| 164 | select SWAP_IO_SPACE |
| 165 | select SYS_HAS_CPU_MIPS32_R1 |
| 166 | select SYS_HAS_CPU_MIPS32_R2 |
| 167 | select SYS_HAS_CPU_MIPS32_R5 |
| 168 | select SYS_HAS_CPU_MIPS32_R6 |
| 169 | select SYS_HAS_CPU_MIPS64_R1 |
| 170 | select SYS_HAS_CPU_MIPS64_R2 |
| 171 | select SYS_HAS_CPU_MIPS64_R5 |
| 172 | select SYS_HAS_CPU_MIPS64_R6 |
| 173 | select SYS_SUPPORTS_32BIT_KERNEL |
| 174 | select SYS_SUPPORTS_64BIT_KERNEL |
| 175 | select SYS_SUPPORTS_BIG_ENDIAN |
| 176 | select SYS_SUPPORTS_HIGHMEM |
| 177 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 178 | select SYS_SUPPORTS_MICROMIPS |
| 179 | select SYS_SUPPORTS_MIPS16 |
| 180 | select SYS_SUPPORTS_MIPS_CPS |
| 181 | select SYS_SUPPORTS_MULTITHREADING |
| 182 | select SYS_SUPPORTS_RELOCATABLE |
| 183 | select SYS_SUPPORTS_SMARTMIPS |
| 184 | select SYS_SUPPORTS_ZBOOT |
| 185 | select UHI_BOOT |
| 186 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 187 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 188 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 189 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 190 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 191 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 192 | select USE_OF |
| 193 | help |
| 194 | Select this to build a kernel which aims to support multiple boards, |
| 195 | generally using a flattened device tree passed from the bootloader |
| 196 | using the boot protocol defined in the UHI (Unified Hosting |
| 197 | Interface) specification. |
| 198 | |
| 199 | config MIPS_ALCHEMY |
| 200 | bool "Alchemy processor based machines" |
| 201 | select PHYS_ADDR_T_64BIT |
| 202 | select CEVT_R4K |
| 203 | select CSRC_R4K |
| 204 | select IRQ_MIPS_CPU |
| 205 | select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is |
| 206 | select GPIOLIB |
| 207 | select GPIOLIB_LEGACY |
| 208 | select MIPS_FIXUP_BIGPHYS_ADDR if PCI |
| 209 | select SYS_HAS_CPU_MIPS32_R1 |
| 210 | select SYS_SUPPORTS_32BIT_KERNEL |
| 211 | select SYS_SUPPORTS_APM_EMULATION |
| 212 | select GPIOLIB |
| 213 | select SYS_SUPPORTS_ZBOOT |
| 214 | select COMMON_CLK |
| 215 | |
| 216 | config ATH25 |
| 217 | bool "Atheros AR231x/AR531x SoC support" |
| 218 | select CEVT_R4K |
| 219 | select CSRC_R4K |
| 220 | select DMA_NONCOHERENT |
| 221 | select IRQ_MIPS_CPU |
| 222 | select IRQ_DOMAIN |
| 223 | select SYS_HAS_CPU_MIPS32_R1 |
| 224 | select SYS_SUPPORTS_BIG_ENDIAN |
| 225 | select SYS_SUPPORTS_32BIT_KERNEL |
| 226 | select SYS_HAS_EARLY_PRINTK |
| 227 | help |
| 228 | Support for Atheros AR231x and Atheros AR531x based boards |
| 229 | |
| 230 | config ATH79 |
| 231 | bool "Atheros AR71XX/AR724X/AR913X based boards" |
| 232 | select ARCH_HAS_RESET_CONTROLLER |
| 233 | select BOOT_RAW |
| 234 | select CEVT_R4K |
| 235 | select CSRC_R4K |
| 236 | select DMA_NONCOHERENT |
| 237 | select GPIOLIB |
| 238 | select PINCTRL |
| 239 | select COMMON_CLK |
| 240 | select IRQ_MIPS_CPU |
| 241 | select SYS_HAS_CPU_MIPS32_R2 |
| 242 | select SYS_HAS_EARLY_PRINTK |
| 243 | select SYS_SUPPORTS_32BIT_KERNEL |
| 244 | select SYS_SUPPORTS_BIG_ENDIAN |
| 245 | select SYS_SUPPORTS_MIPS16 |
| 246 | select SYS_SUPPORTS_ZBOOT_UART_PROM |
| 247 | select USE_OF |
| 248 | select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM |
| 249 | help |
| 250 | Support for the Atheros AR71XX/AR724X/AR913X SoCs. |
| 251 | |
| 252 | config BMIPS_GENERIC |
| 253 | bool "Broadcom Generic BMIPS kernel" |
| 254 | select ARCH_HAS_RESET_CONTROLLER |
| 255 | select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
| 256 | select BOOT_RAW |
| 257 | select NO_EXCEPT_FILL |
| 258 | select USE_OF |
| 259 | select CEVT_R4K |
| 260 | select CSRC_R4K |
| 261 | select SYNC_R4K |
| 262 | select COMMON_CLK |
| 263 | select BCM6345_L1_IRQ |
| 264 | select BCM7038_L1_IRQ |
| 265 | select BCM7120_L2_IRQ |
| 266 | select BRCMSTB_L2_IRQ |
| 267 | select IRQ_MIPS_CPU |
| 268 | select DMA_NONCOHERENT |
| 269 | select SYS_SUPPORTS_32BIT_KERNEL |
| 270 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 271 | select SYS_SUPPORTS_BIG_ENDIAN |
| 272 | select SYS_SUPPORTS_HIGHMEM |
| 273 | select SYS_HAS_CPU_BMIPS32_3300 |
| 274 | select SYS_HAS_CPU_BMIPS4350 |
| 275 | select SYS_HAS_CPU_BMIPS4380 |
| 276 | select SYS_HAS_CPU_BMIPS5000 |
| 277 | select SWAP_IO_SPACE |
| 278 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 279 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 280 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 281 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 282 | select HARDIRQS_SW_RESEND |
| 283 | select HAVE_PCI |
| 284 | select PCI_DRIVERS_GENERIC |
| 285 | select FW_CFE |
| 286 | help |
| 287 | Build a generic DT-based kernel image that boots on select |
| 288 | BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top |
| 289 | box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN |
| 290 | must be set appropriately for your board. |
| 291 | |
| 292 | config BCM47XX |
| 293 | bool "Broadcom BCM47XX based boards" |
| 294 | select BOOT_RAW |
| 295 | select CEVT_R4K |
| 296 | select CSRC_R4K |
| 297 | select DMA_NONCOHERENT |
| 298 | select HAVE_PCI |
| 299 | select IRQ_MIPS_CPU |
| 300 | select SYS_HAS_CPU_MIPS32_R1 |
| 301 | select NO_EXCEPT_FILL |
| 302 | select SYS_SUPPORTS_32BIT_KERNEL |
| 303 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 304 | select SYS_SUPPORTS_MIPS16 |
| 305 | select SYS_SUPPORTS_ZBOOT |
| 306 | select SYS_HAS_EARLY_PRINTK |
| 307 | select USE_GENERIC_EARLY_PRINTK_8250 |
| 308 | select GPIOLIB |
| 309 | select GPIOLIB_LEGACY |
| 310 | select LEDS_GPIO_REGISTER |
| 311 | select BCM47XX_NVRAM |
| 312 | select BCM47XX_SPROM |
| 313 | select BCM47XX_SSB if !BCM47XX_BCMA |
| 314 | help |
| 315 | Support for BCM47XX based boards |
| 316 | |
| 317 | config BCM63XX |
| 318 | bool "Broadcom BCM63XX based boards" |
| 319 | select BOOT_RAW |
| 320 | select CEVT_R4K |
| 321 | select CSRC_R4K |
| 322 | select SYNC_R4K |
| 323 | select DMA_NONCOHERENT |
| 324 | select IRQ_MIPS_CPU |
| 325 | select SYS_SUPPORTS_32BIT_KERNEL |
| 326 | select SYS_SUPPORTS_BIG_ENDIAN |
| 327 | select SYS_HAS_EARLY_PRINTK |
| 328 | select SYS_HAS_CPU_BMIPS32_3300 |
| 329 | select SYS_HAS_CPU_BMIPS4350 |
| 330 | select SYS_HAS_CPU_BMIPS4380 |
| 331 | select SWAP_IO_SPACE |
| 332 | select GPIOLIB |
| 333 | select GPIOLIB_LEGACY |
| 334 | select MIPS_L1_CACHE_SHIFT_4 |
| 335 | select HAVE_LEGACY_CLK |
| 336 | help |
| 337 | Support for BCM63XX based boards |
| 338 | |
| 339 | config MIPS_COBALT |
| 340 | bool "Cobalt Server" |
| 341 | select CEVT_R4K |
| 342 | select CSRC_R4K |
| 343 | select CEVT_GT641XX |
| 344 | select DMA_NONCOHERENT |
| 345 | select FORCE_PCI |
| 346 | select I8253 |
| 347 | select I8259 |
| 348 | select IRQ_MIPS_CPU |
| 349 | select IRQ_GT641XX |
| 350 | select PCI_GT64XXX_PCI0 |
| 351 | select SYS_HAS_CPU_NEVADA |
| 352 | select SYS_HAS_EARLY_PRINTK |
| 353 | select SYS_SUPPORTS_32BIT_KERNEL |
| 354 | select SYS_SUPPORTS_64BIT_KERNEL |
| 355 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 356 | select USE_GENERIC_EARLY_PRINTK_8250 |
| 357 | |
| 358 | config MACH_DECSTATION |
| 359 | bool "DECstations" |
| 360 | select BOOT_ELF32 |
| 361 | select CEVT_DS1287 |
| 362 | select CEVT_R4K if CPU_R4X00 |
| 363 | select CSRC_IOASIC |
| 364 | select CSRC_R4K if CPU_R4X00 |
| 365 | select CPU_DADDI_WORKAROUNDS if 64BIT |
| 366 | select CPU_R4000_WORKAROUNDS if 64BIT |
| 367 | select CPU_R4400_WORKAROUNDS if 64BIT |
| 368 | select DMA_NONCOHERENT |
| 369 | select NO_IOPORT_MAP |
| 370 | select IRQ_MIPS_CPU |
| 371 | select SYS_HAS_CPU_R3000 |
| 372 | select SYS_HAS_CPU_R4X00 |
| 373 | select SYS_SUPPORTS_32BIT_KERNEL |
| 374 | select SYS_SUPPORTS_64BIT_KERNEL |
| 375 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 376 | select SYS_SUPPORTS_128HZ |
| 377 | select SYS_SUPPORTS_256HZ |
| 378 | select SYS_SUPPORTS_1024HZ |
| 379 | select MIPS_L1_CACHE_SHIFT_4 |
| 380 | help |
| 381 | This enables support for DEC's MIPS based workstations. For details |
| 382 | see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the |
| 383 | DECstation porting pages on <http://decstation.unix-ag.org/>. |
| 384 | |
| 385 | If you have one of the following DECstation Models you definitely |
| 386 | want to choose R4xx0 for the CPU Type: |
| 387 | |
| 388 | DECstation 5000/50 |
| 389 | DECstation 5000/150 |
| 390 | DECstation 5000/260 |
| 391 | DECsystem 5900/260 |
| 392 | |
| 393 | otherwise choose R3000. |
| 394 | |
| 395 | config ECONET |
| 396 | bool "EcoNet MIPS family" |
| 397 | select BOOT_RAW |
| 398 | select DEBUG_ZBOOT if DEBUG_KERNEL |
| 399 | select ECONET_EN751221_TIMER |
| 400 | select SYS_SUPPORTS_BIG_ENDIAN |
| 401 | select SYS_HAS_CPU_MIPS32_R1 |
| 402 | select SYS_HAS_CPU_MIPS32_R2 |
| 403 | select SYS_HAS_EARLY_PRINTK |
| 404 | select SYS_SUPPORTS_32BIT_KERNEL |
| 405 | select SYS_SUPPORTS_MIPS16 |
| 406 | select SYS_SUPPORTS_ZBOOT_UART16550 |
| 407 | select USE_GENERIC_EARLY_PRINTK_8250 |
| 408 | select USE_OF |
| 409 | help |
| 410 | EcoNet EN75xx MIPS devices are big endian MIPS machines used |
| 411 | in XPON (fiber) and DSL applications. They have SPI, PCI, USB, |
| 412 | GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores. |
| 413 | Don't confuse these with the Airoha ARM devices sometimes referred |
| 414 | to as "EcoNet", this family is for MIPS based devices only. |
| 415 | |
| 416 | config MACH_JAZZ |
| 417 | bool "Jazz family of machines" |
| 418 | select ARC_MEMORY |
| 419 | select ARC_PROMLIB |
| 420 | select ARCH_MIGHT_HAVE_PC_PARPORT |
| 421 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 422 | select FW_ARC |
| 423 | select FW_ARC32 |
| 424 | select ARCH_MAY_HAVE_PC_FDC |
| 425 | select CEVT_R4K |
| 426 | select CSRC_R4K |
| 427 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
| 428 | select GENERIC_ISA_DMA |
| 429 | select HAVE_PCSPKR_PLATFORM |
| 430 | select IRQ_MIPS_CPU |
| 431 | select I8253 |
| 432 | select I8259 |
| 433 | select ISA |
| 434 | select SYS_HAS_CPU_R4X00 |
| 435 | select SYS_SUPPORTS_32BIT_KERNEL |
| 436 | select SYS_SUPPORTS_64BIT_KERNEL |
| 437 | select SYS_SUPPORTS_100HZ |
| 438 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 439 | help |
| 440 | This a family of machines based on the MIPS R4030 chipset which was |
| 441 | used by several vendors to build RISC/os and Windows NT workstations. |
| 442 | Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and |
| 443 | Olivetti M700-10 workstations. |
| 444 | |
| 445 | config MACH_INGENIC_SOC |
| 446 | bool "Ingenic SoC based machines" |
| 447 | select MIPS_GENERIC |
| 448 | select MACH_INGENIC |
| 449 | select MACH_GENERIC_CORE |
| 450 | select SYS_SUPPORTS_ZBOOT_UART16550 |
| 451 | select CPU_SUPPORTS_CPUFREQ |
| 452 | select MIPS_EXTERNAL_TIMER |
| 453 | |
| 454 | config LANTIQ |
| 455 | bool "Lantiq based platforms" |
| 456 | select DMA_NONCOHERENT |
| 457 | select IRQ_MIPS_CPU |
| 458 | select CEVT_R4K |
| 459 | select CSRC_R4K |
| 460 | select NO_EXCEPT_FILL |
| 461 | select SYS_HAS_CPU_MIPS32_R1 |
| 462 | select SYS_HAS_CPU_MIPS32_R2 |
| 463 | select SYS_SUPPORTS_BIG_ENDIAN |
| 464 | select SYS_SUPPORTS_32BIT_KERNEL |
| 465 | select SYS_SUPPORTS_MIPS16 |
| 466 | select SYS_SUPPORTS_MULTITHREADING |
| 467 | select SYS_SUPPORTS_VPE_LOADER |
| 468 | select SYS_HAS_EARLY_PRINTK |
| 469 | select GPIOLIB |
| 470 | select SWAP_IO_SPACE |
| 471 | select BOOT_RAW |
| 472 | select HAVE_LEGACY_CLK |
| 473 | select USE_OF |
| 474 | select PINCTRL |
| 475 | select PINCTRL_LANTIQ |
| 476 | select ARCH_HAS_RESET_CONTROLLER |
| 477 | select RESET_CONTROLLER |
| 478 | |
| 479 | config MACH_LOONGSON32 |
| 480 | bool "Loongson 32-bit family of machines" |
| 481 | select MACH_GENERIC_CORE |
| 482 | select USE_OF |
| 483 | select BUILTIN_DTB |
| 484 | select BOOT_ELF32 |
| 485 | select CEVT_R4K |
| 486 | select CSRC_R4K |
| 487 | select COMMON_CLK |
| 488 | select DMA_NONCOHERENT |
| 489 | select GENERIC_IRQ_SHOW_LEVEL |
| 490 | select IRQ_MIPS_CPU |
| 491 | select LS1X_IRQ |
| 492 | select SYS_HAS_CPU_LOONGSON32 |
| 493 | select SYS_HAS_EARLY_PRINTK |
| 494 | select USE_GENERIC_EARLY_PRINTK_8250 |
| 495 | select SYS_SUPPORTS_32BIT_KERNEL |
| 496 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 497 | select SYS_SUPPORTS_HIGHMEM |
| 498 | select SYS_SUPPORTS_ZBOOT |
| 499 | help |
| 500 | This enables support for the Loongson-1 family of machines. |
| 501 | |
| 502 | Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
| 503 | the Institute of Computing Technology (ICT), Chinese Academy of |
| 504 | Sciences (CAS). |
| 505 | |
| 506 | config MACH_LOONGSON2EF |
| 507 | bool "Loongson-2E/F family of machines" |
| 508 | select SYS_SUPPORTS_ZBOOT |
| 509 | help |
| 510 | This enables the support of early Loongson-2E/F family of machines. |
| 511 | |
| 512 | config MACH_LOONGSON64 |
| 513 | bool "Loongson 64-bit family of machines" |
| 514 | select ARCH_DMA_DEFAULT_COHERENT |
| 515 | select ARCH_SPARSEMEM_ENABLE |
| 516 | select ARCH_MIGHT_HAVE_PC_PARPORT |
| 517 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 518 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 519 | select BOOT_ELF32 |
| 520 | select BOARD_SCACHE |
| 521 | select CSRC_R4K |
| 522 | select CEVT_R4K |
| 523 | select SYNC_R4K |
| 524 | select FORCE_PCI |
| 525 | select ISA |
| 526 | select I8259 |
| 527 | select IRQ_MIPS_CPU |
| 528 | select NO_EXCEPT_FILL |
| 529 | select NR_CPUS_DEFAULT_64 |
| 530 | select USE_GENERIC_EARLY_PRINTK_8250 |
| 531 | select PCI_DRIVERS_GENERIC |
| 532 | select SYS_HAS_CPU_LOONGSON64 |
| 533 | select SYS_HAS_EARLY_PRINTK |
| 534 | select SYS_SUPPORTS_SMP |
| 535 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 536 | select SYS_SUPPORTS_NUMA |
| 537 | select SYS_SUPPORTS_64BIT_KERNEL |
| 538 | select SYS_SUPPORTS_HIGHMEM |
| 539 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 540 | select SYS_SUPPORTS_ZBOOT |
| 541 | select SYS_SUPPORTS_RELOCATABLE |
| 542 | select ZONE_DMA32 |
| 543 | select COMMON_CLK |
| 544 | select USE_OF |
| 545 | select BUILTIN_DTB |
| 546 | select PCI_HOST_GENERIC |
| 547 | help |
| 548 | This enables the support of Loongson-2/3 family of machines. |
| 549 | |
| 550 | Loongson-2 and Loongson-3 are 64-bit general-purpose processors with |
| 551 | GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E |
| 552 | and Loongson-2F which will be removed), developed by the Institute |
| 553 | of Computing Technology (ICT), Chinese Academy of Sciences (CAS). |
| 554 | |
| 555 | config MIPS_MALTA |
| 556 | bool "MIPS Malta board" |
| 557 | select ARCH_MAY_HAVE_PC_FDC |
| 558 | select ARCH_MIGHT_HAVE_PC_PARPORT |
| 559 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 560 | select BOOT_ELF32 |
| 561 | select BOOT_RAW |
| 562 | select BUILTIN_DTB |
| 563 | select CEVT_R4K |
| 564 | select CLKSRC_MIPS_GIC |
| 565 | select COMMON_CLK |
| 566 | select CSRC_R4K |
| 567 | select DMA_NONCOHERENT |
| 568 | select GENERIC_ISA_DMA |
| 569 | select HAVE_PCSPKR_PLATFORM |
| 570 | select HAVE_PCI |
| 571 | select I8253 |
| 572 | select I8259 |
| 573 | select IRQ_MIPS_CPU |
| 574 | select MIPS_BONITO64 |
| 575 | select MIPS_CPU_SCACHE |
| 576 | select MIPS_GIC |
| 577 | select MIPS_L1_CACHE_SHIFT_6 |
| 578 | select MIPS_MSC |
| 579 | select PCI_GT64XXX_PCI0 |
| 580 | select RTC_MC146818_LIB |
| 581 | select SMP_UP if SMP |
| 582 | select SWAP_IO_SPACE |
| 583 | select SYS_HAS_CPU_MIPS32_R1 |
| 584 | select SYS_HAS_CPU_MIPS32_R2 |
| 585 | select SYS_HAS_CPU_MIPS32_R3_5 |
| 586 | select SYS_HAS_CPU_MIPS32_R5 |
| 587 | select SYS_HAS_CPU_MIPS32_R6 |
| 588 | select SYS_HAS_CPU_MIPS64_R1 |
| 589 | select SYS_HAS_CPU_MIPS64_R2 |
| 590 | select SYS_HAS_CPU_MIPS64_R6 |
| 591 | select SYS_HAS_CPU_NEVADA |
| 592 | select SYS_HAS_CPU_RM7000 |
| 593 | select SYS_SUPPORTS_32BIT_KERNEL |
| 594 | select SYS_SUPPORTS_64BIT_KERNEL |
| 595 | select SYS_SUPPORTS_BIG_ENDIAN |
| 596 | select SYS_SUPPORTS_HIGHMEM |
| 597 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 598 | select SYS_SUPPORTS_MICROMIPS |
| 599 | select SYS_SUPPORTS_MIPS16 |
| 600 | select SYS_SUPPORTS_MIPS_CPS |
| 601 | select SYS_SUPPORTS_MULTITHREADING |
| 602 | select SYS_SUPPORTS_RELOCATABLE |
| 603 | select SYS_SUPPORTS_SMARTMIPS |
| 604 | select SYS_SUPPORTS_VPE_LOADER |
| 605 | select SYS_SUPPORTS_ZBOOT |
| 606 | select USE_OF |
| 607 | select WAR_ICACHE_REFILLS |
| 608 | select ZONE_DMA32 if 64BIT |
| 609 | help |
| 610 | This enables support for the MIPS Technologies Malta evaluation |
| 611 | board. |
| 612 | |
| 613 | config MACH_PIC32 |
| 614 | bool "Microchip PIC32 Family" |
| 615 | help |
| 616 | This enables support for the Microchip PIC32 family of platforms. |
| 617 | |
| 618 | Microchip PIC32 is a family of general-purpose 32 bit MIPS core |
| 619 | microcontrollers. |
| 620 | |
| 621 | config EYEQ |
| 622 | bool "Mobileye EyeQ SoC" |
| 623 | select MACH_GENERIC_CORE |
| 624 | select ARM_AMBA |
| 625 | select PHYSICAL_START_BOOL |
| 626 | select ARCH_SPARSEMEM_DEFAULT if 64BIT |
| 627 | select BOOT_RAW |
| 628 | select BUILTIN_DTB |
| 629 | select CEVT_R4K |
| 630 | select CLKSRC_MIPS_GIC |
| 631 | select COMMON_CLK |
| 632 | select CPU_MIPSR2_IRQ_EI |
| 633 | select CPU_MIPSR2_IRQ_VI |
| 634 | select CSRC_R4K |
| 635 | select DMA_NONCOHERENT |
| 636 | select HAVE_PCI |
| 637 | select IRQ_MIPS_CPU |
| 638 | select MIPS_AUTO_PFN_OFFSET |
| 639 | select MIPS_CPU_SCACHE |
| 640 | select MIPS_GIC |
| 641 | select MIPS_L1_CACHE_SHIFT_7 |
| 642 | select PCI_DRIVERS_GENERIC |
| 643 | select SMP_UP if SMP |
| 644 | select SWAP_IO_SPACE |
| 645 | select SYS_HAS_CPU_MIPS64_R6 |
| 646 | select SYS_SUPPORTS_64BIT_KERNEL |
| 647 | select SYS_SUPPORTS_HIGHMEM |
| 648 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 649 | select SYS_SUPPORTS_MIPS_CPS |
| 650 | select SYS_SUPPORTS_RELOCATABLE |
| 651 | select SYS_SUPPORTS_ZBOOT |
| 652 | select UHI_BOOT |
| 653 | select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 654 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 655 | select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 656 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 657 | select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| 658 | select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 659 | select USE_OF |
| 660 | select HOTPLUG_PARALLEL if HOTPLUG_CPU |
| 661 | select WEAK_REORDERING_BEYOND_LLSC |
| 662 | help |
| 663 | Select this to build a kernel supporting EyeQ SoC from Mobileye. |
| 664 | |
| 665 | bool |
| 666 | |
| 667 | config MACH_NINTENDO64 |
| 668 | bool "Nintendo 64 console" |
| 669 | select CEVT_R4K |
| 670 | select CSRC_R4K |
| 671 | select SYS_HAS_CPU_R4300 |
| 672 | select SYS_SUPPORTS_BIG_ENDIAN |
| 673 | select SYS_SUPPORTS_ZBOOT |
| 674 | select SYS_SUPPORTS_32BIT_KERNEL |
| 675 | select SYS_SUPPORTS_64BIT_KERNEL |
| 676 | select DMA_NONCOHERENT |
| 677 | select IRQ_MIPS_CPU |
| 678 | |
| 679 | config RALINK |
| 680 | bool "Ralink based machines" |
| 681 | select CEVT_R4K |
| 682 | select COMMON_CLK |
| 683 | select CSRC_R4K |
| 684 | select BOOT_RAW |
| 685 | select DMA_NONCOHERENT |
| 686 | select IRQ_MIPS_CPU |
| 687 | select USE_OF |
| 688 | select SYS_HAS_CPU_MIPS32_R2 |
| 689 | select SYS_SUPPORTS_32BIT_KERNEL |
| 690 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 691 | select SYS_SUPPORTS_MIPS16 |
| 692 | select SYS_SUPPORTS_ZBOOT |
| 693 | select SYS_HAS_EARLY_PRINTK |
| 694 | select ARCH_HAS_RESET_CONTROLLER |
| 695 | select RESET_CONTROLLER |
| 696 | |
| 697 | config MACH_REALTEK_RTL |
| 698 | bool "Realtek RTL838x/RTL839x based machines" |
| 699 | select MIPS_GENERIC |
| 700 | select MACH_GENERIC_CORE |
| 701 | select DMA_NONCOHERENT |
| 702 | select IRQ_MIPS_CPU |
| 703 | select CSRC_R4K |
| 704 | select CEVT_R4K |
| 705 | select SYS_HAS_CPU_MIPS32_R1 |
| 706 | select SYS_HAS_CPU_MIPS32_R2 |
| 707 | select SYS_SUPPORTS_BIG_ENDIAN |
| 708 | select SYS_SUPPORTS_32BIT_KERNEL |
| 709 | select SYS_SUPPORTS_MIPS16 |
| 710 | select SYS_SUPPORTS_MULTITHREADING |
| 711 | select SYS_SUPPORTS_VPE_LOADER |
| 712 | select BOOT_RAW |
| 713 | select PINCTRL |
| 714 | select USE_OF |
| 715 | select REALTEK_OTTO_TIMER |
| 716 | |
| 717 | config SGI_IP22 |
| 718 | bool "SGI IP22 (Indy/Indigo2)" |
| 719 | select ARC_MEMORY |
| 720 | select ARC_PROMLIB |
| 721 | select FW_ARC |
| 722 | select FW_ARC32 |
| 723 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 724 | select BOOT_ELF32 |
| 725 | select CEVT_R4K |
| 726 | select CSRC_R4K |
| 727 | select DEFAULT_SGI_PARTITION |
| 728 | select DMA_NONCOHERENT |
| 729 | select HAVE_EISA |
| 730 | select I8253 |
| 731 | select I8259 |
| 732 | select IP22_CPU_SCACHE |
| 733 | select IRQ_MIPS_CPU |
| 734 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 735 | select SGI_HAS_I8042 |
| 736 | select SGI_HAS_INDYDOG |
| 737 | select SGI_HAS_HAL2 |
| 738 | select SGI_HAS_SEEQ |
| 739 | select SGI_HAS_WD93 |
| 740 | select SGI_HAS_ZILOG |
| 741 | select SWAP_IO_SPACE |
| 742 | select SYS_HAS_CPU_R4X00 |
| 743 | select SYS_HAS_CPU_R5000 |
| 744 | select SYS_HAS_EARLY_PRINTK |
| 745 | select SYS_SUPPORTS_32BIT_KERNEL |
| 746 | select SYS_SUPPORTS_64BIT_KERNEL |
| 747 | select SYS_SUPPORTS_BIG_ENDIAN |
| 748 | select WAR_R4600_V1_INDEX_ICACHEOP |
| 749 | select WAR_R4600_V1_HIT_CACHEOP |
| 750 | select WAR_R4600_V2_HIT_CACHEOP |
| 751 | select MIPS_L1_CACHE_SHIFT_7 |
| 752 | help |
| 753 | This are the SGI Indy, Challenge S and Indigo2, as well as certain |
| 754 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel |
| 755 | that runs on these, say Y here. |
| 756 | |
| 757 | config SGI_IP27 |
| 758 | bool "SGI IP27 (Origin200/2000)" |
| 759 | select ARCH_HAS_PHYS_TO_DMA |
| 760 | select ARCH_SPARSEMEM_ENABLE |
| 761 | select FW_ARC |
| 762 | select FW_ARC64 |
| 763 | select ARC_CMDLINE_ONLY |
| 764 | select BOOT_ELF64 |
| 765 | select DEFAULT_SGI_PARTITION |
| 766 | select FORCE_PCI |
| 767 | select SYS_HAS_EARLY_PRINTK |
| 768 | select HAVE_PCI |
| 769 | select IRQ_MIPS_CPU |
| 770 | select IRQ_DOMAIN_HIERARCHY |
| 771 | select NR_CPUS_DEFAULT_64 |
| 772 | select PCI_DRIVERS_GENERIC |
| 773 | select PCI_XTALK_BRIDGE |
| 774 | select SYS_HAS_CPU_R10000 |
| 775 | select SYS_SUPPORTS_64BIT_KERNEL |
| 776 | select SYS_SUPPORTS_BIG_ENDIAN |
| 777 | select SYS_SUPPORTS_NUMA |
| 778 | select SYS_SUPPORTS_SMP |
| 779 | select WAR_R10000_LLSC |
| 780 | select MIPS_L1_CACHE_SHIFT_7 |
| 781 | select NUMA |
| 782 | help |
| 783 | This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics |
| 784 | workstations. To compile a Linux kernel that runs on these, say Y |
| 785 | here. |
| 786 | |
| 787 | config SGI_IP28 |
| 788 | bool "SGI IP28 (Indigo2 R10k)" |
| 789 | select ARC_MEMORY |
| 790 | select ARC_PROMLIB |
| 791 | select FW_ARC |
| 792 | select FW_ARC64 |
| 793 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 794 | select BOOT_ELF64 |
| 795 | select CEVT_R4K |
| 796 | select CSRC_R4K |
| 797 | select DEFAULT_SGI_PARTITION |
| 798 | select DMA_NONCOHERENT |
| 799 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 800 | select IRQ_MIPS_CPU |
| 801 | select HAVE_EISA |
| 802 | select I8253 |
| 803 | select I8259 |
| 804 | select SGI_HAS_I8042 |
| 805 | select SGI_HAS_INDYDOG |
| 806 | select SGI_HAS_HAL2 |
| 807 | select SGI_HAS_SEEQ |
| 808 | select SGI_HAS_WD93 |
| 809 | select SGI_HAS_ZILOG |
| 810 | select SWAP_IO_SPACE |
| 811 | select SYS_HAS_CPU_R10000 |
| 812 | select SYS_HAS_EARLY_PRINTK |
| 813 | select SYS_SUPPORTS_64BIT_KERNEL |
| 814 | select SYS_SUPPORTS_BIG_ENDIAN |
| 815 | select WAR_R10000_LLSC |
| 816 | select MIPS_L1_CACHE_SHIFT_7 |
| 817 | help |
| 818 | This is the SGI Indigo2 with R10000 processor. To compile a Linux |
| 819 | kernel that runs on these, say Y here. |
| 820 | |
| 821 | config SGI_IP30 |
| 822 | bool "SGI IP30 (Octane/Octane2)" |
| 823 | select ARCH_HAS_PHYS_TO_DMA |
| 824 | select FW_ARC |
| 825 | select FW_ARC64 |
| 826 | select BOOT_ELF64 |
| 827 | select CEVT_R4K |
| 828 | select CSRC_R4K |
| 829 | select FORCE_PCI |
| 830 | select SYNC_R4K if SMP |
| 831 | select ZONE_DMA32 |
| 832 | select HAVE_PCI |
| 833 | select IRQ_MIPS_CPU |
| 834 | select IRQ_DOMAIN_HIERARCHY |
| 835 | select PCI_DRIVERS_GENERIC |
| 836 | select PCI_XTALK_BRIDGE |
| 837 | select SYS_HAS_EARLY_PRINTK |
| 838 | select SYS_HAS_CPU_R10000 |
| 839 | select SYS_SUPPORTS_64BIT_KERNEL |
| 840 | select SYS_SUPPORTS_BIG_ENDIAN |
| 841 | select SYS_SUPPORTS_SMP |
| 842 | select WAR_R10000_LLSC |
| 843 | select MIPS_L1_CACHE_SHIFT_7 |
| 844 | select ARC_MEMORY |
| 845 | help |
| 846 | These are the SGI Octane and Octane2 graphics workstations. To |
| 847 | compile a Linux kernel that runs on these, say Y here. |
| 848 | |
| 849 | config SGI_IP32 |
| 850 | bool "SGI IP32 (O2)" |
| 851 | select ARC_MEMORY |
| 852 | select ARC_PROMLIB |
| 853 | select ARCH_HAS_PHYS_TO_DMA |
| 854 | select FW_ARC |
| 855 | select FW_ARC32 |
| 856 | select BOOT_ELF32 |
| 857 | select CEVT_R4K |
| 858 | select CSRC_R4K |
| 859 | select DMA_NONCOHERENT |
| 860 | select HAVE_PCI |
| 861 | select IRQ_MIPS_CPU |
| 862 | select R5000_CPU_SCACHE |
| 863 | select RM7000_CPU_SCACHE |
| 864 | select SYS_HAS_CPU_R5000 |
| 865 | select SYS_HAS_CPU_R10000 if BROKEN |
| 866 | select SYS_HAS_CPU_RM7000 |
| 867 | select SYS_HAS_CPU_NEVADA |
| 868 | select SYS_SUPPORTS_64BIT_KERNEL |
| 869 | select SYS_SUPPORTS_BIG_ENDIAN |
| 870 | select WAR_ICACHE_REFILLS |
| 871 | help |
| 872 | If you want this kernel to run on SGI O2 workstation, say Y here. |
| 873 | |
| 874 | config SIBYTE_CRHONE |
| 875 | bool "Sibyte BCM91125C-CRhone" |
| 876 | select BOOT_ELF32 |
| 877 | select SIBYTE_BCM1125 |
| 878 | select SWAP_IO_SPACE |
| 879 | select SYS_HAS_CPU_SB1 |
| 880 | select SYS_SUPPORTS_BIG_ENDIAN |
| 881 | select SYS_SUPPORTS_HIGHMEM |
| 882 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 883 | |
| 884 | config SIBYTE_RHONE |
| 885 | bool "Sibyte BCM91125E-Rhone" |
| 886 | select BOOT_ELF32 |
| 887 | select SIBYTE_SB1250 |
| 888 | select SWAP_IO_SPACE |
| 889 | select SYS_HAS_CPU_SB1 |
| 890 | select SYS_SUPPORTS_BIG_ENDIAN |
| 891 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 892 | |
| 893 | config SIBYTE_SWARM |
| 894 | bool "Sibyte BCM91250A-SWARM" |
| 895 | select BOOT_ELF32 |
| 896 | select HAVE_PATA_PLATFORM |
| 897 | select SIBYTE_SB1250 |
| 898 | select SWAP_IO_SPACE |
| 899 | select SYS_HAS_CPU_SB1 |
| 900 | select SYS_SUPPORTS_BIG_ENDIAN |
| 901 | select SYS_SUPPORTS_HIGHMEM |
| 902 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 903 | select ZONE_DMA32 if 64BIT |
| 904 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
| 905 | |
| 906 | config SIBYTE_LITTLESUR |
| 907 | bool "Sibyte BCM91250C2-LittleSur" |
| 908 | select BOOT_ELF32 |
| 909 | select HAVE_PATA_PLATFORM |
| 910 | select SIBYTE_SB1250 |
| 911 | select SWAP_IO_SPACE |
| 912 | select SYS_HAS_CPU_SB1 |
| 913 | select SYS_SUPPORTS_BIG_ENDIAN |
| 914 | select SYS_SUPPORTS_HIGHMEM |
| 915 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 916 | select ZONE_DMA32 if 64BIT |
| 917 | |
| 918 | config SIBYTE_SENTOSA |
| 919 | bool "Sibyte BCM91250E-Sentosa" |
| 920 | select BOOT_ELF32 |
| 921 | select SIBYTE_SB1250 |
| 922 | select SWAP_IO_SPACE |
| 923 | select SYS_HAS_CPU_SB1 |
| 924 | select SYS_SUPPORTS_BIG_ENDIAN |
| 925 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 926 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
| 927 | |
| 928 | config SIBYTE_BIGSUR |
| 929 | bool "Sibyte BCM91480B-BigSur" |
| 930 | select BOOT_ELF32 |
| 931 | select NR_CPUS_DEFAULT_4 |
| 932 | select SIBYTE_BCM1x80 |
| 933 | select SWAP_IO_SPACE |
| 934 | select SYS_HAS_CPU_SB1 |
| 935 | select SYS_SUPPORTS_BIG_ENDIAN |
| 936 | select SYS_SUPPORTS_HIGHMEM |
| 937 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 938 | select ZONE_DMA32 if 64BIT |
| 939 | select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI |
| 940 | |
| 941 | config SNI_RM |
| 942 | bool "SNI RM200/300/400" |
| 943 | select ARC_MEMORY |
| 944 | select ARC_PROMLIB |
| 945 | select FW_ARC if CPU_LITTLE_ENDIAN |
| 946 | select FW_ARC32 if CPU_LITTLE_ENDIAN |
| 947 | select FW_SNIPROM if CPU_BIG_ENDIAN |
| 948 | select ARCH_MAY_HAVE_PC_FDC |
| 949 | select ARCH_MIGHT_HAVE_PC_PARPORT |
| 950 | select ARCH_MIGHT_HAVE_PC_SERIO |
| 951 | select BOOT_ELF32 |
| 952 | select CEVT_R4K |
| 953 | select CSRC_R4K |
| 954 | select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
| 955 | select DMA_NONCOHERENT |
| 956 | select GENERIC_ISA_DMA |
| 957 | select HAVE_EISA |
| 958 | select HAVE_PCSPKR_PLATFORM |
| 959 | select HAVE_PCI |
| 960 | select IRQ_MIPS_CPU |
| 961 | select I8253 |
| 962 | select I8259 |
| 963 | select ISA |
| 964 | select MIPS_L1_CACHE_SHIFT_6 |
| 965 | select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
| 966 | select SYS_HAS_CPU_R4X00 |
| 967 | select SYS_HAS_CPU_R5000 |
| 968 | select SYS_HAS_CPU_R10000 |
| 969 | select R5000_CPU_SCACHE |
| 970 | select SYS_HAS_EARLY_PRINTK |
| 971 | select SYS_SUPPORTS_32BIT_KERNEL |
| 972 | select SYS_SUPPORTS_64BIT_KERNEL |
| 973 | select SYS_SUPPORTS_BIG_ENDIAN |
| 974 | select SYS_SUPPORTS_HIGHMEM |
| 975 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 976 | select WAR_R4600_V2_HIT_CACHEOP |
| 977 | help |
| 978 | The SNI RM200/300/400 are MIPS-based machines manufactured by |
| 979 | Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid |
| 980 | Technology and now in turn merged with Fujitsu. Say Y here to |
| 981 | support this machine type. |
| 982 | |
| 983 | config MACH_TX49XX |
| 984 | bool "Toshiba TX49 series based machines" |
| 985 | select WAR_TX49XX_ICACHE_INDEX_INV |
| 986 | |
| 987 | config MIKROTIK_RB532 |
| 988 | bool "Mikrotik RB532 boards" |
| 989 | select CEVT_R4K |
| 990 | select CSRC_R4K |
| 991 | select DMA_NONCOHERENT |
| 992 | select HAVE_PCI |
| 993 | select IRQ_MIPS_CPU |
| 994 | select SYS_HAS_CPU_MIPS32_R1 |
| 995 | select SYS_SUPPORTS_32BIT_KERNEL |
| 996 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 997 | select SWAP_IO_SPACE |
| 998 | select BOOT_RAW |
| 999 | select GPIOLIB |
| 1000 | select GPIOLIB_LEGACY |
| 1001 | select MIPS_L1_CACHE_SHIFT_4 |
| 1002 | help |
| 1003 | Support the Mikrotik(tm) RouterBoard 532 series, |
| 1004 | based on the IDT RC32434 SoC. |
| 1005 | |
| 1006 | config CAVIUM_OCTEON_SOC |
| 1007 | bool "Cavium Networks Octeon SoC based boards" |
| 1008 | select CEVT_R4K |
| 1009 | select ARCH_HAS_PHYS_TO_DMA |
| 1010 | select HAVE_RAPIDIO |
| 1011 | select PHYS_ADDR_T_64BIT |
| 1012 | select SYS_SUPPORTS_64BIT_KERNEL |
| 1013 | select SYS_SUPPORTS_BIG_ENDIAN |
| 1014 | select EDAC_SUPPORT |
| 1015 | select EDAC_ATOMIC_SCRUB |
| 1016 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| 1017 | select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN |
| 1018 | select SYS_HAS_EARLY_PRINTK |
| 1019 | select SYS_HAS_CPU_CAVIUM_OCTEON |
| 1020 | select HAVE_PCI |
| 1021 | select HAVE_PLAT_DELAY |
| 1022 | select HAVE_PLAT_FW_INIT_CMDLINE |
| 1023 | select HAVE_PLAT_MEMCPY |
| 1024 | select ZONE_DMA32 |
| 1025 | select GPIOLIB |
| 1026 | select USE_OF |
| 1027 | select ARCH_SPARSEMEM_ENABLE |
| 1028 | select SYS_SUPPORTS_SMP |
| 1029 | select NR_CPUS_DEFAULT_64 |
| 1030 | select MIPS_NR_CPU_NR_MAP_1024 |
| 1031 | select BUILTIN_DTB |
| 1032 | select MTD |
| 1033 | select MTD_COMPLEX_MAPPINGS |
| 1034 | select SWIOTLB |
| 1035 | select SYS_SUPPORTS_RELOCATABLE |
| 1036 | help |
| 1037 | This option supports all of the Octeon reference boards from Cavium |
| 1038 | Networks. It builds a kernel that dynamically determines the Octeon |
| 1039 | CPU type and supports all known board reference implementations. |
| 1040 | Some of the supported boards are: |
| 1041 | EBT3000 |
| 1042 | EBH3000 |
| 1043 | EBH3100 |
| 1044 | Thunder |
| 1045 | Kodama |
| 1046 | Hikari |
| 1047 | Say Y here for most Octeon reference boards. |
| 1048 | |
| 1049 | endchoice |
| 1050 | |
| 1051 | source "arch/mips/alchemy/Kconfig" |
| 1052 | source "arch/mips/ath25/Kconfig" |
| 1053 | source "arch/mips/ath79/Kconfig" |
| 1054 | source "arch/mips/bcm47xx/Kconfig" |
| 1055 | source "arch/mips/bcm63xx/Kconfig" |
| 1056 | source "arch/mips/bmips/Kconfig" |
| 1057 | source "arch/mips/econet/Kconfig" |
| 1058 | source "arch/mips/generic/Kconfig" |
| 1059 | source "arch/mips/ingenic/Kconfig" |
| 1060 | source "arch/mips/jazz/Kconfig" |
| 1061 | source "arch/mips/lantiq/Kconfig" |
| 1062 | source "arch/mips/mobileye/Kconfig" |
| 1063 | source "arch/mips/pic32/Kconfig" |
| 1064 | source "arch/mips/ralink/Kconfig" |
| 1065 | source "arch/mips/sgi-ip27/Kconfig" |
| 1066 | source "arch/mips/sibyte/Kconfig" |
| 1067 | source "arch/mips/txx9/Kconfig" |
| 1068 | source "arch/mips/cavium-octeon/Kconfig" |
| 1069 | source "arch/mips/loongson2ef/Kconfig" |
| 1070 | source "arch/mips/loongson32/Kconfig" |
| 1071 | source "arch/mips/loongson64/Kconfig" |
| 1072 | |
| 1073 | endmenu |
| 1074 | |
| 1075 | config GENERIC_HWEIGHT |
| 1076 | bool |
| 1077 | default y |
| 1078 | |
| 1079 | config GENERIC_CALIBRATE_DELAY |
| 1080 | bool |
| 1081 | default y |
| 1082 | |
| 1083 | config SCHED_OMIT_FRAME_POINTER |
| 1084 | bool |
| 1085 | default y |
| 1086 | |
| 1087 | # |
| 1088 | # Select some configuration options automatically based on user selections. |
| 1089 | # |
| 1090 | config FW_ARC |
| 1091 | bool |
| 1092 | |
| 1093 | config ARCH_MAY_HAVE_PC_FDC |
| 1094 | bool |
| 1095 | |
| 1096 | config BOOT_RAW |
| 1097 | bool |
| 1098 | |
| 1099 | config CEVT_BCM1480 |
| 1100 | bool |
| 1101 | |
| 1102 | config CEVT_DS1287 |
| 1103 | bool |
| 1104 | |
| 1105 | config CEVT_GT641XX |
| 1106 | bool |
| 1107 | |
| 1108 | config CEVT_R4K |
| 1109 | bool |
| 1110 | |
| 1111 | config CEVT_SB1250 |
| 1112 | bool |
| 1113 | |
| 1114 | config CEVT_TXX9 |
| 1115 | bool |
| 1116 | |
| 1117 | config CSRC_BCM1480 |
| 1118 | bool |
| 1119 | |
| 1120 | config CSRC_IOASIC |
| 1121 | bool |
| 1122 | |
| 1123 | config CSRC_R4K |
| 1124 | bool |
| 1125 | |
| 1126 | config CSRC_SB1250 |
| 1127 | bool |
| 1128 | |
| 1129 | config GPIO_TXX9 |
| 1130 | select GPIOLIB |
| 1131 | bool |
| 1132 | |
| 1133 | config FW_CFE |
| 1134 | bool |
| 1135 | |
| 1136 | config ARCH_SUPPORTS_UPROBES |
| 1137 | def_bool y |
| 1138 | |
| 1139 | config DMA_NONCOHERENT |
| 1140 | bool |
| 1141 | # |
| 1142 | # MIPS allows mixing "slightly different" Cacheability and Coherency |
| 1143 | # Attribute bits. It is believed that the uncached access through |
| 1144 | # KSEG1 and the implementation specific "uncached accelerated" used |
| 1145 | # by pgprot_writcombine can be mixed, and the latter sometimes provides |
| 1146 | # significant advantages. |
| 1147 | # |
| 1148 | select ARCH_HAS_SETUP_DMA_OPS |
| 1149 | select ARCH_HAS_DMA_WRITE_COMBINE |
| 1150 | select ARCH_HAS_DMA_PREP_COHERENT |
| 1151 | select ARCH_HAS_SYNC_DMA_FOR_CPU |
| 1152 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
| 1153 | select ARCH_HAS_DMA_SET_UNCACHED |
| 1154 | select DMA_NONCOHERENT_MMAP |
| 1155 | select NEED_DMA_MAP_STATE |
| 1156 | |
| 1157 | config SYS_HAS_EARLY_PRINTK |
| 1158 | bool |
| 1159 | |
| 1160 | config SYS_SUPPORTS_HOTPLUG_CPU |
| 1161 | bool |
| 1162 | |
| 1163 | config MIPS_BONITO64 |
| 1164 | bool |
| 1165 | |
| 1166 | config MIPS_MSC |
| 1167 | bool |
| 1168 | |
| 1169 | config SYNC_R4K |
| 1170 | bool |
| 1171 | |
| 1172 | config NO_IOPORT_MAP |
| 1173 | def_bool n |
| 1174 | |
| 1175 | config GENERIC_CSUM |
| 1176 | def_bool CPU_NO_LOAD_STORE_LR |
| 1177 | |
| 1178 | config GENERIC_ISA_DMA |
| 1179 | bool |
| 1180 | select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n |
| 1181 | select ISA_DMA_API |
| 1182 | |
| 1183 | config GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 1184 | bool |
| 1185 | select GENERIC_ISA_DMA |
| 1186 | |
| 1187 | config HAVE_PLAT_DELAY |
| 1188 | bool |
| 1189 | |
| 1190 | config HAVE_PLAT_FW_INIT_CMDLINE |
| 1191 | bool |
| 1192 | |
| 1193 | config HAVE_PLAT_MEMCPY |
| 1194 | bool |
| 1195 | |
| 1196 | config ISA_DMA_API |
| 1197 | bool |
| 1198 | |
| 1199 | config SYS_SUPPORTS_RELOCATABLE |
| 1200 | bool |
| 1201 | help |
| 1202 | Selected if the platform supports relocating the kernel. |
| 1203 | The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF |
| 1204 | to allow access to command line and entropy sources. |
| 1205 | |
| 1206 | # |
| 1207 | # Endianness selection. Sufficiently obscure so many users don't know what to |
| 1208 | # answer,so we try hard to limit the available choices. Also the use of a |
| 1209 | # choice statement should be more obvious to the user. |
| 1210 | # |
| 1211 | choice |
| 1212 | prompt "Endianness selection" |
| 1213 | help |
| 1214 | Some MIPS machines can be configured for either little or big endian |
| 1215 | byte order. These modes require different kernels and a different |
| 1216 | Linux distribution. In general there is one preferred byteorder for a |
| 1217 | particular system but some systems are just as commonly used in the |
| 1218 | one or the other endianness. |
| 1219 | |
| 1220 | config CPU_BIG_ENDIAN |
| 1221 | bool "Big endian" |
| 1222 | depends on SYS_SUPPORTS_BIG_ENDIAN |
| 1223 | |
| 1224 | config CPU_LITTLE_ENDIAN |
| 1225 | bool "Little endian" |
| 1226 | depends on SYS_SUPPORTS_LITTLE_ENDIAN |
| 1227 | |
| 1228 | endchoice |
| 1229 | |
| 1230 | config EXPORT_UASM |
| 1231 | bool |
| 1232 | |
| 1233 | config SYS_SUPPORTS_APM_EMULATION |
| 1234 | bool |
| 1235 | |
| 1236 | config SYS_SUPPORTS_BIG_ENDIAN |
| 1237 | bool |
| 1238 | |
| 1239 | config SYS_SUPPORTS_LITTLE_ENDIAN |
| 1240 | bool |
| 1241 | |
| 1242 | config MIPS_HUGE_TLB_SUPPORT |
| 1243 | def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE |
| 1244 | |
| 1245 | config IRQ_TXX9 |
| 1246 | bool |
| 1247 | |
| 1248 | config IRQ_GT641XX |
| 1249 | bool |
| 1250 | |
| 1251 | config PCI_GT64XXX_PCI0 |
| 1252 | bool |
| 1253 | |
| 1254 | config PCI_XTALK_BRIDGE |
| 1255 | bool |
| 1256 | |
| 1257 | config NO_EXCEPT_FILL |
| 1258 | bool |
| 1259 | |
| 1260 | config MIPS_SPRAM |
| 1261 | bool |
| 1262 | |
| 1263 | config SWAP_IO_SPACE |
| 1264 | bool |
| 1265 | |
| 1266 | config SGI_HAS_INDYDOG |
| 1267 | bool |
| 1268 | |
| 1269 | config SGI_HAS_HAL2 |
| 1270 | bool |
| 1271 | |
| 1272 | config SGI_HAS_SEEQ |
| 1273 | bool |
| 1274 | |
| 1275 | config SGI_HAS_WD93 |
| 1276 | bool |
| 1277 | |
| 1278 | config SGI_HAS_ZILOG |
| 1279 | bool |
| 1280 | |
| 1281 | config SGI_HAS_I8042 |
| 1282 | bool |
| 1283 | |
| 1284 | config DEFAULT_SGI_PARTITION |
| 1285 | bool |
| 1286 | |
| 1287 | config FW_ARC32 |
| 1288 | bool |
| 1289 | |
| 1290 | config FW_SNIPROM |
| 1291 | bool |
| 1292 | |
| 1293 | config BOOT_ELF32 |
| 1294 | bool |
| 1295 | |
| 1296 | config MIPS_L1_CACHE_SHIFT_4 |
| 1297 | bool |
| 1298 | |
| 1299 | config MIPS_L1_CACHE_SHIFT_5 |
| 1300 | bool |
| 1301 | |
| 1302 | config MIPS_L1_CACHE_SHIFT_6 |
| 1303 | bool |
| 1304 | |
| 1305 | config MIPS_L1_CACHE_SHIFT_7 |
| 1306 | bool |
| 1307 | |
| 1308 | config MIPS_L1_CACHE_SHIFT |
| 1309 | int |
| 1310 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
| 1311 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
| 1312 | default "5" if MIPS_L1_CACHE_SHIFT_5 |
| 1313 | default "4" if MIPS_L1_CACHE_SHIFT_4 |
| 1314 | default "5" |
| 1315 | |
| 1316 | config ARC_CMDLINE_ONLY |
| 1317 | bool |
| 1318 | |
| 1319 | config ARC_CONSOLE |
| 1320 | bool "ARC console support" |
| 1321 | depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
| 1322 | |
| 1323 | config ARC_MEMORY |
| 1324 | bool |
| 1325 | |
| 1326 | config ARC_PROMLIB |
| 1327 | bool |
| 1328 | |
| 1329 | config FW_ARC64 |
| 1330 | bool |
| 1331 | |
| 1332 | config BOOT_ELF64 |
| 1333 | bool |
| 1334 | |
| 1335 | menu "CPU selection" |
| 1336 | |
| 1337 | choice |
| 1338 | prompt "CPU type" |
| 1339 | default CPU_R4X00 |
| 1340 | |
| 1341 | config CPU_LOONGSON64 |
| 1342 | bool "Loongson 64-bit CPU" |
| 1343 | depends on SYS_HAS_CPU_LOONGSON64 |
| 1344 | select ARCH_HAS_PHYS_TO_DMA |
| 1345 | select CPU_MIPSR2 |
| 1346 | select CPU_HAS_PREFETCH |
| 1347 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1348 | select CPU_SUPPORTS_HIGHMEM |
| 1349 | select CPU_SUPPORTS_HUGEPAGES |
| 1350 | select CPU_SUPPORTS_MSA |
| 1351 | select CPU_SUPPORTS_VZ |
| 1352 | select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT |
| 1353 | select CPU_MIPSR2_IRQ_VI |
| 1354 | select DMA_NONCOHERENT |
| 1355 | select WEAK_ORDERING |
| 1356 | select WEAK_REORDERING_BEYOND_LLSC |
| 1357 | select MIPS_ASID_BITS_VARIABLE |
| 1358 | select MIPS_PGD_C0_CONTEXT |
| 1359 | select MIPS_L1_CACHE_SHIFT_6 |
| 1360 | select MIPS_FP_SUPPORT |
| 1361 | select GPIOLIB |
| 1362 | select SWIOTLB |
| 1363 | help |
| 1364 | The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor |
| 1365 | cores implements the MIPS64R2 instruction set with many extensions, |
| 1366 | including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, |
| 1367 | 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old |
| 1368 | Loongson-2E/2F is not covered here and will be removed in future. |
| 1369 | |
| 1370 | config CPU_LOONGSON2E |
| 1371 | bool "Loongson 2E" |
| 1372 | depends on SYS_HAS_CPU_LOONGSON2E |
| 1373 | select CPU_LOONGSON2EF |
| 1374 | help |
| 1375 | The Loongson 2E processor implements the MIPS III instruction set |
| 1376 | with many extensions. |
| 1377 | |
| 1378 | It has an internal FPGA northbridge, which is compatible to |
| 1379 | bonito64. |
| 1380 | |
| 1381 | config CPU_LOONGSON2F |
| 1382 | bool "Loongson 2F" |
| 1383 | depends on SYS_HAS_CPU_LOONGSON2F |
| 1384 | select CPU_LOONGSON2EF |
| 1385 | help |
| 1386 | The Loongson 2F processor implements the MIPS III instruction set |
| 1387 | with many extensions. |
| 1388 | |
| 1389 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller |
| 1390 | have a similar programming interface with FPGA northbridge used in |
| 1391 | Loongson2E. |
| 1392 | |
| 1393 | config CPU_LOONGSON32 |
| 1394 | bool "Loongson 32-bit CPU" |
| 1395 | depends on SYS_HAS_CPU_LOONGSON32 |
| 1396 | select CPU_MIPS32 |
| 1397 | select CPU_MIPSR2 |
| 1398 | select CPU_HAS_PREFETCH |
| 1399 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1400 | select CPU_SUPPORTS_HIGHMEM |
| 1401 | select CPU_SUPPORTS_CPUFREQ |
| 1402 | select LEDS_GPIO_REGISTER |
| 1403 | help |
| 1404 | The Loongson GS232 microarchitecture implements the MIPS32 Release 1 |
| 1405 | instruction set and part of the MIPS32 Release 2 instruction set. |
| 1406 | |
| 1407 | config CPU_MIPS32_R1 |
| 1408 | bool "MIPS32 Release 1" |
| 1409 | depends on SYS_HAS_CPU_MIPS32_R1 |
| 1410 | select CPU_HAS_PREFETCH |
| 1411 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1412 | select CPU_SUPPORTS_HIGHMEM |
| 1413 | help |
| 1414 | Choose this option to build a kernel for release 1 or later of the |
| 1415 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
| 1416 | MIPS processor are based on a MIPS32 processor. If you know the |
| 1417 | specific type of processor in your system, choose those that one |
| 1418 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. |
| 1419 | Release 2 of the MIPS32 architecture is available since several |
| 1420 | years so chances are you even have a MIPS32 Release 2 processor |
| 1421 | in which case you should choose CPU_MIPS32_R2 instead for better |
| 1422 | performance. |
| 1423 | |
| 1424 | config CPU_MIPS32_R2 |
| 1425 | bool "MIPS32 Release 2" |
| 1426 | depends on SYS_HAS_CPU_MIPS32_R2 |
| 1427 | select CPU_HAS_PREFETCH |
| 1428 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1429 | select CPU_SUPPORTS_HIGHMEM |
| 1430 | select CPU_SUPPORTS_MSA |
| 1431 | help |
| 1432 | Choose this option to build a kernel for release 2 or later of the |
| 1433 | MIPS32 architecture. Most modern embedded systems with a 32-bit |
| 1434 | MIPS processor are based on a MIPS32 processor. If you know the |
| 1435 | specific type of processor in your system, choose those that one |
| 1436 | otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. |
| 1437 | |
| 1438 | config CPU_MIPS32_R5 |
| 1439 | bool "MIPS32 Release 5" |
| 1440 | depends on SYS_HAS_CPU_MIPS32_R5 |
| 1441 | select CPU_HAS_PREFETCH |
| 1442 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1443 | select CPU_SUPPORTS_HIGHMEM |
| 1444 | select CPU_SUPPORTS_MSA |
| 1445 | select CPU_SUPPORTS_VZ |
| 1446 | select MIPS_O32_FP64_SUPPORT |
| 1447 | help |
| 1448 | Choose this option to build a kernel for release 5 or later of the |
| 1449 | MIPS32 architecture. New MIPS processors, starting with the Warrior |
| 1450 | family, are based on a MIPS32r5 processor. If you own an older |
| 1451 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. |
| 1452 | |
| 1453 | config CPU_MIPS32_R6 |
| 1454 | bool "MIPS32 Release 6" |
| 1455 | depends on SYS_HAS_CPU_MIPS32_R6 |
| 1456 | select CPU_HAS_PREFETCH |
| 1457 | select CPU_NO_LOAD_STORE_LR |
| 1458 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1459 | select CPU_SUPPORTS_HIGHMEM |
| 1460 | select CPU_SUPPORTS_MSA |
| 1461 | select CPU_SUPPORTS_VZ |
| 1462 | select MIPS_O32_FP64_SUPPORT |
| 1463 | help |
| 1464 | Choose this option to build a kernel for release 6 or later of the |
| 1465 | MIPS32 architecture. New MIPS processors, starting with the Warrior |
| 1466 | family, are based on a MIPS32r6 processor. If you own an older |
| 1467 | processor, you probably need to select MIPS32r1 or MIPS32r2 instead. |
| 1468 | |
| 1469 | config CPU_MIPS64_R1 |
| 1470 | bool "MIPS64 Release 1" |
| 1471 | depends on SYS_HAS_CPU_MIPS64_R1 |
| 1472 | select CPU_HAS_PREFETCH |
| 1473 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1474 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1475 | select CPU_SUPPORTS_HIGHMEM |
| 1476 | select CPU_SUPPORTS_HUGEPAGES |
| 1477 | help |
| 1478 | Choose this option to build a kernel for release 1 or later of the |
| 1479 | MIPS64 architecture. Many modern embedded systems with a 64-bit |
| 1480 | MIPS processor are based on a MIPS64 processor. If you know the |
| 1481 | specific type of processor in your system, choose those that one |
| 1482 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. |
| 1483 | Release 2 of the MIPS64 architecture is available since several |
| 1484 | years so chances are you even have a MIPS64 Release 2 processor |
| 1485 | in which case you should choose CPU_MIPS64_R2 instead for better |
| 1486 | performance. |
| 1487 | |
| 1488 | config CPU_MIPS64_R2 |
| 1489 | bool "MIPS64 Release 2" |
| 1490 | depends on SYS_HAS_CPU_MIPS64_R2 |
| 1491 | select CPU_HAS_PREFETCH |
| 1492 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1493 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1494 | select CPU_SUPPORTS_HIGHMEM |
| 1495 | select CPU_SUPPORTS_HUGEPAGES |
| 1496 | select CPU_SUPPORTS_MSA |
| 1497 | help |
| 1498 | Choose this option to build a kernel for release 2 or later of the |
| 1499 | MIPS64 architecture. Many modern embedded systems with a 64-bit |
| 1500 | MIPS processor are based on a MIPS64 processor. If you know the |
| 1501 | specific type of processor in your system, choose those that one |
| 1502 | otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. |
| 1503 | |
| 1504 | config CPU_MIPS64_R5 |
| 1505 | bool "MIPS64 Release 5" |
| 1506 | depends on SYS_HAS_CPU_MIPS64_R5 |
| 1507 | select CPU_HAS_PREFETCH |
| 1508 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1509 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1510 | select CPU_SUPPORTS_HIGHMEM |
| 1511 | select CPU_SUPPORTS_HUGEPAGES |
| 1512 | select CPU_SUPPORTS_MSA |
| 1513 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
| 1514 | select CPU_SUPPORTS_VZ |
| 1515 | help |
| 1516 | Choose this option to build a kernel for release 5 or later of the |
| 1517 | MIPS64 architecture. This is a intermediate MIPS architecture |
| 1518 | release partly implementing release 6 features. Though there is no |
| 1519 | any hardware known to be based on this release. |
| 1520 | |
| 1521 | config CPU_MIPS64_R6 |
| 1522 | bool "MIPS64 Release 6" |
| 1523 | depends on SYS_HAS_CPU_MIPS64_R6 |
| 1524 | select CPU_HAS_PREFETCH |
| 1525 | select CPU_NO_LOAD_STORE_LR |
| 1526 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1527 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1528 | select CPU_SUPPORTS_HIGHMEM |
| 1529 | select CPU_SUPPORTS_HUGEPAGES |
| 1530 | select CPU_SUPPORTS_MSA |
| 1531 | select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
| 1532 | select CPU_SUPPORTS_VZ |
| 1533 | help |
| 1534 | Choose this option to build a kernel for release 6 or later of the |
| 1535 | MIPS64 architecture. New MIPS processors, starting with the Warrior |
| 1536 | family, are based on a MIPS64r6 processor. If you own an older |
| 1537 | processor, you probably need to select MIPS64r1 or MIPS64r2 instead. |
| 1538 | |
| 1539 | config CPU_P5600 |
| 1540 | bool "MIPS Warrior P5600" |
| 1541 | depends on SYS_HAS_CPU_P5600 |
| 1542 | select CPU_HAS_PREFETCH |
| 1543 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1544 | select CPU_SUPPORTS_HIGHMEM |
| 1545 | select CPU_SUPPORTS_MSA |
| 1546 | select CPU_SUPPORTS_CPUFREQ |
| 1547 | select CPU_SUPPORTS_VZ |
| 1548 | select CPU_MIPSR2_IRQ_VI |
| 1549 | select CPU_MIPSR2_IRQ_EI |
| 1550 | select MIPS_O32_FP64_SUPPORT |
| 1551 | help |
| 1552 | Choose this option to build a kernel for MIPS Warrior P5600 CPU. |
| 1553 | It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes, |
| 1554 | MMU with two-levels TLB, UCA, MSA, MDU core level features and system |
| 1555 | level features like up to six P5600 calculation cores, CM2 with L2 |
| 1556 | cache, IOCU/IOMMU (though might be unused depending on the system- |
| 1557 | specific IP core configuration), GIC, CPC, virtualisation module, |
| 1558 | eJTAG and PDtrace. |
| 1559 | |
| 1560 | config CPU_R3000 |
| 1561 | bool "R3000" |
| 1562 | depends on SYS_HAS_CPU_R3000 |
| 1563 | select CPU_HAS_WB |
| 1564 | select CPU_R3K_TLB |
| 1565 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1566 | select CPU_SUPPORTS_HIGHMEM |
| 1567 | help |
| 1568 | Please make sure to pick the right CPU type. Linux/MIPS is not |
| 1569 | designed to be generic, i.e. Kernels compiled for R3000 CPUs will |
| 1570 | *not* work on R4000 machines and vice versa. However, since most |
| 1571 | of the supported machines have an R4000 (or similar) CPU, R4x00 |
| 1572 | might be a safe bet. If the resulting kernel does not work, |
| 1573 | try to recompile with R3000. |
| 1574 | |
| 1575 | config CPU_R4300 |
| 1576 | bool "R4300" |
| 1577 | depends on SYS_HAS_CPU_R4300 |
| 1578 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1579 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1580 | help |
| 1581 | MIPS Technologies R4300-series processors. |
| 1582 | |
| 1583 | config CPU_R4X00 |
| 1584 | bool "R4x00" |
| 1585 | depends on SYS_HAS_CPU_R4X00 |
| 1586 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1587 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1588 | select CPU_SUPPORTS_HUGEPAGES |
| 1589 | help |
| 1590 | MIPS Technologies R4000-series processors other than 4300, including |
| 1591 | the R4000, R4400, R4600, and 4700. |
| 1592 | |
| 1593 | config CPU_TX49XX |
| 1594 | bool "R49XX" |
| 1595 | depends on SYS_HAS_CPU_TX49XX |
| 1596 | select CPU_HAS_PREFETCH |
| 1597 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1598 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1599 | select CPU_SUPPORTS_HUGEPAGES |
| 1600 | |
| 1601 | config CPU_R5000 |
| 1602 | bool "R5000" |
| 1603 | depends on SYS_HAS_CPU_R5000 |
| 1604 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1605 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1606 | select CPU_SUPPORTS_HUGEPAGES |
| 1607 | help |
| 1608 | MIPS Technologies R5000-series processors other than the Nevada. |
| 1609 | |
| 1610 | config CPU_R5500 |
| 1611 | bool "R5500" |
| 1612 | depends on SYS_HAS_CPU_R5500 |
| 1613 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1614 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1615 | select CPU_SUPPORTS_HUGEPAGES |
| 1616 | help |
| 1617 | NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV |
| 1618 | instruction set. |
| 1619 | |
| 1620 | config CPU_NEVADA |
| 1621 | bool "RM52xx" |
| 1622 | depends on SYS_HAS_CPU_NEVADA |
| 1623 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1624 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1625 | select CPU_SUPPORTS_HUGEPAGES |
| 1626 | help |
| 1627 | QED / PMC-Sierra RM52xx-series ("Nevada") processors. |
| 1628 | |
| 1629 | config CPU_R10000 |
| 1630 | bool "R10000" |
| 1631 | depends on SYS_HAS_CPU_R10000 |
| 1632 | select CPU_HAS_PREFETCH |
| 1633 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1634 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1635 | select CPU_SUPPORTS_HIGHMEM |
| 1636 | select CPU_SUPPORTS_HUGEPAGES |
| 1637 | help |
| 1638 | MIPS Technologies R10000-series processors. |
| 1639 | |
| 1640 | config CPU_RM7000 |
| 1641 | bool "RM7000" |
| 1642 | depends on SYS_HAS_CPU_RM7000 |
| 1643 | select CPU_HAS_PREFETCH |
| 1644 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1645 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1646 | select CPU_SUPPORTS_HIGHMEM |
| 1647 | select CPU_SUPPORTS_HUGEPAGES |
| 1648 | |
| 1649 | config CPU_SB1 |
| 1650 | bool "SB1" |
| 1651 | depends on SYS_HAS_CPU_SB1 |
| 1652 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1653 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1654 | select CPU_SUPPORTS_HIGHMEM |
| 1655 | select CPU_SUPPORTS_HUGEPAGES |
| 1656 | select WEAK_ORDERING |
| 1657 | |
| 1658 | config CPU_CAVIUM_OCTEON |
| 1659 | bool "Cavium Octeon processor" |
| 1660 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
| 1661 | select CPU_HAS_PREFETCH |
| 1662 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1663 | select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48 |
| 1664 | select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48 |
| 1665 | select WEAK_ORDERING |
| 1666 | select CPU_SUPPORTS_HIGHMEM |
| 1667 | select CPU_SUPPORTS_HUGEPAGES |
| 1668 | select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 1669 | select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| 1670 | select MIPS_L1_CACHE_SHIFT_7 |
| 1671 | select CPU_SUPPORTS_VZ |
| 1672 | help |
| 1673 | The Cavium Octeon processor is a highly integrated chip containing |
| 1674 | many ethernet hardware widgets for networking tasks. The processor |
| 1675 | can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. |
| 1676 | Full details can be found at http://www.caviumnetworks.com. |
| 1677 | |
| 1678 | config CPU_BMIPS |
| 1679 | bool "Broadcom BMIPS" |
| 1680 | depends on SYS_HAS_CPU_BMIPS |
| 1681 | select CPU_MIPS32 |
| 1682 | select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
| 1683 | select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
| 1684 | select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 |
| 1685 | select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 |
| 1686 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1687 | select DMA_NONCOHERENT |
| 1688 | select IRQ_MIPS_CPU |
| 1689 | select SWAP_IO_SPACE |
| 1690 | select WEAK_ORDERING |
| 1691 | select CPU_SUPPORTS_HIGHMEM |
| 1692 | select CPU_HAS_PREFETCH |
| 1693 | select CPU_SUPPORTS_CPUFREQ |
| 1694 | select MIPS_EXTERNAL_TIMER |
| 1695 | select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU |
| 1696 | help |
| 1697 | Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
| 1698 | |
| 1699 | endchoice |
| 1700 | |
| 1701 | config LOONGSON3_ENHANCEMENT |
| 1702 | bool "New Loongson-3 CPU Enhancements" |
| 1703 | default n |
| 1704 | depends on CPU_LOONGSON64 |
| 1705 | help |
| 1706 | New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A |
| 1707 | R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as |
| 1708 | FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User |
| 1709 | Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), |
| 1710 | Fast TLB refill support, etc. |
| 1711 | |
| 1712 | This option enable those enhancements which are not probed at run |
| 1713 | time. If you want a generic kernel to run on all Loongson 3 machines, |
| 1714 | please say 'N' here. If you want a high-performance kernel to run on |
| 1715 | new Loongson-3 machines only, please say 'Y' here. |
| 1716 | |
| 1717 | config CPU_LOONGSON3_WORKAROUNDS |
| 1718 | bool "Loongson-3 LLSC Workarounds" |
| 1719 | default y if SMP |
| 1720 | depends on CPU_LOONGSON64 |
| 1721 | help |
| 1722 | Loongson-3 processors have the llsc issues which require workarounds. |
| 1723 | Without workarounds the system may hang unexpectedly. |
| 1724 | |
| 1725 | Say Y, unless you know what you are doing. |
| 1726 | |
| 1727 | config CPU_LOONGSON3_CPUCFG_EMULATION |
| 1728 | bool "Emulate the CPUCFG instruction on older Loongson cores" |
| 1729 | default y |
| 1730 | depends on CPU_LOONGSON64 |
| 1731 | help |
| 1732 | Loongson-3A R4 and newer have the CPUCFG instruction available for |
| 1733 | userland to query CPU capabilities, much like CPUID on x86. This |
| 1734 | option provides emulation of the instruction on older Loongson |
| 1735 | cores, back to Loongson-3A1000. |
| 1736 | |
| 1737 | If unsure, please say Y. |
| 1738 | |
| 1739 | config CPU_MIPS32_3_5_FEATURES |
| 1740 | bool "MIPS32 Release 3.5 Features" |
| 1741 | depends on SYS_HAS_CPU_MIPS32_R3_5 |
| 1742 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \ |
| 1743 | CPU_P5600 |
| 1744 | help |
| 1745 | Choose this option to build a kernel for release 2 or later of the |
| 1746 | MIPS32 architecture including features from the 3.5 release such as |
| 1747 | support for Enhanced Virtual Addressing (EVA). |
| 1748 | |
| 1749 | config CPU_MIPS32_3_5_EVA |
| 1750 | bool "Enhanced Virtual Addressing (EVA)" |
| 1751 | depends on CPU_MIPS32_3_5_FEATURES |
| 1752 | select EVA |
| 1753 | default y |
| 1754 | help |
| 1755 | Choose this option if you want to enable the Enhanced Virtual |
| 1756 | Addressing (EVA) on your MIPS32 core (such as proAptiv). |
| 1757 | One of its primary benefits is an increase in the maximum size |
| 1758 | of lowmem (up to 3GB). If unsure, say 'N' here. |
| 1759 | |
| 1760 | config CPU_MIPS32_R5_FEATURES |
| 1761 | bool "MIPS32 Release 5 Features" |
| 1762 | depends on SYS_HAS_CPU_MIPS32_R5 |
| 1763 | depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600 |
| 1764 | help |
| 1765 | Choose this option to build a kernel for release 2 or later of the |
| 1766 | MIPS32 architecture including features from release 5 such as |
| 1767 | support for Extended Physical Addressing (XPA). |
| 1768 | |
| 1769 | config CPU_MIPS32_R5_XPA |
| 1770 | bool "Extended Physical Addressing (XPA)" |
| 1771 | depends on CPU_MIPS32_R5_FEATURES |
| 1772 | depends on !EVA |
| 1773 | depends on !PAGE_SIZE_4KB |
| 1774 | depends on SYS_SUPPORTS_HIGHMEM |
| 1775 | select XPA |
| 1776 | select HIGHMEM |
| 1777 | select PHYS_ADDR_T_64BIT |
| 1778 | default n |
| 1779 | help |
| 1780 | Choose this option if you want to enable the Extended Physical |
| 1781 | Addressing (XPA) on your MIPS32 core (such as P5600 series). The |
| 1782 | benefit is to increase physical addressing equal to or greater |
| 1783 | than 40 bits. Note that this has the side effect of turning on |
| 1784 | 64-bit addressing which in turn makes the PTEs 64-bit in size. |
| 1785 | If unsure, say 'N' here. |
| 1786 | |
| 1787 | if CPU_LOONGSON2F |
| 1788 | config CPU_NOP_WORKAROUNDS |
| 1789 | bool |
| 1790 | |
| 1791 | config CPU_JUMP_WORKAROUNDS |
| 1792 | bool |
| 1793 | |
| 1794 | config CPU_LOONGSON2F_WORKAROUNDS |
| 1795 | bool "Loongson 2F Workarounds" |
| 1796 | default y |
| 1797 | select CPU_NOP_WORKAROUNDS |
| 1798 | select CPU_JUMP_WORKAROUNDS |
| 1799 | help |
| 1800 | Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which |
| 1801 | require workarounds. Without workarounds the system may hang |
| 1802 | unexpectedly. For more information please refer to the gas |
| 1803 | -mfix-loongson2f-nop and -mfix-loongson2f-jump options. |
| 1804 | |
| 1805 | Loongson 2F03 and later have fixed these issues and no workarounds |
| 1806 | are needed. The workarounds have no significant side effect on them |
| 1807 | but may decrease the performance of the system so this option should |
| 1808 | be disabled unless the kernel is intended to be run on 2F01 or 2F02 |
| 1809 | systems. |
| 1810 | |
| 1811 | If unsure, please say Y. |
| 1812 | endif # CPU_LOONGSON2F |
| 1813 | |
| 1814 | config SYS_SUPPORTS_ZBOOT |
| 1815 | bool |
| 1816 | select HAVE_KERNEL_GZIP |
| 1817 | select HAVE_KERNEL_BZIP2 |
| 1818 | select HAVE_KERNEL_LZ4 |
| 1819 | select HAVE_KERNEL_LZMA |
| 1820 | select HAVE_KERNEL_LZO |
| 1821 | select HAVE_KERNEL_XZ |
| 1822 | select HAVE_KERNEL_ZSTD |
| 1823 | |
| 1824 | config SYS_SUPPORTS_ZBOOT_UART16550 |
| 1825 | bool |
| 1826 | select SYS_SUPPORTS_ZBOOT |
| 1827 | |
| 1828 | config SYS_SUPPORTS_ZBOOT_UART_PROM |
| 1829 | bool |
| 1830 | select SYS_SUPPORTS_ZBOOT |
| 1831 | |
| 1832 | config CPU_LOONGSON2EF |
| 1833 | bool |
| 1834 | select CPU_SUPPORTS_32BIT_KERNEL |
| 1835 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1836 | select CPU_SUPPORTS_HIGHMEM |
| 1837 | select CPU_SUPPORTS_HUGEPAGES |
| 1838 | select RTC_MC146818_LIB |
| 1839 | |
| 1840 | config CPU_BMIPS32_3300 |
| 1841 | select SMP_UP if SMP |
| 1842 | bool |
| 1843 | |
| 1844 | config CPU_BMIPS4350 |
| 1845 | bool |
| 1846 | select SYS_SUPPORTS_SMP |
| 1847 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 1848 | |
| 1849 | config CPU_BMIPS4380 |
| 1850 | bool |
| 1851 | select MIPS_L1_CACHE_SHIFT_6 |
| 1852 | select SYS_SUPPORTS_SMP |
| 1853 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 1854 | select CPU_HAS_RIXI |
| 1855 | |
| 1856 | config CPU_BMIPS5000 |
| 1857 | bool |
| 1858 | select MIPS_CPU_SCACHE |
| 1859 | select MIPS_L1_CACHE_SHIFT_7 |
| 1860 | select SYS_SUPPORTS_SMP |
| 1861 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 1862 | select CPU_HAS_RIXI |
| 1863 | |
| 1864 | config SYS_HAS_CPU_LOONGSON64 |
| 1865 | bool |
| 1866 | select CPU_SUPPORTS_CPUFREQ |
| 1867 | select CPU_HAS_RIXI |
| 1868 | |
| 1869 | config SYS_HAS_CPU_LOONGSON2E |
| 1870 | bool |
| 1871 | |
| 1872 | config SYS_HAS_CPU_LOONGSON2F |
| 1873 | bool |
| 1874 | select CPU_SUPPORTS_CPUFREQ |
| 1875 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT |
| 1876 | |
| 1877 | config SYS_HAS_CPU_LOONGSON32 |
| 1878 | bool |
| 1879 | |
| 1880 | config SYS_HAS_CPU_MIPS32_R1 |
| 1881 | bool |
| 1882 | |
| 1883 | config SYS_HAS_CPU_MIPS32_R2 |
| 1884 | bool |
| 1885 | |
| 1886 | config SYS_HAS_CPU_MIPS32_R3_5 |
| 1887 | bool |
| 1888 | |
| 1889 | config SYS_HAS_CPU_MIPS32_R5 |
| 1890 | bool |
| 1891 | |
| 1892 | config SYS_HAS_CPU_MIPS32_R6 |
| 1893 | bool |
| 1894 | |
| 1895 | config SYS_HAS_CPU_MIPS64_R1 |
| 1896 | bool |
| 1897 | |
| 1898 | config SYS_HAS_CPU_MIPS64_R2 |
| 1899 | bool |
| 1900 | |
| 1901 | config SYS_HAS_CPU_MIPS64_R5 |
| 1902 | bool |
| 1903 | |
| 1904 | config SYS_HAS_CPU_MIPS64_R6 |
| 1905 | bool |
| 1906 | |
| 1907 | config SYS_HAS_CPU_P5600 |
| 1908 | bool |
| 1909 | |
| 1910 | config SYS_HAS_CPU_R3000 |
| 1911 | bool |
| 1912 | |
| 1913 | config SYS_HAS_CPU_R4300 |
| 1914 | bool |
| 1915 | |
| 1916 | config SYS_HAS_CPU_R4X00 |
| 1917 | bool |
| 1918 | |
| 1919 | config SYS_HAS_CPU_TX49XX |
| 1920 | bool |
| 1921 | |
| 1922 | config SYS_HAS_CPU_R5000 |
| 1923 | bool |
| 1924 | |
| 1925 | config SYS_HAS_CPU_R5500 |
| 1926 | bool |
| 1927 | |
| 1928 | config SYS_HAS_CPU_NEVADA |
| 1929 | bool |
| 1930 | |
| 1931 | config SYS_HAS_CPU_R10000 |
| 1932 | bool |
| 1933 | |
| 1934 | config SYS_HAS_CPU_RM7000 |
| 1935 | bool |
| 1936 | |
| 1937 | config SYS_HAS_CPU_SB1 |
| 1938 | bool |
| 1939 | |
| 1940 | config SYS_HAS_CPU_CAVIUM_OCTEON |
| 1941 | bool |
| 1942 | |
| 1943 | config SYS_HAS_CPU_BMIPS |
| 1944 | bool |
| 1945 | |
| 1946 | config SYS_HAS_CPU_BMIPS32_3300 |
| 1947 | bool |
| 1948 | select SYS_HAS_CPU_BMIPS |
| 1949 | |
| 1950 | config SYS_HAS_CPU_BMIPS4350 |
| 1951 | bool |
| 1952 | select SYS_HAS_CPU_BMIPS |
| 1953 | |
| 1954 | config SYS_HAS_CPU_BMIPS4380 |
| 1955 | bool |
| 1956 | select SYS_HAS_CPU_BMIPS |
| 1957 | |
| 1958 | config SYS_HAS_CPU_BMIPS5000 |
| 1959 | bool |
| 1960 | select SYS_HAS_CPU_BMIPS |
| 1961 | |
| 1962 | # |
| 1963 | # CPU may reorder R->R, R->W, W->R, W->W |
| 1964 | # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC |
| 1965 | # |
| 1966 | config WEAK_ORDERING |
| 1967 | bool |
| 1968 | |
| 1969 | # |
| 1970 | # CPU may reorder reads and writes beyond LL/SC |
| 1971 | # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC |
| 1972 | # |
| 1973 | config WEAK_REORDERING_BEYOND_LLSC |
| 1974 | bool |
| 1975 | endmenu |
| 1976 | |
| 1977 | # |
| 1978 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
| 1979 | # |
| 1980 | config CPU_MIPS32 |
| 1981 | bool |
| 1982 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \ |
| 1983 | CPU_MIPS32_R6 || CPU_P5600 |
| 1984 | |
| 1985 | config CPU_MIPS64 |
| 1986 | bool |
| 1987 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \ |
| 1988 | CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON |
| 1989 | |
| 1990 | # |
| 1991 | # These indicate the revision of the architecture |
| 1992 | # |
| 1993 | config CPU_MIPSR1 |
| 1994 | bool |
| 1995 | default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 |
| 1996 | |
| 1997 | config CPU_MIPSR2 |
| 1998 | bool |
| 1999 | default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
| 2000 | select CPU_HAS_RIXI |
| 2001 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
| 2002 | select MIPS_SPRAM |
| 2003 | |
| 2004 | config CPU_MIPSR5 |
| 2005 | bool |
| 2006 | default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600 |
| 2007 | select CPU_HAS_RIXI |
| 2008 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
| 2009 | select MIPS_SPRAM |
| 2010 | |
| 2011 | config CPU_MIPSR6 |
| 2012 | bool |
| 2013 | default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 |
| 2014 | select CPU_HAS_RIXI |
| 2015 | select CPU_HAS_DIEI if !CPU_DIEI_BROKEN |
| 2016 | select HAVE_ARCH_BITREVERSE if BITREVERSE |
| 2017 | select MIPS_ASID_BITS_VARIABLE |
| 2018 | select MIPS_SPRAM |
| 2019 | |
| 2020 | config TARGET_ISA_REV |
| 2021 | int |
| 2022 | default 1 if CPU_MIPSR1 |
| 2023 | default 2 if CPU_MIPSR2 |
| 2024 | default 5 if CPU_MIPSR5 |
| 2025 | default 6 if CPU_MIPSR6 |
| 2026 | default 0 |
| 2027 | help |
| 2028 | Reflects the ISA revision being targeted by the kernel build. This |
| 2029 | is effectively the Kconfig equivalent of MIPS_ISA_REV. |
| 2030 | |
| 2031 | config EVA |
| 2032 | bool |
| 2033 | |
| 2034 | config XPA |
| 2035 | bool |
| 2036 | |
| 2037 | config SYS_SUPPORTS_32BIT_KERNEL |
| 2038 | bool |
| 2039 | config SYS_SUPPORTS_64BIT_KERNEL |
| 2040 | bool |
| 2041 | config CPU_SUPPORTS_32BIT_KERNEL |
| 2042 | bool |
| 2043 | config CPU_SUPPORTS_64BIT_KERNEL |
| 2044 | bool |
| 2045 | config CPU_SUPPORTS_CPUFREQ |
| 2046 | bool |
| 2047 | config CPU_SUPPORTS_ADDRWINCFG |
| 2048 | bool |
| 2049 | config CPU_SUPPORTS_HUGEPAGES |
| 2050 | bool |
| 2051 | depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA)) |
| 2052 | config CPU_SUPPORTS_VZ |
| 2053 | bool |
| 2054 | config MIPS_PGD_C0_CONTEXT |
| 2055 | bool |
| 2056 | depends on 64BIT |
| 2057 | default y if (CPU_MIPSR2 || CPU_MIPSR6) |
| 2058 | |
| 2059 | # |
| 2060 | # Set to y for ptrace access to watch registers. |
| 2061 | # |
| 2062 | config HARDWARE_WATCHPOINTS |
| 2063 | bool |
| 2064 | default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 |
| 2065 | |
| 2066 | menu "Kernel type" |
| 2067 | |
| 2068 | choice |
| 2069 | prompt "Kernel code model" |
| 2070 | help |
| 2071 | You should only select this option if you have a workload that |
| 2072 | actually benefits from 64-bit processing or if your machine has |
| 2073 | large memory. You will only be presented a single option in this |
| 2074 | menu if your system does not support both 32-bit and 64-bit kernels. |
| 2075 | |
| 2076 | config 32BIT |
| 2077 | bool "32-bit kernel" |
| 2078 | depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL |
| 2079 | select TRAD_SIGNALS |
| 2080 | help |
| 2081 | Select this option if you want to build a 32-bit kernel. |
| 2082 | |
| 2083 | config 64BIT |
| 2084 | bool "64-bit kernel" |
| 2085 | depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL |
| 2086 | help |
| 2087 | Select this option if you want to build a 64-bit kernel. |
| 2088 | |
| 2089 | endchoice |
| 2090 | |
| 2091 | config MIPS_VA_BITS_48 |
| 2092 | bool "48 bits virtual memory" |
| 2093 | depends on 64BIT |
| 2094 | help |
| 2095 | Support a maximum at least 48 bits of application virtual |
| 2096 | memory. Default is 40 bits or less, depending on the CPU. |
| 2097 | For page sizes 16k and above, this option results in a small |
| 2098 | memory overhead for page tables. For 4k page size, a fourth |
| 2099 | level of page tables is added which imposes both a memory |
| 2100 | overhead as well as slower TLB fault handling. |
| 2101 | |
| 2102 | If unsure, say N. |
| 2103 | |
| 2104 | config ZBOOT_LOAD_ADDRESS |
| 2105 | hex "Compressed kernel load address" |
| 2106 | default 0xffffffff80400000 if BCM47XX |
| 2107 | default 0x0 |
| 2108 | depends on SYS_SUPPORTS_ZBOOT |
| 2109 | help |
| 2110 | The address to load compressed kernel, aka vmlinuz. |
| 2111 | |
| 2112 | This is only used if non-zero. |
| 2113 | |
| 2114 | config ARCH_FORCE_MAX_ORDER |
| 2115 | int "Maximum zone order" |
| 2116 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
| 2117 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
| 2118 | default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
| 2119 | default "10" |
| 2120 | help |
| 2121 | The kernel memory allocator divides physically contiguous memory |
| 2122 | blocks into "zones", where each zone is a power of two number of |
| 2123 | pages. This option selects the largest power of two that the kernel |
| 2124 | keeps in the memory allocator. If you need to allocate very large |
| 2125 | blocks of physically contiguous memory, then you may need to |
| 2126 | increase this value. |
| 2127 | |
| 2128 | The page size is not necessarily 4KB. Keep this in mind |
| 2129 | when choosing a value for this option. |
| 2130 | |
| 2131 | config BOARD_SCACHE |
| 2132 | bool |
| 2133 | |
| 2134 | config IP22_CPU_SCACHE |
| 2135 | bool |
| 2136 | select BOARD_SCACHE |
| 2137 | |
| 2138 | # |
| 2139 | # Support for a MIPS32 / MIPS64 style S-caches |
| 2140 | # |
| 2141 | config MIPS_CPU_SCACHE |
| 2142 | bool |
| 2143 | select BOARD_SCACHE |
| 2144 | |
| 2145 | config R5000_CPU_SCACHE |
| 2146 | bool |
| 2147 | select BOARD_SCACHE |
| 2148 | |
| 2149 | config RM7000_CPU_SCACHE |
| 2150 | bool |
| 2151 | select BOARD_SCACHE |
| 2152 | |
| 2153 | config SIBYTE_DMA_PAGEOPS |
| 2154 | bool "Use DMA to clear/copy pages" |
| 2155 | depends on CPU_SB1 |
| 2156 | help |
| 2157 | Instead of using the CPU to zero and copy pages, use a Data Mover |
| 2158 | channel. These DMA channels are otherwise unused by the standard |
| 2159 | SiByte Linux port. Seems to give a small performance benefit. |
| 2160 | |
| 2161 | config CPU_HAS_PREFETCH |
| 2162 | bool |
| 2163 | |
| 2164 | config CPU_GENERIC_DUMP_TLB |
| 2165 | bool |
| 2166 | default y if !CPU_R3000 |
| 2167 | |
| 2168 | config MIPS_FP_SUPPORT |
| 2169 | bool "Floating Point support" if EXPERT |
| 2170 | default y |
| 2171 | help |
| 2172 | Select y to include support for floating point in the kernel |
| 2173 | including initialization of FPU hardware, FP context save & restore |
| 2174 | and emulation of an FPU where necessary. Without this support any |
| 2175 | userland program attempting to use floating point instructions will |
| 2176 | receive a SIGILL. |
| 2177 | |
| 2178 | If you know that your userland will not attempt to use floating point |
| 2179 | instructions then you can say n here to shrink the kernel a little. |
| 2180 | |
| 2181 | If unsure, say y. |
| 2182 | |
| 2183 | config CPU_R2300_FPU |
| 2184 | bool |
| 2185 | depends on MIPS_FP_SUPPORT |
| 2186 | default y if CPU_R3000 |
| 2187 | |
| 2188 | config CPU_R3K_TLB |
| 2189 | bool |
| 2190 | |
| 2191 | config CPU_R4K_FPU |
| 2192 | bool |
| 2193 | depends on MIPS_FP_SUPPORT |
| 2194 | default y if !CPU_R2300_FPU |
| 2195 | |
| 2196 | config CPU_R4K_CACHE_TLB |
| 2197 | bool |
| 2198 | default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) |
| 2199 | |
| 2200 | config MIPS_MT_SMP |
| 2201 | bool "MIPS MT SMP support (1 TC on each available VPE)" |
| 2202 | default y |
| 2203 | depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6 |
| 2204 | depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS |
| 2205 | select CPU_MIPSR2_IRQ_VI |
| 2206 | select CPU_MIPSR2_IRQ_EI |
| 2207 | select SYNC_R4K |
| 2208 | select MIPS_MT |
| 2209 | select SMP |
| 2210 | select SMP_UP |
| 2211 | select SYS_SUPPORTS_SMP |
| 2212 | select ARCH_SUPPORTS_SCHED_SMT |
| 2213 | select MIPS_PERF_SHARED_TC_COUNTERS |
| 2214 | help |
| 2215 | This is a kernel model which is known as SMVP. This is supported |
| 2216 | on cores with the MT ASE and uses the available VPEs to implement |
| 2217 | virtual processors which supports SMP. This is equivalent to the |
| 2218 | Intel Hyperthreading feature. For further information go to |
| 2219 | <http://www.imgtec.com/mips/mips-multithreading.asp>. |
| 2220 | |
| 2221 | config MIPS_MT |
| 2222 | bool |
| 2223 | |
| 2224 | config SYS_SUPPORTS_MULTITHREADING |
| 2225 | bool |
| 2226 | |
| 2227 | config MIPS_MT_FPAFF |
| 2228 | bool "Dynamic FPU affinity for FP-intensive threads" |
| 2229 | default y |
| 2230 | depends on MIPS_MT_SMP |
| 2231 | |
| 2232 | config MIPSR2_TO_R6_EMULATOR |
| 2233 | bool "MIPS R2-to-R6 emulator" |
| 2234 | depends on CPU_MIPSR6 |
| 2235 | depends on MIPS_FP_SUPPORT |
| 2236 | default y |
| 2237 | help |
| 2238 | Choose this option if you want to run non-R6 MIPS userland code. |
| 2239 | Even if you say 'Y' here, the emulator will still be disabled by |
| 2240 | default. You can enable it using the 'mipsr2emu' kernel option. |
| 2241 | The only reason this is a build-time option is to save ~14K from the |
| 2242 | final kernel image. |
| 2243 | |
| 2244 | config SYS_SUPPORTS_VPE_LOADER |
| 2245 | bool |
| 2246 | depends on SYS_SUPPORTS_MULTITHREADING |
| 2247 | help |
| 2248 | Indicates that the platform supports the VPE loader, and provides |
| 2249 | physical_memsize. |
| 2250 | |
| 2251 | config MIPS_VPE_LOADER |
| 2252 | bool "VPE loader support." |
| 2253 | depends on SYS_SUPPORTS_VPE_LOADER && MODULES |
| 2254 | select CPU_MIPSR2_IRQ_VI |
| 2255 | select CPU_MIPSR2_IRQ_EI |
| 2256 | select MIPS_MT |
| 2257 | help |
| 2258 | Includes a loader for loading an elf relocatable object |
| 2259 | onto another VPE and running it. |
| 2260 | |
| 2261 | config MIPS_VPE_LOADER_MT |
| 2262 | bool |
| 2263 | default "y" |
| 2264 | depends on MIPS_VPE_LOADER |
| 2265 | |
| 2266 | config MIPS_VPE_LOADER_TOM |
| 2267 | bool "Load VPE program into memory hidden from linux" |
| 2268 | depends on MIPS_VPE_LOADER |
| 2269 | default y |
| 2270 | help |
| 2271 | The loader can use memory that is present but has been hidden from |
| 2272 | Linux using the kernel command line option "mem=xxMB". It's up to |
| 2273 | you to ensure the amount you put in the option and the space your |
| 2274 | program requires is less or equal to the amount physically present. |
| 2275 | |
| 2276 | config MIPS_VPE_APSP_API |
| 2277 | bool "Enable support for AP/SP API (RTLX)" |
| 2278 | depends on MIPS_VPE_LOADER |
| 2279 | |
| 2280 | config MIPS_VPE_APSP_API_MT |
| 2281 | bool |
| 2282 | default "y" |
| 2283 | depends on MIPS_VPE_APSP_API |
| 2284 | |
| 2285 | config MIPS_CPS |
| 2286 | bool "MIPS Coherent Processing System support" |
| 2287 | depends on SYS_SUPPORTS_MIPS_CPS |
| 2288 | select MIPS_CM |
| 2289 | select MIPS_CPS_PM if HOTPLUG_CPU |
| 2290 | select SMP |
| 2291 | select HOTPLUG_SMT if HOTPLUG_PARALLEL |
| 2292 | select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU |
| 2293 | select SYNC_R4K if (CEVT_R4K || CSRC_R4K) |
| 2294 | select SYS_SUPPORTS_HOTPLUG_CPU |
| 2295 | select ARCH_SUPPORTS_SCHED_SMT if CPU_MIPSR6 |
| 2296 | select SYS_SUPPORTS_SMP |
| 2297 | select WEAK_ORDERING |
| 2298 | select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU |
| 2299 | help |
| 2300 | Select this if you wish to run an SMP kernel across multiple cores |
| 2301 | within a MIPS Coherent Processing System. When this option is |
| 2302 | enabled the kernel will probe for other cores and boot them with |
| 2303 | no external assistance. It is safe to enable this when hardware |
| 2304 | support is unavailable. |
| 2305 | |
| 2306 | config MIPS_CPS_PM |
| 2307 | depends on MIPS_CPS |
| 2308 | bool |
| 2309 | |
| 2310 | config MIPS_CM |
| 2311 | bool |
| 2312 | select MIPS_CPC |
| 2313 | |
| 2314 | config MIPS_CPC |
| 2315 | bool |
| 2316 | |
| 2317 | config SB1_PASS_2_WORKAROUNDS |
| 2318 | bool |
| 2319 | depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) |
| 2320 | default y |
| 2321 | |
| 2322 | config SB1_PASS_2_1_WORKAROUNDS |
| 2323 | bool |
| 2324 | depends on CPU_SB1 && CPU_SB1_PASS_2 |
| 2325 | default y |
| 2326 | |
| 2327 | choice |
| 2328 | prompt "SmartMIPS or microMIPS ASE support" |
| 2329 | |
| 2330 | config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS |
| 2331 | bool "None" |
| 2332 | help |
| 2333 | Select this if you want neither microMIPS nor SmartMIPS support |
| 2334 | |
| 2335 | config CPU_HAS_SMARTMIPS |
| 2336 | depends on SYS_SUPPORTS_SMARTMIPS |
| 2337 | bool "SmartMIPS" |
| 2338 | help |
| 2339 | SmartMIPS is a extension of the MIPS32 architecture aimed at |
| 2340 | increased security at both hardware and software level for |
| 2341 | smartcards. Enabling this option will allow proper use of the |
| 2342 | SmartMIPS instructions by Linux applications. However a kernel with |
| 2343 | this option will not work on a MIPS core without SmartMIPS core. If |
| 2344 | you don't know you probably don't have SmartMIPS and should say N |
| 2345 | here. |
| 2346 | |
| 2347 | config CPU_MICROMIPS |
| 2348 | depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
| 2349 | bool "microMIPS" |
| 2350 | help |
| 2351 | When this option is enabled the kernel will be built using the |
| 2352 | microMIPS ISA |
| 2353 | |
| 2354 | endchoice |
| 2355 | |
| 2356 | config CPU_HAS_MSA |
| 2357 | bool "Support for the MIPS SIMD Architecture" |
| 2358 | depends on CPU_SUPPORTS_MSA |
| 2359 | depends on MIPS_FP_SUPPORT |
| 2360 | depends on 64BIT || MIPS_O32_FP64_SUPPORT |
| 2361 | help |
| 2362 | MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers |
| 2363 | and a set of SIMD instructions to operate on them. When this option |
| 2364 | is enabled the kernel will support allocating & switching MSA |
| 2365 | vector register contexts. If you know that your kernel will only be |
| 2366 | running on CPUs which do not support MSA or that your userland will |
| 2367 | not be making use of it then you may wish to say N here to reduce |
| 2368 | the size & complexity of your kernel. |
| 2369 | |
| 2370 | If unsure, say Y. |
| 2371 | |
| 2372 | config CPU_HAS_WB |
| 2373 | bool |
| 2374 | |
| 2375 | config XKS01 |
| 2376 | bool |
| 2377 | |
| 2378 | config CPU_HAS_DIEI |
| 2379 | depends on !CPU_DIEI_BROKEN |
| 2380 | bool |
| 2381 | |
| 2382 | config CPU_DIEI_BROKEN |
| 2383 | bool |
| 2384 | |
| 2385 | config CPU_HAS_RIXI |
| 2386 | bool |
| 2387 | |
| 2388 | config CPU_NO_LOAD_STORE_LR |
| 2389 | bool |
| 2390 | help |
| 2391 | CPU lacks support for unaligned load and store instructions: |
| 2392 | LWL, LWR, SWL, SWR (Load/store word left/right). |
| 2393 | LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit |
| 2394 | systems). |
| 2395 | |
| 2396 | # |
| 2397 | # Vectored interrupt mode is an R2 feature |
| 2398 | # |
| 2399 | config CPU_MIPSR2_IRQ_VI |
| 2400 | bool |
| 2401 | |
| 2402 | # |
| 2403 | # Extended interrupt mode is an R2 feature |
| 2404 | # |
| 2405 | config CPU_MIPSR2_IRQ_EI |
| 2406 | bool |
| 2407 | |
| 2408 | config CPU_HAS_SYNC |
| 2409 | bool |
| 2410 | depends on !CPU_R3000 |
| 2411 | default y |
| 2412 | |
| 2413 | # |
| 2414 | # CPU non-features |
| 2415 | # |
| 2416 | |
| 2417 | # Work around the "daddi" and "daddiu" CPU errata: |
| 2418 | # |
| 2419 | # - The `daddi' instruction fails to trap on overflow. |
| 2420 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2421 | # erratum #23 |
| 2422 | # |
| 2423 | # - The `daddiu' instruction can produce an incorrect result. |
| 2424 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2425 | # erratum #41 |
| 2426 | # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum |
| 2427 | # #15 |
| 2428 | # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 |
| 2429 | # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 |
| 2430 | config CPU_DADDI_WORKAROUNDS |
| 2431 | bool |
| 2432 | |
| 2433 | # Work around certain R4000 CPU errata (as implemented by GCC): |
| 2434 | # |
| 2435 | # - A double-word or a variable shift may give an incorrect result |
| 2436 | # if executed immediately after starting an integer division: |
| 2437 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2438 | # erratum #28 |
| 2439 | # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum |
| 2440 | # #19 |
| 2441 | # |
| 2442 | # - A double-word or a variable shift may give an incorrect result |
| 2443 | # if executed while an integer multiplication is in progress: |
| 2444 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2445 | # errata #16 & #28 |
| 2446 | # |
| 2447 | # - An integer division may give an incorrect result if started in |
| 2448 | # a delay slot of a taken branch or a jump: |
| 2449 | # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
| 2450 | # erratum #52 |
| 2451 | config CPU_R4000_WORKAROUNDS |
| 2452 | bool |
| 2453 | select CPU_R4400_WORKAROUNDS |
| 2454 | |
| 2455 | # Work around certain R4400 CPU errata (as implemented by GCC): |
| 2456 | # |
| 2457 | # - A double-word or a variable shift may give an incorrect result |
| 2458 | # if executed immediately after starting an integer division: |
| 2459 | # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 |
| 2460 | # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 |
| 2461 | config CPU_R4400_WORKAROUNDS |
| 2462 | bool |
| 2463 | |
| 2464 | config CPU_R4X00_BUGS64 |
| 2465 | bool |
| 2466 | default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) |
| 2467 | |
| 2468 | config MIPS_ASID_SHIFT |
| 2469 | int |
| 2470 | default 6 if CPU_R3000 |
| 2471 | default 0 |
| 2472 | |
| 2473 | config MIPS_ASID_BITS |
| 2474 | int |
| 2475 | default 0 if MIPS_ASID_BITS_VARIABLE |
| 2476 | default 6 if CPU_R3000 |
| 2477 | default 8 |
| 2478 | |
| 2479 | config MIPS_ASID_BITS_VARIABLE |
| 2480 | bool |
| 2481 | |
| 2482 | # R4600 erratum. Due to the lack of errata information the exact |
| 2483 | # technical details aren't known. I've experimentally found that disabling |
| 2484 | # interrupts during indexed I-cache flushes seems to be sufficient to deal |
| 2485 | # with the issue. |
| 2486 | config WAR_R4600_V1_INDEX_ICACHEOP |
| 2487 | bool |
| 2488 | |
| 2489 | # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: |
| 2490 | # |
| 2491 | # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, |
| 2492 | # Hit_Invalidate_D and Create_Dirty_Excl_D should only be |
| 2493 | # executed if there is no other dcache activity. If the dcache is |
| 2494 | # accessed for another instruction immediately preceding when these |
| 2495 | # cache instructions are executing, it is possible that the dcache |
| 2496 | # tag match outputs used by these cache instructions will be |
| 2497 | # incorrect. These cache instructions should be preceded by at least |
| 2498 | # four instructions that are not any kind of load or store |
| 2499 | # instruction. |
| 2500 | # |
| 2501 | # This is not allowed: lw |
| 2502 | # nop |
| 2503 | # nop |
| 2504 | # nop |
| 2505 | # cache Hit_Writeback_Invalidate_D |
| 2506 | # |
| 2507 | # This is allowed: lw |
| 2508 | # nop |
| 2509 | # nop |
| 2510 | # nop |
| 2511 | # nop |
| 2512 | # cache Hit_Writeback_Invalidate_D |
| 2513 | config WAR_R4600_V1_HIT_CACHEOP |
| 2514 | bool |
| 2515 | |
| 2516 | # Writeback and invalidate the primary cache dcache before DMA. |
| 2517 | # |
| 2518 | # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D, |
| 2519 | # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only |
| 2520 | # operate correctly if the internal data cache refill buffer is empty. These |
| 2521 | # CACHE instructions should be separated from any potential data cache miss |
| 2522 | # by a load instruction to an uncached address to empty the response buffer." |
| 2523 | # (Revision 2.0 device errata from IDT available on https://www.idt.com/ |
| 2524 | # in .pdf format.) |
| 2525 | config WAR_R4600_V2_HIT_CACHEOP |
| 2526 | bool |
| 2527 | |
| 2528 | # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for |
| 2529 | # the line which this instruction itself exists, the following |
| 2530 | # operation is not guaranteed." |
| 2531 | # |
| 2532 | # Workaround: do two phase flushing for Index_Invalidate_I |
| 2533 | config WAR_TX49XX_ICACHE_INDEX_INV |
| 2534 | bool |
| 2535 | |
| 2536 | # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra |
| 2537 | # opposes it being called that) where invalid instructions in the same |
| 2538 | # I-cache line worth of instructions being fetched may case spurious |
| 2539 | # exceptions. |
| 2540 | config WAR_ICACHE_REFILLS |
| 2541 | bool |
| 2542 | |
| 2543 | # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that |
| 2544 | # may cause ll / sc and lld / scd sequences to execute non-atomically. |
| 2545 | config WAR_R10000_LLSC |
| 2546 | bool |
| 2547 | |
| 2548 | # 34K core erratum: "Problems Executing the TLBR Instruction" |
| 2549 | config WAR_MIPS34K_MISSED_ITLB |
| 2550 | bool |
| 2551 | |
| 2552 | # |
| 2553 | # - Highmem only makes sense for the 32-bit kernel. |
| 2554 | # - The current highmem code will only work properly on physically indexed |
| 2555 | # caches such as R3000, SB1, R7000 or those that look like they're virtually |
| 2556 | # indexed such as R4000/R4400 SC and MC versions or R10000. So for the |
| 2557 | # moment we protect the user and offer the highmem option only on machines |
| 2558 | # where it's known to be safe. This will not offer highmem on a few systems |
| 2559 | # such as MIPS32 and MIPS64 CPUs which may have virtual and physically |
| 2560 | # indexed CPUs but we're playing safe. |
| 2561 | # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
| 2562 | # know they might have memory configurations that could make use of highmem |
| 2563 | # support. |
| 2564 | # |
| 2565 | config HIGHMEM |
| 2566 | bool "High Memory Support" |
| 2567 | depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
| 2568 | select KMAP_LOCAL |
| 2569 | |
| 2570 | config CPU_SUPPORTS_HIGHMEM |
| 2571 | bool |
| 2572 | |
| 2573 | config SYS_SUPPORTS_HIGHMEM |
| 2574 | bool |
| 2575 | |
| 2576 | config SYS_SUPPORTS_SMARTMIPS |
| 2577 | bool |
| 2578 | |
| 2579 | config SYS_SUPPORTS_MICROMIPS |
| 2580 | bool |
| 2581 | |
| 2582 | config SYS_SUPPORTS_MIPS16 |
| 2583 | bool |
| 2584 | help |
| 2585 | This option must be set if a kernel might be executed on a MIPS16- |
| 2586 | enabled CPU even if MIPS16 is not actually being used. In other |
| 2587 | words, it makes the kernel MIPS16-tolerant. |
| 2588 | |
| 2589 | config CPU_SUPPORTS_MSA |
| 2590 | bool |
| 2591 | |
| 2592 | config ARCH_FLATMEM_ENABLE |
| 2593 | def_bool y |
| 2594 | depends on !NUMA && !CPU_LOONGSON2EF |
| 2595 | |
| 2596 | config ARCH_SPARSEMEM_ENABLE |
| 2597 | bool |
| 2598 | |
| 2599 | config NUMA |
| 2600 | bool "NUMA Support" |
| 2601 | depends on SYS_SUPPORTS_NUMA |
| 2602 | select SMP |
| 2603 | select HAVE_SETUP_PER_CPU_AREA |
| 2604 | select NEED_PER_CPU_EMBED_FIRST_CHUNK |
| 2605 | help |
| 2606 | Say Y to compile the kernel to support NUMA (Non-Uniform Memory |
| 2607 | Access). This option improves performance on systems with more |
| 2608 | than two nodes; on two node systems it is generally better to |
| 2609 | leave it disabled; on single node systems leave this option |
| 2610 | disabled. |
| 2611 | |
| 2612 | config SYS_SUPPORTS_NUMA |
| 2613 | bool |
| 2614 | |
| 2615 | config RELOCATABLE |
| 2616 | bool "Relocatable kernel" |
| 2617 | depends on SYS_SUPPORTS_RELOCATABLE |
| 2618 | depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \ |
| 2619 | CPU_MIPS32_R5 || CPU_MIPS64_R5 || \ |
| 2620 | CPU_MIPS32_R6 || CPU_MIPS64_R6 || \ |
| 2621 | CPU_P5600 || CAVIUM_OCTEON_SOC || \ |
| 2622 | CPU_LOONGSON64 |
| 2623 | select ARCH_VMLINUX_NEEDS_RELOCS |
| 2624 | help |
| 2625 | This builds a kernel image that retains relocation information |
| 2626 | so it can be loaded someplace besides the default 1MB. |
| 2627 | The relocations make the kernel binary about 15% larger, |
| 2628 | but are discarded at runtime |
| 2629 | |
| 2630 | config RELOCATION_TABLE_SIZE |
| 2631 | hex "Relocation table size" |
| 2632 | depends on RELOCATABLE |
| 2633 | range 0x0 0x01000000 |
| 2634 | default "0x00200000" if CPU_LOONGSON64 |
| 2635 | default "0x00100000" |
| 2636 | help |
| 2637 | A table of relocation data will be appended to the kernel binary |
| 2638 | and parsed at boot to fix up the relocated kernel. |
| 2639 | |
| 2640 | This option allows the amount of space reserved for the table to be |
| 2641 | adjusted, although the default of 1Mb should be ok in most cases. |
| 2642 | |
| 2643 | The build will fail and a valid size suggested if this is too small. |
| 2644 | |
| 2645 | If unsure, leave at the default value. |
| 2646 | |
| 2647 | config RANDOMIZE_BASE |
| 2648 | bool "Randomize the address of the kernel image" |
| 2649 | depends on RELOCATABLE |
| 2650 | help |
| 2651 | Randomizes the physical and virtual address at which the |
| 2652 | kernel image is loaded, as a security feature that |
| 2653 | deters exploit attempts relying on knowledge of the location |
| 2654 | of kernel internals. |
| 2655 | |
| 2656 | Entropy is generated using any coprocessor 0 registers available. |
| 2657 | |
| 2658 | The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
| 2659 | |
| 2660 | If unsure, say N. |
| 2661 | |
| 2662 | config RANDOMIZE_BASE_MAX_OFFSET |
| 2663 | hex "Maximum kASLR offset" if EXPERT |
| 2664 | depends on RANDOMIZE_BASE |
| 2665 | range 0x0 0x40000000 if EVA || 64BIT |
| 2666 | range 0x0 0x08000000 |
| 2667 | default "0x01000000" |
| 2668 | help |
| 2669 | When kASLR is active, this provides the maximum offset that will |
| 2670 | be applied to the kernel image. It should be set according to the |
| 2671 | amount of physical RAM available in the target system minus |
| 2672 | PHYSICAL_START and must be a power of 2. |
| 2673 | |
| 2674 | This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with |
| 2675 | EVA or 64-bit. The default is 16Mb. |
| 2676 | |
| 2677 | config NODES_SHIFT |
| 2678 | int |
| 2679 | default "6" |
| 2680 | depends on NUMA |
| 2681 | |
| 2682 | config HW_PERF_EVENTS |
| 2683 | bool "Enable hardware performance counter support for perf events" |
| 2684 | depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64) |
| 2685 | default y |
| 2686 | help |
| 2687 | Enable hardware performance counter support for perf events. If |
| 2688 | disabled, perf events will use software events only. |
| 2689 | |
| 2690 | config DMI |
| 2691 | bool "Enable DMI scanning" |
| 2692 | depends on MACH_LOONGSON64 |
| 2693 | select DMI_SCAN_MACHINE_NON_EFI_FALLBACK |
| 2694 | default y |
| 2695 | help |
| 2696 | Enabled scanning of DMI to identify machine quirks. Say Y |
| 2697 | here unless you have verified that your setup is not |
| 2698 | affected by entries in the DMI blacklist. Required by PNP |
| 2699 | BIOS code. |
| 2700 | |
| 2701 | config SMP |
| 2702 | bool "Multi-Processing support" |
| 2703 | depends on SYS_SUPPORTS_SMP |
| 2704 | help |
| 2705 | This enables support for systems with more than one CPU. If you have |
| 2706 | a system with only one CPU, say N. If you have a system with more |
| 2707 | than one CPU, say Y. |
| 2708 | |
| 2709 | If you say N here, the kernel will run on uni- and multiprocessor |
| 2710 | machines, but will use only one CPU of a multiprocessor machine. If |
| 2711 | you say Y here, the kernel will run on many, but not all, |
| 2712 | uniprocessor machines. On a uniprocessor machine, the kernel |
| 2713 | will run faster if you say N here. |
| 2714 | |
| 2715 | People using multiprocessor machines who say Y here should also say |
| 2716 | Y to "Enhanced Real Time Clock Support", below. |
| 2717 | |
| 2718 | See also the SMP-HOWTO available at |
| 2719 | <https://www.tldp.org/docs.html#howto>. |
| 2720 | |
| 2721 | If you don't know what to do here, say N. |
| 2722 | |
| 2723 | config HOTPLUG_CPU |
| 2724 | bool "Support for hot-pluggable CPUs" |
| 2725 | depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU |
| 2726 | help |
| 2727 | Say Y here to allow turning CPUs off and on. CPUs can be |
| 2728 | controlled through /sys/devices/system/cpu. |
| 2729 | (Note: power management support will enable this option |
| 2730 | automatically on SMP systems. ) |
| 2731 | Say N if you want to disable CPU hotplug. |
| 2732 | |
| 2733 | config SMP_UP |
| 2734 | bool |
| 2735 | |
| 2736 | config SYS_SUPPORTS_MIPS_CPS |
| 2737 | bool |
| 2738 | |
| 2739 | config SYS_SUPPORTS_SMP |
| 2740 | bool |
| 2741 | |
| 2742 | config NR_CPUS_DEFAULT_4 |
| 2743 | bool |
| 2744 | |
| 2745 | config NR_CPUS_DEFAULT_8 |
| 2746 | bool |
| 2747 | |
| 2748 | config NR_CPUS_DEFAULT_16 |
| 2749 | bool |
| 2750 | |
| 2751 | config NR_CPUS_DEFAULT_32 |
| 2752 | bool |
| 2753 | |
| 2754 | config NR_CPUS_DEFAULT_64 |
| 2755 | bool |
| 2756 | |
| 2757 | config NR_CPUS |
| 2758 | int "Maximum number of CPUs (2-256)" |
| 2759 | range 2 256 |
| 2760 | depends on SMP |
| 2761 | default "4" if NR_CPUS_DEFAULT_4 |
| 2762 | default "8" if NR_CPUS_DEFAULT_8 |
| 2763 | default "16" if NR_CPUS_DEFAULT_16 |
| 2764 | default "32" if NR_CPUS_DEFAULT_32 |
| 2765 | default "64" if NR_CPUS_DEFAULT_64 |
| 2766 | help |
| 2767 | This allows you to specify the maximum number of CPUs which this |
| 2768 | kernel will support. The maximum supported value is 32 for 32-bit |
| 2769 | kernel and 64 for 64-bit kernels; the minimum value which makes |
| 2770 | sense is 1 for Qemu (useful only for kernel debugging purposes) |
| 2771 | and 2 for all others. |
| 2772 | |
| 2773 | This is purely to save memory - each supported CPU adds |
| 2774 | approximately eight kilobytes to the kernel image. For best |
| 2775 | performance should round up your number of processors to the next |
| 2776 | power of two. |
| 2777 | |
| 2778 | config MIPS_PERF_SHARED_TC_COUNTERS |
| 2779 | bool |
| 2780 | |
| 2781 | config MIPS_NR_CPU_NR_MAP_1024 |
| 2782 | bool |
| 2783 | |
| 2784 | config MIPS_NR_CPU_NR_MAP |
| 2785 | int |
| 2786 | depends on SMP |
| 2787 | default 1024 if MIPS_NR_CPU_NR_MAP_1024 |
| 2788 | default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 |
| 2789 | |
| 2790 | # |
| 2791 | # Timer Interrupt Frequency Configuration |
| 2792 | # |
| 2793 | |
| 2794 | choice |
| 2795 | prompt "Timer frequency" |
| 2796 | default HZ_250 |
| 2797 | help |
| 2798 | Allows the configuration of the timer frequency. |
| 2799 | |
| 2800 | config HZ_24 |
| 2801 | bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2802 | |
| 2803 | config HZ_48 |
| 2804 | bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2805 | |
| 2806 | config HZ_100 |
| 2807 | bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2808 | |
| 2809 | config HZ_128 |
| 2810 | bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2811 | |
| 2812 | config HZ_250 |
| 2813 | bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2814 | |
| 2815 | config HZ_256 |
| 2816 | bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2817 | |
| 2818 | config HZ_1000 |
| 2819 | bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2820 | |
| 2821 | config HZ_1024 |
| 2822 | bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ |
| 2823 | |
| 2824 | endchoice |
| 2825 | |
| 2826 | config SYS_SUPPORTS_24HZ |
| 2827 | bool |
| 2828 | |
| 2829 | config SYS_SUPPORTS_48HZ |
| 2830 | bool |
| 2831 | |
| 2832 | config SYS_SUPPORTS_100HZ |
| 2833 | bool |
| 2834 | |
| 2835 | config SYS_SUPPORTS_128HZ |
| 2836 | bool |
| 2837 | |
| 2838 | config SYS_SUPPORTS_250HZ |
| 2839 | bool |
| 2840 | |
| 2841 | config SYS_SUPPORTS_256HZ |
| 2842 | bool |
| 2843 | |
| 2844 | config SYS_SUPPORTS_1000HZ |
| 2845 | bool |
| 2846 | |
| 2847 | config SYS_SUPPORTS_1024HZ |
| 2848 | bool |
| 2849 | |
| 2850 | config SYS_SUPPORTS_ARBIT_HZ |
| 2851 | bool |
| 2852 | default y if !SYS_SUPPORTS_24HZ && \ |
| 2853 | !SYS_SUPPORTS_48HZ && \ |
| 2854 | !SYS_SUPPORTS_100HZ && \ |
| 2855 | !SYS_SUPPORTS_128HZ && \ |
| 2856 | !SYS_SUPPORTS_250HZ && \ |
| 2857 | !SYS_SUPPORTS_256HZ && \ |
| 2858 | !SYS_SUPPORTS_1000HZ && \ |
| 2859 | !SYS_SUPPORTS_1024HZ |
| 2860 | |
| 2861 | config HZ |
| 2862 | int |
| 2863 | default 24 if HZ_24 |
| 2864 | default 48 if HZ_48 |
| 2865 | default 100 if HZ_100 |
| 2866 | default 128 if HZ_128 |
| 2867 | default 250 if HZ_250 |
| 2868 | default 256 if HZ_256 |
| 2869 | default 1000 if HZ_1000 |
| 2870 | default 1024 if HZ_1024 |
| 2871 | |
| 2872 | config SCHED_HRTICK |
| 2873 | def_bool HIGH_RES_TIMERS |
| 2874 | |
| 2875 | config ARCH_SUPPORTS_KEXEC |
| 2876 | def_bool y |
| 2877 | |
| 2878 | config ARCH_SUPPORTS_CRASH_DUMP |
| 2879 | def_bool y |
| 2880 | |
| 2881 | config ARCH_DEFAULT_CRASH_DUMP |
| 2882 | def_bool y |
| 2883 | |
| 2884 | config PHYSICAL_START |
| 2885 | hex "Physical address where the kernel is loaded" |
| 2886 | default "0xffffffff84000000" |
| 2887 | depends on CRASH_DUMP |
| 2888 | help |
| 2889 | This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
| 2890 | If you plan to use kernel for capturing the crash dump change |
| 2891 | this value to start of the reserved region (the "X" value as |
| 2892 | specified in the "crashkernel=YM@XM" command line boot parameter |
| 2893 | passed to the panic-ed kernel). |
| 2894 | |
| 2895 | config MIPS_O32_FP64_SUPPORT |
| 2896 | bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 |
| 2897 | depends on 32BIT || MIPS32_O32 |
| 2898 | help |
| 2899 | When this is enabled, the kernel will support use of 64-bit floating |
| 2900 | point registers with binaries using the O32 ABI along with the |
| 2901 | EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On |
| 2902 | 32-bit MIPS systems this support is at the cost of increasing the |
| 2903 | size and complexity of the compiled FPU emulator. Thus if you are |
| 2904 | running a MIPS32 system and know that none of your userland binaries |
| 2905 | will require 64-bit floating point, you may wish to reduce the size |
| 2906 | of your kernel & potentially improve FP emulation performance by |
| 2907 | saying N here. |
| 2908 | |
| 2909 | Although binutils currently supports use of this flag the details |
| 2910 | concerning its effect upon the O32 ABI in userland are still being |
| 2911 | worked on. In order to avoid userland becoming dependent upon current |
| 2912 | behaviour before the details have been finalised, this option should |
| 2913 | be considered experimental and only enabled by those working upon |
| 2914 | said details. |
| 2915 | |
| 2916 | If unsure, say N. |
| 2917 | |
| 2918 | config USE_OF |
| 2919 | bool |
| 2920 | select OF |
| 2921 | select OF_EARLY_FLATTREE |
| 2922 | select IRQ_DOMAIN |
| 2923 | |
| 2924 | config UHI_BOOT |
| 2925 | bool |
| 2926 | |
| 2927 | config BUILTIN_DTB |
| 2928 | bool |
| 2929 | |
| 2930 | choice |
| 2931 | prompt "Kernel appended dtb support" |
| 2932 | depends on USE_OF |
| 2933 | default MIPS_NO_APPENDED_DTB |
| 2934 | |
| 2935 | config MIPS_NO_APPENDED_DTB |
| 2936 | bool "None" |
| 2937 | help |
| 2938 | Do not enable appended dtb support. |
| 2939 | |
| 2940 | config MIPS_ELF_APPENDED_DTB |
| 2941 | bool "vmlinux" |
| 2942 | help |
| 2943 | With this option, the boot code will look for a device tree binary |
| 2944 | DTB) included in the vmlinux ELF section .appended_dtb. By default |
| 2945 | it is empty and the DTB can be appended using binutils command |
| 2946 | objcopy: |
| 2947 | |
| 2948 | objcopy --update-section .appended_dtb=<filename>.dtb vmlinux |
| 2949 | |
| 2950 | This is meant as a backward compatibility convenience for those |
| 2951 | systems with a bootloader that can't be upgraded to accommodate |
| 2952 | the documented boot protocol using a device tree. |
| 2953 | |
| 2954 | config MIPS_RAW_APPENDED_DTB |
| 2955 | bool "vmlinux.bin or vmlinuz.bin" |
| 2956 | help |
| 2957 | With this option, the boot code will look for a device tree binary |
| 2958 | DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
| 2959 | (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
| 2960 | |
| 2961 | This is meant as a backward compatibility convenience for those |
| 2962 | systems with a bootloader that can't be upgraded to accommodate |
| 2963 | the documented boot protocol using a device tree. |
| 2964 | |
| 2965 | Beware that there is very little in terms of protection against |
| 2966 | this option being confused by leftover garbage in memory that might |
| 2967 | look like a DTB header after a reboot if no actual DTB is appended |
| 2968 | to vmlinux.bin. Do not leave this option active in a production kernel |
| 2969 | if you don't intend to always append a DTB. |
| 2970 | endchoice |
| 2971 | |
| 2972 | choice |
| 2973 | prompt "Kernel command line type" |
| 2974 | depends on !CMDLINE_OVERRIDE |
| 2975 | default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
| 2976 | !MACH_LOONGSON64 && !MACH_LOONGSON32 && \ |
| 2977 | !MIPS_MALTA && !CAVIUM_OCTEON_SOC |
| 2978 | default MIPS_CMDLINE_FROM_BOOTLOADER |
| 2979 | |
| 2980 | config MIPS_CMDLINE_FROM_DTB |
| 2981 | depends on USE_OF |
| 2982 | bool "Dtb kernel arguments if available" |
| 2983 | |
| 2984 | config MIPS_CMDLINE_DTB_EXTEND |
| 2985 | depends on USE_OF |
| 2986 | bool "Extend dtb kernel arguments with bootloader arguments" |
| 2987 | |
| 2988 | config MIPS_CMDLINE_FROM_BOOTLOADER |
| 2989 | bool "Bootloader kernel arguments if available" |
| 2990 | |
| 2991 | config MIPS_CMDLINE_BUILTIN_EXTEND |
| 2992 | depends on CMDLINE_BOOL |
| 2993 | bool "Extend builtin kernel arguments with bootloader arguments" |
| 2994 | endchoice |
| 2995 | |
| 2996 | endmenu |
| 2997 | |
| 2998 | config LOCKDEP_SUPPORT |
| 2999 | bool |
| 3000 | default y |
| 3001 | |
| 3002 | config STACKTRACE_SUPPORT |
| 3003 | bool |
| 3004 | default y |
| 3005 | |
| 3006 | config PGTABLE_LEVELS |
| 3007 | int |
| 3008 | default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 |
| 3009 | default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48) |
| 3010 | default 2 |
| 3011 | |
| 3012 | config MIPS_AUTO_PFN_OFFSET |
| 3013 | bool |
| 3014 | |
| 3015 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
| 3016 | |
| 3017 | config PCI_DRIVERS_GENERIC |
| 3018 | select PCI_DOMAINS_GENERIC if PCI |
| 3019 | bool |
| 3020 | |
| 3021 | config PCI_DRIVERS_LEGACY |
| 3022 | def_bool !PCI_DRIVERS_GENERIC |
| 3023 | select NO_GENERIC_PCI_IOPORT_MAP |
| 3024 | select PCI_DOMAINS if PCI |
| 3025 | |
| 3026 | # |
| 3027 | # ISA support is now enabled via select. Too many systems still have the one |
| 3028 | # or other ISA chip on the board that users don't know about so don't expect |
| 3029 | # users to choose the right thing ... |
| 3030 | # |
| 3031 | config ISA |
| 3032 | bool |
| 3033 | |
| 3034 | config TC |
| 3035 | bool "TURBOchannel support" |
| 3036 | depends on MACH_DECSTATION |
| 3037 | help |
| 3038 | TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
| 3039 | processors. TURBOchannel programming specifications are available |
| 3040 | at: |
| 3041 | <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> |
| 3042 | and: |
| 3043 | <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> |
| 3044 | Linux driver support status is documented at: |
| 3045 | <http://www.linux-mips.org/wiki/DECstation> |
| 3046 | |
| 3047 | config MMU |
| 3048 | bool |
| 3049 | default y |
| 3050 | |
| 3051 | config ARCH_MMAP_RND_BITS_MIN |
| 3052 | default 12 if 64BIT |
| 3053 | default 8 |
| 3054 | |
| 3055 | config ARCH_MMAP_RND_BITS_MAX |
| 3056 | default 18 if 64BIT |
| 3057 | default 15 |
| 3058 | |
| 3059 | config ARCH_MMAP_RND_COMPAT_BITS_MIN |
| 3060 | default 8 |
| 3061 | |
| 3062 | config ARCH_MMAP_RND_COMPAT_BITS_MAX |
| 3063 | default 15 |
| 3064 | |
| 3065 | config I8253 |
| 3066 | bool |
| 3067 | select CLKSRC_I8253 |
| 3068 | select CLKEVT_I8253 |
| 3069 | select MIPS_EXTERNAL_TIMER |
| 3070 | endmenu |
| 3071 | |
| 3072 | config TRAD_SIGNALS |
| 3073 | bool |
| 3074 | |
| 3075 | config MIPS32_COMPAT |
| 3076 | bool |
| 3077 | |
| 3078 | config COMPAT |
| 3079 | bool |
| 3080 | |
| 3081 | config MIPS32_O32 |
| 3082 | bool "Kernel support for o32 binaries" |
| 3083 | depends on 64BIT |
| 3084 | select ARCH_WANT_OLD_COMPAT_IPC |
| 3085 | select COMPAT |
| 3086 | select MIPS32_COMPAT |
| 3087 | help |
| 3088 | Select this option if you want to run o32 binaries. These are pure |
| 3089 | 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of |
| 3090 | existing binaries are in this format. |
| 3091 | |
| 3092 | If unsure, say Y. |
| 3093 | |
| 3094 | config MIPS32_N32 |
| 3095 | bool "Kernel support for n32 binaries" |
| 3096 | depends on 64BIT |
| 3097 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
| 3098 | select COMPAT |
| 3099 | select MIPS32_COMPAT |
| 3100 | help |
| 3101 | Select this option if you want to run n32 binaries. These are |
| 3102 | 64-bit binaries using 32-bit quantities for addressing and certain |
| 3103 | data that would normally be 64-bit. They are used in special |
| 3104 | cases. |
| 3105 | |
| 3106 | If unsure, say N. |
| 3107 | |
| 3108 | config CC_HAS_MNO_BRANCH_LIKELY |
| 3109 | def_bool y |
| 3110 | depends on $(cc-option,-mno-branch-likely) |
| 3111 | |
| 3112 | # https://github.com/llvm/llvm-project/issues/61045 |
| 3113 | config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH |
| 3114 | def_bool y if CC_IS_CLANG |
| 3115 | |
| 3116 | config ARCH_CC_CAN_LINK_N32 |
| 3117 | bool |
| 3118 | default $(cc_can_link_user,-mabi=n32 -EL) if MIPS32_N32 && CPU_LITTLE_ENDIAN |
| 3119 | default $(cc_can_link_user,-mabi=n32 -EB) if MIPS32_N32 && CPU_BIG_ENDIAN |
| 3120 | |
| 3121 | config ARCH_CC_CAN_LINK_N64 |
| 3122 | bool |
| 3123 | default $(cc_can_link_user,-mabi=64 -EL) if 64BIT && CPU_LITTLE_ENDIAN |
| 3124 | default $(cc_can_link_user,-mabi=64 -EB) if 64BIT && CPU_BIG_ENDIAN |
| 3125 | |
| 3126 | config ARCH_CC_CAN_LINK_O32 |
| 3127 | bool |
| 3128 | default $(cc_can_link_user,-mabi=32 -EL) if (32BIT || MIPS32_O32) && CPU_LITTLE_ENDIAN |
| 3129 | default $(cc_can_link_user,-mabi=32 -EB) if (32BIT || MIPS32_O32) && CPU_BIG_ENDIAN |
| 3130 | |
| 3131 | config ARCH_CC_CAN_LINK |
| 3132 | def_bool ARCH_CC_CAN_LINK_N32 || ARCH_CC_CAN_LINK_N64 || ARCH_CC_CAN_LINK_O32 |
| 3133 | |
| 3134 | config ARCH_USERFLAGS |
| 3135 | string |
| 3136 | default "-mabi=n32 -EL" if ARCH_CC_CAN_LINK_N32 && CPU_LITTLE_ENDIAN |
| 3137 | default "-mabi=n32 -EB" if ARCH_CC_CAN_LINK_N32 && CPU_BIG_ENDIAN |
| 3138 | default "-mabi=64 -EL" if ARCH_CC_CAN_LINK_N64 && CPU_LITTLE_ENDIAN |
| 3139 | default "-mabi=64 -EB" if ARCH_CC_CAN_LINK_N64 && CPU_BIG_ENDIAN |
| 3140 | default "-mabi=32 -EL" if ARCH_CC_CAN_LINK_O32 && CPU_LITTLE_ENDIAN |
| 3141 | default "-mabi=32 -EB" if ARCH_CC_CAN_LINK_O32 && CPU_BIG_ENDIAN |
| 3142 | |
| 3143 | menu "Power management options" |
| 3144 | |
| 3145 | config ARCH_HIBERNATION_POSSIBLE |
| 3146 | def_bool y |
| 3147 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
| 3148 | |
| 3149 | config ARCH_SUSPEND_POSSIBLE |
| 3150 | def_bool y |
| 3151 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
| 3152 | |
| 3153 | source "kernel/power/Kconfig" |
| 3154 | |
| 3155 | endmenu |
| 3156 | |
| 3157 | config MIPS_EXTERNAL_TIMER |
| 3158 | bool |
| 3159 | |
| 3160 | config MIPS_GENERIC_GETTIMEOFDAY |
| 3161 | def_bool y |
| 3162 | select GENERIC_GETTIMEOFDAY |
| 3163 | depends on CSRC_R4K || CLKSRC_MIPS_GIC |
| 3164 | # GCC (at least up to version 9.2) appears to emit function calls that make use |
| 3165 | # of the GOT when targeting microMIPS, which we can't use in the VDSO due to |
| 3166 | # the lack of relocations. As such, we disable the VDSO for microMIPS builds. |
| 3167 | depends on !(CPU_MICROMIPS && CC_IS_GCC && GCC_VERSION < 90300) |
| 3168 | |
| 3169 | menu "CPU Power Management" |
| 3170 | |
| 3171 | if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER |
| 3172 | source "drivers/cpufreq/Kconfig" |
| 3173 | endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER |
| 3174 | |
| 3175 | source "drivers/cpuidle/Kconfig" |
| 3176 | |
| 3177 | endmenu |
| 3178 | |
| 3179 | source "arch/mips/kvm/Kconfig" |