| 1 | |
| 2 | * This file is subject to the terms and conditions of the GNU General Public
|
| 3 | * License. See the file "COPYING" in the main directory of this archive
|
| 4 | * for more details.
|
| 5 | *
|
| 6 | * Much of this is taken from binutils and GNU libc ...
|
| 7 |
|
| 8 | #ifndef _ASM_ELF_H
|
| 9 | #define _ASM_ELF_H
|
| 10 |
|
| 11 | #include <linux/auxvec.h>
|
| 12 | #include <linux/fs.h>
|
| 13 | #include <linux/mm_types.h>
|
| 14 |
|
| 15 | #include <uapi/linux/elf.h>
|
| 16 |
|
| 17 | #include <asm/current.h>
|
| 18 |
|
| 19 |
|
| 20 |
|
| 21 | #define EF_MIPS_ARCH_1 0x00000000
|
| 22 | #define EF_MIPS_ARCH_2 0x10000000
|
| 23 | #define EF_MIPS_ARCH_3 0x20000000
|
| 24 | #define EF_MIPS_ARCH_4 0x30000000
|
| 25 | #define EF_MIPS_ARCH_5 0x40000000
|
| 26 | #define EF_MIPS_ARCH_32 0x50000000
|
| 27 | #define EF_MIPS_ARCH_64 0x60000000
|
| 28 | #define EF_MIPS_ARCH_32R2 0x70000000
|
| 29 | #define EF_MIPS_ARCH_64R2 0x80000000
|
| 30 |
|
| 31 |
|
| 32 | #define EF_MIPS_ABI_O32 0x00001000
|
| 33 | #define EF_MIPS_ABI_O64 0x00002000
|
| 34 |
|
| 35 | #define PT_MIPS_REGINFO 0x70000000
|
| 36 | #define PT_MIPS_RTPROC 0x70000001
|
| 37 | #define PT_MIPS_OPTIONS 0x70000002
|
| 38 | #define PT_MIPS_ABIFLAGS 0x70000003
|
| 39 |
|
| 40 |
|
| 41 | #define EF_MIPS_NOREORDER 0x00000001
|
| 42 | #define EF_MIPS_PIC 0x00000002
|
| 43 | #define EF_MIPS_CPIC 0x00000004
|
| 44 | #define EF_MIPS_ABI2 0x00000020
|
| 45 | #define EF_MIPS_OPTIONS_FIRST 0x00000080
|
| 46 | #define EF_MIPS_32BITMODE 0x00000100
|
| 47 | #define EF_MIPS_FP64 0x00000200
|
| 48 | #define EF_MIPS_NAN2008 0x00000400
|
| 49 | #define EF_MIPS_ABI 0x0000f000
|
| 50 | #define EF_MIPS_ARCH 0xf0000000
|
| 51 |
|
| 52 | #define DT_MIPS_RLD_VERSION 0x70000001
|
| 53 | #define DT_MIPS_TIME_STAMP 0x70000002
|
| 54 | #define DT_MIPS_ICHECKSUM 0x70000003
|
| 55 | #define DT_MIPS_IVERSION 0x70000004
|
| 56 | #define DT_MIPS_FLAGS 0x70000005
|
| 57 | #define RHF_NONE 0x00000000
|
| 58 | #define RHF_HARDWAY 0x00000001
|
| 59 | #define RHF_NOTPOT 0x00000002
|
| 60 | #define RHF_SGI_ONLY 0x00000010
|
| 61 | #define DT_MIPS_BASE_ADDRESS 0x70000006
|
| 62 | #define DT_MIPS_CONFLICT 0x70000008
|
| 63 | #define DT_MIPS_LIBLIST 0x70000009
|
| 64 | #define DT_MIPS_LOCAL_GOTNO 0x7000000a
|
| 65 | #define DT_MIPS_CONFLICTNO 0x7000000b
|
| 66 | #define DT_MIPS_LIBLISTNO 0x70000010
|
| 67 | #define DT_MIPS_SYMTABNO 0x70000011
|
| 68 | #define DT_MIPS_UNREFEXTNO 0x70000012
|
| 69 | #define DT_MIPS_GOTSYM 0x70000013
|
| 70 | #define DT_MIPS_HIPAGENO 0x70000014
|
| 71 | #define DT_MIPS_RLD_MAP 0x70000016
|
| 72 |
|
| 73 | #define R_MIPS_NONE 0
|
| 74 | #define R_MIPS_16 1
|
| 75 | #define R_MIPS_32 2
|
| 76 | #define R_MIPS_REL32 3
|
| 77 | #define R_MIPS_26 4
|
| 78 | #define R_MIPS_HI16 5
|
| 79 | #define R_MIPS_LO16 6
|
| 80 | #define R_MIPS_GPREL16 7
|
| 81 | #define R_MIPS_LITERAL 8
|
| 82 | #define R_MIPS_GOT16 9
|
| 83 | #define R_MIPS_PC16 10
|
| 84 | #define R_MIPS_CALL16 11
|
| 85 | #define R_MIPS_GPREL32 12
|
| 86 | |
| 87 | in the MIPS ELF ABI.
|
| 88 | #define R_MIPS_UNUSED1 13
|
| 89 | #define R_MIPS_UNUSED2 14
|
| 90 | #define R_MIPS_UNUSED3 15
|
| 91 | #define R_MIPS_SHIFT5 16
|
| 92 | #define R_MIPS_SHIFT6 17
|
| 93 | #define R_MIPS_64 18
|
| 94 | #define R_MIPS_GOT_DISP 19
|
| 95 | #define R_MIPS_GOT_PAGE 20
|
| 96 | #define R_MIPS_GOT_OFST 21
|
| 97 | |
| 98 | * The following two relocation types are specified in the MIPS ABI
|
| 99 | * conformance guide version 1.2 but not yet in the psABI.
|
| 100 |
|
| 101 | #define R_MIPS_GOTHI16 22
|
| 102 | #define R_MIPS_GOTLO16 23
|
| 103 | #define R_MIPS_SUB 24
|
| 104 | #define R_MIPS_INSERT_A 25
|
| 105 | #define R_MIPS_INSERT_B 26
|
| 106 | #define R_MIPS_DELETE 27
|
| 107 | #define R_MIPS_HIGHER 28
|
| 108 | #define R_MIPS_HIGHEST 29
|
| 109 | |
| 110 | * The following two relocation types are specified in the MIPS ABI
|
| 111 | * conformance guide version 1.2 but not yet in the psABI.
|
| 112 |
|
| 113 | #define R_MIPS_CALLHI16 30
|
| 114 | #define R_MIPS_CALLLO16 31
|
| 115 | |
| 116 | * Introduced for MIPSr6.
|
| 117 |
|
| 118 | #define R_MIPS_PC21_S2 60
|
| 119 | #define R_MIPS_PC26_S2 61
|
| 120 | |
| 121 | * This range is reserved for vendor specific relocations.
|
| 122 |
|
| 123 | #define R_MIPS_LOVENDOR 100
|
| 124 | #define R_MIPS_HIVENDOR 127
|
| 125 |
|
| 126 | #define R_MIPS_PC32 248
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| 127 |
|
| 128 | #define SHN_MIPS_ACCOMON 0xff00
|
| 129 | #define SHN_MIPS_TEXT 0xff01
|
| 130 | #define SHN_MIPS_DATA 0xff02
|
| 131 | #define SHN_MIPS_SCOMMON 0xff03
|
| 132 | #define SHN_MIPS_SUNDEFINED 0xff04
|
| 133 |
|
| 134 | #define SHT_MIPS_LIST 0x70000000
|
| 135 | #define SHT_MIPS_CONFLICT 0x70000002
|
| 136 | #define SHT_MIPS_GPTAB 0x70000003
|
| 137 | #define SHT_MIPS_UCODE 0x70000004
|
| 138 | #define SHT_MIPS_DEBUG 0x70000005
|
| 139 | #define SHT_MIPS_REGINFO 0x70000006
|
| 140 | #define SHT_MIPS_PACKAGE 0x70000007
|
| 141 | #define SHT_MIPS_PACKSYM 0x70000008
|
| 142 | #define SHT_MIPS_RELD 0x70000009
|
| 143 | #define SHT_MIPS_IFACE 0x7000000b
|
| 144 | #define SHT_MIPS_CONTENT 0x7000000c
|
| 145 | #define SHT_MIPS_OPTIONS 0x7000000d
|
| 146 | #define SHT_MIPS_SHDR 0x70000010
|
| 147 | #define SHT_MIPS_FDESC 0x70000011
|
| 148 | #define SHT_MIPS_EXTSYM 0x70000012
|
| 149 | #define SHT_MIPS_DENSE 0x70000013
|
| 150 | #define SHT_MIPS_PDESC 0x70000014
|
| 151 | #define SHT_MIPS_LOCSYM 0x70000015
|
| 152 | #define SHT_MIPS_AUXSYM 0x70000016
|
| 153 | #define SHT_MIPS_OPTSYM 0x70000017
|
| 154 | #define SHT_MIPS_LOCSTR 0x70000018
|
| 155 | #define SHT_MIPS_LINE 0x70000019
|
| 156 | #define SHT_MIPS_RFDESC 0x7000001a
|
| 157 | #define SHT_MIPS_DELTASYM 0x7000001b
|
| 158 | #define SHT_MIPS_DELTAINST 0x7000001c
|
| 159 | #define SHT_MIPS_DELTACLASS 0x7000001d
|
| 160 | #define SHT_MIPS_DWARF 0x7000001e
|
| 161 | #define SHT_MIPS_DELTADECL 0x7000001f
|
| 162 | #define SHT_MIPS_SYMBOL_LIB 0x70000020
|
| 163 | #define SHT_MIPS_EVENTS 0x70000021
|
| 164 | #define SHT_MIPS_TRANSLATE 0x70000022
|
| 165 | #define SHT_MIPS_PIXIE 0x70000023
|
| 166 | #define SHT_MIPS_XLATE 0x70000024
|
| 167 | #define SHT_MIPS_XLATE_DEBUG 0x70000025
|
| 168 | #define SHT_MIPS_WHIRL 0x70000026
|
| 169 | #define SHT_MIPS_EH_REGION 0x70000027
|
| 170 | #define SHT_MIPS_XLATE_OLD 0x70000028
|
| 171 | #define SHT_MIPS_PDR_EXCEPTION 0x70000029
|
| 172 |
|
| 173 | #define SHF_MIPS_GPREL 0x10000000
|
| 174 | #define SHF_MIPS_MERGE 0x20000000
|
| 175 | #define SHF_MIPS_ADDR 0x40000000
|
| 176 | #define SHF_MIPS_STRING 0x80000000
|
| 177 | #define SHF_MIPS_NOSTRIP 0x08000000
|
| 178 | #define SHF_MIPS_LOCAL 0x04000000
|
| 179 | #define SHF_MIPS_NAMES 0x02000000
|
| 180 | #define SHF_MIPS_NODUPES 0x01000000
|
| 181 |
|
| 182 | #define MIPS_ABI_FP_ANY 0
|
| 183 | #define MIPS_ABI_FP_DOUBLE 1
|
| 184 | #define MIPS_ABI_FP_SINGLE 2
|
| 185 | #define MIPS_ABI_FP_SOFT 3
|
| 186 | #define MIPS_ABI_FP_OLD_64 4
|
| 187 | #define MIPS_ABI_FP_XX 5
|
| 188 | #define MIPS_ABI_FP_64 6
|
| 189 | #define MIPS_ABI_FP_64A 7
|
| 190 |
|
| 191 | struct mips_elf_abiflags_v0 {
|
| 192 | uint16_t version;
|
| 193 | uint8_t isa_level;
|
| 194 | uint8_t isa_rev; |
| 195 | 1-n otherwise
|
| 196 | uint8_t gpr_size;
|
| 197 | uint8_t cpr1_size;
|
| 198 | uint8_t cpr2_size;
|
| 199 | uint8_t fp_abi;
|
| 200 | uint32_t isa_ext;
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| 201 | uint32_t ases;
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| 202 | uint32_t flags1;
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| 203 | uint32_t flags2;
|
| 204 | };
|
| 205 |
|
| 206 |
|
| 207 | #define ELF_NGREG 45
|
| 208 | #define ELF_NFPREG 33
|
| 209 |
|
| 210 | typedef unsigned long elf_greg_t;
|
| 211 | typedef elf_greg_t elf_gregset_t[ELF_NGREG];
|
| 212 |
|
| 213 | typedef double elf_fpreg_t;
|
| 214 | typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
|
| 215 |
|
| 216 | void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs);
|
| 217 | void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs);
|
| 218 |
|
| 219 | #ifdef CONFIG_32BIT
|
| 220 | |
| 221 | * This is used to ensure we don't load something for the wrong architecture.
|
| 222 |
|
| 223 | #define elf_check_arch elf32_check_arch
|
| 224 |
|
| 225 | |
| 226 | * These are used to set parameters in the core dumps.
|
| 227 |
|
| 228 | #define ELF_CLASS ELFCLASS32
|
| 229 |
|
| 230 | #define ELF_CORE_COPY_REGS(dest, regs) \
|
| 231 | mips_dump_regs32((u32 *)&(dest), (regs));
|
| 232 |
|
| 233 | #endif
|
| 234 |
|
| 235 | #ifdef CONFIG_64BIT
|
| 236 | |
| 237 | * This is used to ensure we don't load something for the wrong architecture.
|
| 238 |
|
| 239 | #define elf_check_arch elf64_check_arch
|
| 240 | #define compat_elf_check_arch elf32_check_arch
|
| 241 |
|
| 242 | |
| 243 | * These are used to set parameters in the core dumps.
|
| 244 |
|
| 245 | #define ELF_CLASS ELFCLASS64
|
| 246 |
|
| 247 | #define ELF_CORE_COPY_REGS(dest, regs) \
|
| 248 | mips_dump_regs64((u64 *)&(dest), (regs));
|
| 249 |
|
| 250 | #endif
|
| 251 |
|
| 252 | |
| 253 | * These are used to set parameters in the core dumps.
|
| 254 |
|
| 255 | #ifdef __MIPSEB__
|
| 256 | #define ELF_DATA ELFDATA2MSB
|
| 257 | #elif defined(__MIPSEL__)
|
| 258 | #define ELF_DATA ELFDATA2LSB
|
| 259 | #endif
|
| 260 | #define ELF_ARCH EM_MIPS
|
| 261 |
|
| 262 | |
| 263 | * In order to be sure that we don't attempt to execute an O32 binary which
|
| 264 | * requires 64 bit FP (FR=1) on a system which does not support it we refuse
|
| 265 | * to execute any binary which has bits specified by the following macro set
|
| 266 | * in its ELF header flags.
|
| 267 |
|
| 268 | #ifdef CONFIG_MIPS_O32_FP64_SUPPORT
|
| 269 | # define __MIPS_O32_FP64_MUST_BE_ZERO 0
|
| 270 | #else
|
| 271 | # define __MIPS_O32_FP64_MUST_BE_ZERO EF_MIPS_FP64
|
| 272 | #endif
|
| 273 |
|
| 274 | #define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)
|
| 275 |
|
| 276 | #define vmcore_elf32_check_arch mips_elf_check_machine
|
| 277 | #define vmcore_elf64_check_arch mips_elf_check_machine
|
| 278 |
|
| 279 | |
| 280 | * Return non-zero if HDR identifies an o32 or n32 ELF binary.
|
| 281 |
|
| 282 | #define elf32_check_arch(hdr) \
|
| 283 | ({ \
|
| 284 | int __res = 1; \
|
| 285 | struct elfhdr *__h = (hdr); \
|
| 286 | \
|
| 287 | if (!mips_elf_check_machine(__h)) \
|
| 288 | __res = 0; \
|
| 289 | if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
|
| 290 | __res = 0; \
|
| 291 | if ((__h->e_flags & EF_MIPS_ABI2) != 0) { \
|
| 292 | if (!IS_ENABLED(CONFIG_MIPS32_N32) || \
|
| 293 | (__h->e_flags & EF_MIPS_ABI)) \
|
| 294 | __res = 0; \
|
| 295 | } else { \
|
| 296 | if (IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_MIPS32_O32)) \
|
| 297 | __res = 0; \
|
| 298 | if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
|
| 299 | ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
|
| 300 | __res = 0; \
|
| 301 | if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO) \
|
| 302 | __res = 0; \
|
| 303 | } \
|
| 304 | __res; \
|
| 305 | })
|
| 306 |
|
| 307 | |
| 308 | * Return non-zero if HDR identifies an n64 ELF binary.
|
| 309 |
|
| 310 | #define elf64_check_arch(hdr) \
|
| 311 | ({ \
|
| 312 | int __res = 1; \
|
| 313 | struct elfhdr *__h = (hdr); \
|
| 314 | \
|
| 315 | if (!mips_elf_check_machine(__h)) \
|
| 316 | __res = 0; \
|
| 317 | if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
|
| 318 | __res = 0; \
|
| 319 | \
|
| 320 | __res; \
|
| 321 | })
|
| 322 |
|
| 323 | struct mips_abi;
|
| 324 |
|
| 325 | extern struct mips_abi mips_abi;
|
| 326 | extern struct mips_abi mips_abi_32;
|
| 327 | extern struct mips_abi mips_abi_n32;
|
| 328 |
|
| 329 | #ifdef CONFIG_32BIT
|
| 330 |
|
| 331 | #define SET_PERSONALITY2(ex, state) \
|
| 332 | do { \
|
| 333 | clear_thread_flag(TIF_HYBRID_FPREGS); \
|
| 334 | set_thread_flag(TIF_32BIT_FPREGS); \
|
| 335 | \
|
| 336 | current->thread.abi = &mips_abi; \
|
| 337 | \
|
| 338 | mips_set_personality_fp(state); \
|
| 339 | mips_set_personality_nan(state); \
|
| 340 | \
|
| 341 | if (personality(current->personality) != PER_LINUX) \
|
| 342 | set_personality(PER_LINUX); \
|
| 343 | } while (0)
|
| 344 |
|
| 345 | #endif
|
| 346 |
|
| 347 | #ifdef CONFIG_64BIT
|
| 348 |
|
| 349 | #ifdef CONFIG_MIPS32_N32
|
| 350 | #define __SET_PERSONALITY32_N32() \
|
| 351 | do { \
|
| 352 | set_thread_flag(TIF_32BIT_ADDR); \
|
| 353 | \
|
| 354 | current->thread.abi = &mips_abi_n32; \
|
| 355 | } while (0)
|
| 356 | #else
|
| 357 | #define __SET_PERSONALITY32_N32() \
|
| 358 | do { } while (0)
|
| 359 | #endif
|
| 360 |
|
| 361 | #ifdef CONFIG_MIPS32_O32
|
| 362 | #define __SET_PERSONALITY32_O32(ex, state) \
|
| 363 | do { \
|
| 364 | set_thread_flag(TIF_32BIT_REGS); \
|
| 365 | set_thread_flag(TIF_32BIT_ADDR); \
|
| 366 | clear_thread_flag(TIF_HYBRID_FPREGS); \
|
| 367 | set_thread_flag(TIF_32BIT_FPREGS); \
|
| 368 | \
|
| 369 | current->thread.abi = &mips_abi_32; \
|
| 370 | \
|
| 371 | mips_set_personality_fp(state); \
|
| 372 | } while (0)
|
| 373 | #else
|
| 374 | #define __SET_PERSONALITY32_O32(ex, state) \
|
| 375 | do { } while (0)
|
| 376 | #endif
|
| 377 |
|
| 378 | #ifdef CONFIG_MIPS32_COMPAT
|
| 379 | #define __SET_PERSONALITY32(ex, state) \
|
| 380 | do { \
|
| 381 | if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
|
| 382 | ((ex).e_flags & EF_MIPS_ABI) == 0) \
|
| 383 | __SET_PERSONALITY32_N32(); \
|
| 384 | else \
|
| 385 | __SET_PERSONALITY32_O32(ex, state); \
|
| 386 | } while (0)
|
| 387 | #else
|
| 388 | #define __SET_PERSONALITY32(ex, state) do { } while (0)
|
| 389 | #endif
|
| 390 |
|
| 391 | #define SET_PERSONALITY2(ex, state) \
|
| 392 | do { \
|
| 393 | unsigned int p; \
|
| 394 | \
|
| 395 | clear_thread_flag(TIF_32BIT_REGS); \
|
| 396 | clear_thread_flag(TIF_32BIT_FPREGS); \
|
| 397 | clear_thread_flag(TIF_HYBRID_FPREGS); \
|
| 398 | clear_thread_flag(TIF_32BIT_ADDR); \
|
| 399 | current->personality &= ~READ_IMPLIES_EXEC; \
|
| 400 | \
|
| 401 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
|
| 402 | __SET_PERSONALITY32(ex, state); \
|
| 403 | else \
|
| 404 | current->thread.abi = &mips_abi; \
|
| 405 | \
|
| 406 | mips_set_personality_nan(state); \
|
| 407 | \
|
| 408 | p = personality(current->personality); \
|
| 409 | if (p != PER_LINUX32 && p != PER_LINUX) \
|
| 410 | set_personality(PER_LINUX); \
|
| 411 | } while (0)
|
| 412 |
|
| 413 | #endif
|
| 414 |
|
| 415 | #define CORE_DUMP_USE_REGSET
|
| 416 | #define ELF_EXEC_PAGESIZE PAGE_SIZE
|
| 417 |
|
| 418 | |
| 419 | instruction set this cpu supports. This could be done in userspace,
|
| 420 | but it's not easy, and we've already done it here.
|
| 421 |
|
| 422 | #define ELF_HWCAP (elf_hwcap)
|
| 423 | extern unsigned int elf_hwcap;
|
| 424 | #include <asm/hwcap.h>
|
| 425 |
|
| 426 | |
| 427 | * This yields a string that ld.so will use to load implementation
|
| 428 | * specific libraries for optimization. This is more specific in
|
| 429 | * intent than poking at uname or /proc/cpuinfo.
|
| 430 |
|
| 431 |
|
| 432 | #define ELF_PLATFORM __elf_platform
|
| 433 | extern const char *__elf_platform;
|
| 434 |
|
| 435 | #define ELF_BASE_PLATFORM __elf_base_platform
|
| 436 | extern const char *__elf_base_platform;
|
| 437 |
|
| 438 | |
| 439 | * See comments in asm-alpha/elf.h, this is the same thing
|
| 440 | * on the MIPS.
|
| 441 |
|
| 442 | #define ELF_PLAT_INIT(_r, load_addr) do { \
|
| 443 | _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
|
| 444 | _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
|
| 445 | _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
|
| 446 | _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
|
| 447 | _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
|
| 448 | _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
|
| 449 | _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
|
| 450 | _r->regs[30] = _r->regs[31] = 0; \
|
| 451 | } while (0)
|
| 452 |
|
| 453 | |
| 454 | use of this is to invoke "./ld.so someprog" to test out a new version of
|
| 455 | the loader. We need to make sure that it is out of the way of the program
|
| 456 | that it will "exec", and that there is sufficient room for the brk.
|
| 457 |
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| 458 | #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
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| 459 |
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| 460 |
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| 461 | #define ARCH_DLINFO \
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| 462 | do { \
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| 463 | NEW_AUX_ENT(AT_SYSINFO_EHDR, \
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| 464 | (unsigned long)current->mm->context.vdso); \
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| 465 | } while (0)
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| 466 |
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| 467 | #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
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| 468 | struct linux_binprm;
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| 469 | extern int arch_setup_additional_pages(struct linux_binprm *bprm,
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| 470 | int uses_interp);
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| 471 |
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| 472 | #ifdef CONFIG_MIPS_FP_SUPPORT
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| 473 |
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| 474 | struct arch_elf_state {
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| 475 | int nan_2008;
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| 476 | int fp_abi;
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| 477 | int interp_fp_abi;
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| 478 | int overall_fp_mode;
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| 479 | };
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| 480 |
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| 481 | #define MIPS_ABI_FP_UNKNOWN (-1)
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| 482 |
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| 483 | #define INIT_ARCH_ELF_STATE { \
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| 484 | .nan_2008 = -1, \
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| 485 | .fp_abi = MIPS_ABI_FP_UNKNOWN, \
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| 486 | .interp_fp_abi = MIPS_ABI_FP_UNKNOWN, \
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| 487 | .overall_fp_mode = -1, \
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| 488 | }
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| 489 |
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| 490 | extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
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| 491 | bool is_interp, struct arch_elf_state *state);
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| 492 |
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| 493 | extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
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| 494 | struct arch_elf_state *state);
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| 495 |
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| 496 |
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| 497 | extern bool mips_use_nan_legacy;
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| 498 | extern bool mips_use_nan_2008;
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| 499 |
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| 500 | extern void mips_set_personality_nan(struct arch_elf_state *state);
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| 501 | extern void mips_set_personality_fp(struct arch_elf_state *state);
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| 502 |
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| 503 | #else
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| 504 |
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| 505 | struct arch_elf_state;
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| 506 |
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| 507 | static inline void mips_set_personality_nan(struct arch_elf_state *state)
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| 508 | {
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| 509 |
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| 510 | }
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| 511 |
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| 512 | static inline void mips_set_personality_fp(struct arch_elf_state *state)
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| 513 | {
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| 514 |
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| 515 | }
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| 516 |
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| 517 | #endif
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| 518 |
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| 519 | #define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk)
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| 520 | extern int mips_elf_read_implies_exec(void *elf_ex, int exstack);
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| 521 |
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| 522 | #endif
|