| 1 | |
| 2 | * This file is subject to the terms and conditions of the GNU General Public
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| 3 | * License. See the file "COPYING" in the main directory of this archive
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| 4 | * for more details.
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| 5 | *
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| 6 | * Copyright (C) 2000 Harald Koerfgen
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| 7 |
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| 8 |
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| 9 | #ifndef __ASM_IP32_INTS_H
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| 10 | #define __ASM_IP32_INTS_H
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| 11 |
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| 12 | #include <asm/irq.h>
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| 13 |
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| 14 | |
| 15 | * This list reflects the assignment of interrupt numbers to
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| 16 | * interrupting events. Order is fairly irrelevant to handling
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| 17 | * priority. This differs from irix.
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| 18 |
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| 19 |
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| 20 | enum ip32_irq_no {
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| 21 | |
| 22 | * CPU interrupts are 0 ... 7
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| 23 |
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| 24 |
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| 25 | CRIME_IRQ_BASE = MIPS_CPU_IRQ_BASE + 8,
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| 26 |
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| 27 | |
| 28 | * MACE
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| 29 |
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| 30 | MACE_VID_IN1_IRQ = CRIME_IRQ_BASE,
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| 31 | MACE_VID_IN2_IRQ,
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| 32 | MACE_VID_OUT_IRQ,
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| 33 | MACE_ETHERNET_IRQ,
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| 34 |
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| 35 | __MACE_SUPERIO,
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| 36 | __MACE_MISC,
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| 37 | __MACE_AUDIO,
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| 38 | MACE_PCI_BRIDGE_IRQ,
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| 39 |
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| 40 | |
| 41 | * MACEPCI
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| 42 |
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| 43 | MACEPCI_SCSI0_IRQ,
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| 44 | MACEPCI_SCSI1_IRQ,
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| 45 | MACEPCI_SLOT0_IRQ,
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| 46 | MACEPCI_SLOT1_IRQ,
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| 47 | MACEPCI_SLOT2_IRQ,
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| 48 | MACEPCI_SHARED0_IRQ,
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| 49 | MACEPCI_SHARED1_IRQ,
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| 50 | MACEPCI_SHARED2_IRQ,
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| 51 |
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| 52 | |
| 53 | * CRIME
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| 54 |
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| 55 | CRIME_GBE0_IRQ,
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| 56 | CRIME_GBE1_IRQ,
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| 57 | CRIME_GBE2_IRQ,
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| 58 | CRIME_GBE3_IRQ,
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| 59 | CRIME_CPUERR_IRQ,
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| 60 | CRIME_MEMERR_IRQ,
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| 61 | CRIME_RE_EMPTY_E_IRQ,
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| 62 | CRIME_RE_FULL_E_IRQ,
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| 63 | CRIME_RE_IDLE_E_IRQ,
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| 64 | CRIME_RE_EMPTY_L_IRQ,
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| 65 | CRIME_RE_FULL_L_IRQ,
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| 66 | CRIME_RE_IDLE_L_IRQ,
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| 67 | CRIME_SOFT0_IRQ,
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| 68 | CRIME_SOFT1_IRQ,
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| 69 | CRIME_SOFT2_IRQ,
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| 70 | CRIME_SYSCORERR_IRQ = CRIME_SOFT2_IRQ,
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| 71 | CRIME_VICE_IRQ,
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| 72 |
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| 73 | |
| 74 | * MACEISA
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| 75 |
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| 76 | MACEISA_AUDIO_SW_IRQ,
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| 77 | MACEISA_AUDIO_SC_IRQ,
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| 78 | MACEISA_AUDIO1_DMAT_IRQ,
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| 79 | MACEISA_AUDIO1_OF_IRQ,
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| 80 | MACEISA_AUDIO2_DMAT_IRQ,
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| 81 | MACEISA_AUDIO2_MERR_IRQ,
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| 82 | MACEISA_AUDIO3_DMAT_IRQ,
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| 83 | MACEISA_AUDIO3_MERR_IRQ,
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| 84 | MACEISA_RTC_IRQ,
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| 85 | MACEISA_KEYB_IRQ,
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| 86 |
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| 87 | __MACEISA_KEYB_POLL,
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| 88 | MACEISA_MOUSE_IRQ,
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| 89 |
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| 90 | __MACEISA_MOUSE_POLL,
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| 91 | MACEISA_TIMER0_IRQ,
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| 92 | MACEISA_TIMER1_IRQ,
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| 93 | MACEISA_TIMER2_IRQ,
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| 94 | MACEISA_PARALLEL_IRQ,
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| 95 | MACEISA_PAR_CTXA_IRQ,
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| 96 | MACEISA_PAR_CTXB_IRQ,
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| 97 | MACEISA_PAR_MERR_IRQ,
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| 98 | MACEISA_SERIAL1_IRQ,
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| 99 | MACEISA_SERIAL1_TDMAT_IRQ,
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| 100 | MACEISA_SERIAL1_TDMAPR_IRQ,
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| 101 | MACEISA_SERIAL1_TDMAME_IRQ,
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| 102 | MACEISA_SERIAL1_RDMAT_IRQ,
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| 103 | MACEISA_SERIAL1_RDMAOR_IRQ,
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| 104 | MACEISA_SERIAL2_IRQ,
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| 105 | MACEISA_SERIAL2_TDMAT_IRQ,
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| 106 | MACEISA_SERIAL2_TDMAPR_IRQ,
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| 107 | MACEISA_SERIAL2_TDMAME_IRQ,
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| 108 | MACEISA_SERIAL2_RDMAT_IRQ,
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| 109 | MACEISA_SERIAL2_RDMAOR_IRQ,
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| 110 |
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| 111 | IP32_IRQ_MAX = MACEISA_SERIAL2_RDMAOR_IRQ
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| 112 | };
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| 113 |
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| 114 | #endif
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