| 1 | /*
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| 2 | * This file is subject to the terms and conditions of the GNU General Public
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| 3 | * License. See the file "COPYING" in the main directory of this archive
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| 4 | * for more details.
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| 5 | *
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| 6 | * Copyright (C) 1994, 1995 Waldorf Electronics
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| 7 | * Written by Ralf Baechle and Andreas Busse
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| 8 | * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle
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| 9 | * Copyright (C) 1996 Paul M. Antoine
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| 10 | * Modified for DECStation and hence R3000 support by Paul M. Antoine
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| 11 | * Further modifications by David S. Miller and Harald Koerfgen
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| 12 | * Copyright (C) 1999 Silicon Graphics, Inc.
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| 13 | * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
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| 14 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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| 15 | */
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| 16 | |
| 17 | |
| 18 |
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| 19 | |
| 20 | |
| 21 | |
| 22 | |
| 23 | |
| 24 | |
| 25 | |
| 26 |
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| 27 | |
| 28 |
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| 29 | /*
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| 30 | * For the moment disable interrupts, mark the kernel mode and
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| 31 | * set ST0_KX so that the CPU does not spit fire when using
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| 32 | * 64-bit addresses. A full initialization of the CPU's status
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| 33 | * register is done later in per_cpu_trap_init().
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| 34 | */
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| 35 | .macro setup_c0_status set clr
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| 36 | .set push
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| 37 | mfc0 t0, CP0_STATUS
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| 38 | or t0, ST0_KERNEL_CUMASK|\set|0x1f|\clr
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| 39 | xor t0, 0x1f|\clr
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| 40 | mtc0 t0, CP0_STATUS
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| 41 | .set noreorder
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| 42 | sll zero,3 # ehb
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| 43 | .set pop
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| 44 | .endm
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| 45 |
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| 46 | .macro setup_c0_status_pri
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| 47 | #ifdef CONFIG_64BIT
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| 48 | setup_c0_status ST0_KX 0
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| 49 | #else
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| 50 | setup_c0_status 0 0
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| 51 | #endif
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| 52 | .endm
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| 53 |
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| 54 | .macro setup_c0_status_sec
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| 55 | #ifdef CONFIG_64BIT
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| 56 | setup_c0_status ST0_KX ST0_BEV
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| 57 | #else
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| 58 | setup_c0_status 0 ST0_BEV
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| 59 | #endif
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| 60 | .endm
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| 61 |
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| 62 | __HEAD
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| 63 |
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| 64 | #ifndef CONFIG_NO_EXCEPT_FILL
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| 65 | /*
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| 66 | * Reserved space for exception handlers.
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| 67 | * Necessary for machines which link their kernels at KSEG0.
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| 68 | */
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| 69 | .fill 0x400
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| 70 | #endif
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| 71 |
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| 72 | EXPORT(_stext)
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| 73 |
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| 74 | #ifdef CONFIG_BOOT_RAW
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| 75 | /*
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| 76 | * Give us a fighting chance of running if execution beings at the
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| 77 | * kernel load address. This is needed because this platform does
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| 78 | * not have a ELF loader yet.
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| 79 | */
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| 80 | FEXPORT(__kernel_entry)
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| 81 | j kernel_entry
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| 82 | #endif /* CONFIG_BOOT_RAW */
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| 83 |
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| 84 | __REF
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| 85 |
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| 86 | NESTED(kernel_entry, 16, sp) # kernel entry point
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| 87 |
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| 88 | kernel_entry_setup # cpu specific setup
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| 89 |
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| 90 | setup_c0_status_pri
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| 91 |
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| 92 | /* We might not get launched at the address the kernel is linked to,
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| 93 | so we jump there. */
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| 94 | PTR_LA t0, 0f
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| 95 | jr t0
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| 96 | 0:
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| 97 |
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| 98 | PTR_LA t0, __bss_start # clear .bss
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| 99 | LONG_S zero, (t0)
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| 100 | PTR_LA t1, __bss_stop - LONGSIZE
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| 101 | 1:
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| 102 | PTR_ADDIU t0, LONGSIZE
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| 103 | LONG_S zero, (t0)
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| 104 | bne t0, t1, 1b
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| 105 |
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| 106 | LONG_S a0, fw_arg0 # firmware arguments
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| 107 | LONG_S a1, fw_arg1
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| 108 | LONG_S a2, fw_arg2
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| 109 | LONG_S a3, fw_arg3
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| 110 |
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| 111 | MTC0 zero, CP0_CONTEXT # clear context register
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| 112 | #ifdef CONFIG_64BIT
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| 113 | MTC0 zero, CP0_XCONTEXT
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| 114 | #endif
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| 115 | PTR_LA $28, init_thread_union
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| 116 | /* Set the SP after an empty pt_regs. */
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| 117 | PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
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| 118 | PTR_ADDU sp, $28
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| 119 | back_to_back_c0_hazard
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| 120 | set_saved_sp sp, t0, t1
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| 121 | PTR_SUBU sp, 4 * SZREG # init stack pointer
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| 122 |
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| 123 | #ifdef CONFIG_RELOCATABLE
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| 124 | /* Copy kernel and apply the relocations */
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| 125 | jal relocate_kernel
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| 126 |
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| 127 | /* Repoint the sp into the new kernel image */
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| 128 | PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
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| 129 | PTR_ADDU sp, $28
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| 130 | set_saved_sp sp, t0, t1
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| 131 | PTR_SUBU sp, 4 * SZREG # init stack pointer
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| 132 |
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| 133 | /*
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| 134 | * relocate_kernel returns the entry point either
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| 135 | * in the relocated kernel or the original if for
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| 136 | * some reason relocation failed - jump there now
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| 137 | * with instruction hazard barrier because of the
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| 138 | * newly sync'd icache.
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| 139 | */
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| 140 | jr.hb v0
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| 141 | |
| 142 | j start_kernel
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| 143 | |
| 144 | END(kernel_entry)
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| 145 |
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| 146 | |
| 147 | /*
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| 148 | * SMP slave cpus entry point. Board specific code for bootstrap calls this
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| 149 | * function after setting up the stack and gp registers.
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| 150 | */
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| 151 | NESTED(smp_bootstrap, 16, sp)
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| 152 | smp_slave_setup
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| 153 | setup_c0_status_sec
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| 154 | j start_secondary
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| 155 | END(smp_bootstrap)
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| 156 | |