| 1 | |
| 2 | |
| 3 | * This file is subject to the terms and conditions of the GNU General Public
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| 4 | * License. See the file "COPYING" in the main directory of this archive
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| 5 | * for more details.
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| 6 | *
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| 7 | * Some parts derived from x86 version of this file.
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| 8 | *
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| 9 | * Copyright (C) 2013 Cavium, Inc.
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| 10 |
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| 11 |
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| 12 | #include <linux/perf_event.h>
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| 13 |
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| 14 | #include <asm/ptrace.h>
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| 15 |
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| 16 | #ifdef CONFIG_32BIT
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| 17 | u64 perf_reg_abi(struct task_struct *tsk)
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| 18 | {
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| 19 | return PERF_SAMPLE_REGS_ABI_32;
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| 20 | }
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| 21 | #else
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| 22 | u64 perf_reg_abi(struct task_struct *tsk)
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| 23 | {
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| 24 | if (test_tsk_thread_flag(tsk, TIF_32BIT_REGS))
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| 25 | return PERF_SAMPLE_REGS_ABI_32;
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| 26 | else
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| 27 | return PERF_SAMPLE_REGS_ABI_64;
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| 28 | }
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| 29 | #endif
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| 30 |
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| 31 | int perf_reg_validate(u64 mask, bool simd_enabled)
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| 32 | {
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| 33 | if (!mask)
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| 34 | return -EINVAL;
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| 35 | if (mask & ~((1ull << PERF_REG_MIPS_MAX) - 1))
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| 36 | return -EINVAL;
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| 37 | return 0;
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| 38 | }
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| 39 |
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| 40 | u64 perf_reg_value(struct pt_regs *regs, int idx)
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| 41 | {
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| 42 | long v;
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| 43 |
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| 44 | switch (idx) {
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| 45 | case PERF_REG_MIPS_PC:
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| 46 | v = regs->cp0_epc;
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| 47 | break;
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| 48 | case PERF_REG_MIPS_R1 ... PERF_REG_MIPS_R25:
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| 49 | v = regs->regs[idx - PERF_REG_MIPS_R1 + 1];
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| 50 | break;
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| 51 | case PERF_REG_MIPS_R28 ... PERF_REG_MIPS_R31:
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| 52 | v = regs->regs[idx - PERF_REG_MIPS_R28 + 28];
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| 53 | break;
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| 54 |
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| 55 | default:
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| 56 | WARN_ON_ONCE(1);
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| 57 | return 0;
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| 58 | }
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| 59 |
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| 60 | return (s64)v;
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| 61 | }
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| 62 |
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