| 1 | |
| 2 | * This file is subject to the terms and conditions of the GNU General Public
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| 3 | * License. See the file "COPYING" in the main directory of this archive
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| 4 | * for more details.
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| 5 | *
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| 6 | * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
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| 7 | * Copyright (C) 1996 by Paul M. Antoine
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| 8 | * Copyright (C) 1999 Silicon Graphics
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| 9 | * Copyright (C) 2000 MIPS Technologies, Inc.
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| 10 |
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| 11 | #include <asm/irqflags.h>
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| 12 | #include <asm/hazards.h>
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| 13 | #include <linux/compiler.h>
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| 14 | #include <linux/preempt.h>
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| 15 | #include <linux/export.h>
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| 16 | #include <linux/stringify.h>
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| 17 |
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| 18 | #if !defined(CONFIG_CPU_HAS_DIEI)
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| 19 |
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| 20 | |
| 21 | * For cli() we have to insert nops to make sure that the new value
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| 22 | * has actually arrived in the status register before the end of this
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| 23 | * macro.
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| 24 | * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
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| 25 | * no nops at all.
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| 26 |
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| 27 | |
| 28 | * For TX49, operating only IE bit is not enough.
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| 29 | *
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| 30 | * If mfc0 $12 follows store and the mfc0 is last instruction of a
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| 31 | * page and fetching the next instruction causes TLB miss, the result
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| 32 | * of the mfc0 might wrongly contain EXL bit.
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| 33 | *
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| 34 | * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
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| 35 | *
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| 36 | * Workaround: mask EXL bit of the result or place a nop before mfc0.
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| 37 |
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| 38 | notrace void arch_local_irq_disable(void)
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| 39 | {
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| 40 | preempt_disable_notrace();
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| 41 |
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| 42 | __asm__ __volatile__(
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| 43 | " .set push \n"
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| 44 | " .set noat \n"
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| 45 | " mfc0 $1,$12 \n"
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| 46 | " ori $1,0x1f \n"
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| 47 | " xori $1,0x1f \n"
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| 48 | " .set noreorder \n"
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| 49 | " mtc0 $1,$12 \n"
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| 50 | " " __stringify(__irq_disable_hazard) " \n"
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| 51 | " .set pop \n"
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| 52 | :
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| 53 | :
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| 54 | : "memory");
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| 55 |
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| 56 | preempt_enable_notrace();
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| 57 | }
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| 58 | EXPORT_SYMBOL(arch_local_irq_disable);
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| 59 |
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| 60 | notrace unsigned long arch_local_irq_save(void)
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| 61 | {
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| 62 | unsigned long flags;
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| 63 |
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| 64 | preempt_disable_notrace();
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| 65 |
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| 66 | __asm__ __volatile__(
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| 67 | " .set push \n"
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| 68 | " .set reorder \n"
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| 69 | " .set noat \n"
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| 70 | " mfc0 %[flags], $12 \n"
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| 71 | " ori $1, %[flags], 0x1f \n"
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| 72 | " xori $1, 0x1f \n"
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| 73 | " .set noreorder \n"
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| 74 | " mtc0 $1, $12 \n"
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| 75 | " " __stringify(__irq_disable_hazard) " \n"
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| 76 | " .set pop \n"
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| 77 | : [flags] "=r" (flags)
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| 78 | :
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| 79 | : "memory");
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| 80 |
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| 81 | preempt_enable_notrace();
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| 82 |
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| 83 | return flags;
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| 84 | }
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| 85 | EXPORT_SYMBOL(arch_local_irq_save);
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| 86 |
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| 87 | notrace void arch_local_irq_restore(unsigned long flags)
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| 88 | {
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| 89 | unsigned long __tmp1;
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| 90 |
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| 91 | preempt_disable_notrace();
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| 92 |
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| 93 | __asm__ __volatile__(
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| 94 | " .set push \n"
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| 95 | " .set noreorder \n"
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| 96 | " .set noat \n"
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| 97 | " mfc0 $1, $12 \n"
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| 98 | " andi %[flags], 1 \n"
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| 99 | " ori $1, 0x1f \n"
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| 100 | " xori $1, 0x1f \n"
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| 101 | " or %[flags], $1 \n"
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| 102 | " mtc0 %[flags], $12 \n"
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| 103 | " " __stringify(__irq_disable_hazard) " \n"
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| 104 | " .set pop \n"
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| 105 | : [flags] "=r" (__tmp1)
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| 106 | : "0" (flags)
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| 107 | : "memory");
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| 108 |
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| 109 | preempt_enable_notrace();
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| 110 | }
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| 111 | EXPORT_SYMBOL(arch_local_irq_restore);
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| 112 |
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| 113 | #endif
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