| 1 | /*
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| 2 | * Copyright (C) 2009 Wind River Systems Inc
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| 3 | * Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
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| 4 | * Copyright (C) 2004 Microtronix Datacom Ltd
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| 5 | * Copyright (C) 2001 Vic Phillips, Microtronix Datacom Ltd.
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| 6 | *
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| 7 | * Based on head.S for Altera's Excalibur development board with nios processor
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| 8 | *
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| 9 | * Based on the following from the Excalibur sdk distribution:
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| 10 | * NA_MemoryMap.s, NR_JumpToStart.s, NR_Setup.s, NR_CWPManager.s
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| 11 | *
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| 12 | * This file is subject to the terms and conditions of the GNU General Public
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| 13 | * License. See the file "COPYING" in the main directory of this archive
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| 14 | * for more details.
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| 15 | */
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| 16 |
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| 17 | #include <linux/init.h>
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| 18 | #include <linux/linkage.h>
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| 19 | #include <asm/thread_info.h>
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| 20 | #include <asm/processor.h>
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| 21 | #include <asm/cache.h>
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| 22 | #include <asm/page.h>
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| 23 | #include <asm/asm-offsets.h>
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| 24 | #include <asm/asm-macros.h>
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| 25 |
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| 26 | /*
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| 27 | * This global variable is used as an extension to the nios'
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| 28 | * STATUS register to emulate a user/supervisor mode.
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| 29 | */
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| 30 | .data
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| 31 | .align 2
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| 32 | .set noat
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| 33 |
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| 34 | .global _current_thread
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| 35 | _current_thread:
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| 36 | .long 0
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| 37 | /*
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| 38 | * Input(s): passed from u-boot
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| 39 | * r4 - Optional pointer to a board information structure.
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| 40 | * r5 - Optional pointer to the physical starting address of the init RAM
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| 41 | * disk.
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| 42 | * r6 - Optional pointer to the physical ending address of the init RAM
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| 43 | * disk.
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| 44 | * r7 - Optional pointer to the physical starting address of any kernel
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| 45 | * command-line parameters.
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| 46 | */
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| 47 |
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| 48 | /*
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| 49 | * First executable code - detected and jumped to by the ROM bootstrap
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| 50 | * if the code resides in flash (looks for "Nios" at offset 0x0c from
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| 51 | * the potential executable image).
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| 52 | */
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| 53 | __HEAD
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| 54 | ENTRY(_start)
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| 55 | wrctl status, r0 /* Disable interrupts */
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| 56 |
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| 57 | /* Initialize all cache lines within the instruction cache */
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| 58 | movia r1, NIOS2_ICACHE_SIZE
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| 59 | movui r2, NIOS2_ICACHE_LINE_SIZE
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| 60 |
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| 61 | icache_init:
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| 62 | initi r1
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| 63 | sub r1, r1, r2
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| 64 | bgt r1, r0, icache_init
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| 65 | br 1f
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| 66 |
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| 67 | /*
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| 68 | * This is the default location for the exception handler. Code in jump
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| 69 | * to our handler
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| 70 | */
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| 71 | ENTRY(exception_handler_hook)
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| 72 | movia r24, inthandler
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| 73 | jmp r24
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| 74 |
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| 75 | ENTRY(fast_handler)
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| 76 | nextpc et
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| 77 | helper:
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| 78 | stw r3, r3save - helper(et)
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| 79 |
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| 80 | rdctl r3 , pteaddr
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| 81 | srli r3, r3, 12
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| 82 | slli r3, r3, 2
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| 83 | movia et, pgd_current
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| 84 |
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| 85 | ldw et, 0(et)
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| 86 | add r3, et, r3
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| 87 | ldw et, 0(r3)
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| 88 |
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| 89 | rdctl r3, pteaddr
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| 90 | andi r3, r3, 0xfff
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| 91 | add et, r3, et
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| 92 | ldw et, 0(et)
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| 93 | wrctl tlbacc, et
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| 94 | nextpc et
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| 95 | helper2:
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| 96 | ldw r3, r3save - helper2(et)
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| 97 | subi ea, ea, 4
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| 98 | eret
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| 99 | r3save:
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| 100 | .word 0x0
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| 101 | ENTRY(fast_handler_end)
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| 102 |
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| 103 | 1:
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| 104 | /*
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| 105 | * After the instruction cache is initialized, the data cache must
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| 106 | * also be initialized.
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| 107 | */
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| 108 | movia r1, NIOS2_DCACHE_SIZE
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| 109 | movui r2, NIOS2_DCACHE_LINE_SIZE
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| 110 |
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| 111 | dcache_init:
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| 112 | initd 0(r1)
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| 113 | sub r1, r1, r2
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| 114 | bgt r1, r0, dcache_init
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| 115 |
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| 116 | nextpc r1 /* Find out where we are */
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| 117 | chkadr:
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| 118 | movia r2, chkadr
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| 119 | beq r1, r2,finish_move /* We are running in RAM done */
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| 120 | addi r1, r1,(_start - chkadr) /* Source */
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| 121 | movia r2, _start /* Destination */
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| 122 | movia r3, __bss_start /* End of copy */
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| 123 |
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| 124 | loop_move: /* r1: src, r2: dest, r3: last dest */
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| 125 | ldw r8, 0(r1) /* load a word from [r1] */
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| 126 | stw r8, 0(r2) /* store a word to dest [r2] */
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| 127 | flushd 0(r2) /* Flush cache for safety */
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| 128 | addi r1, r1, 4 /* inc the src addr */
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| 129 | addi r2, r2, 4 /* inc the dest addr */
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| 130 | blt r2, r3, loop_move
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| 131 |
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| 132 | movia r1, finish_move /* VMA(_start)->l1 */
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| 133 | jmp r1 /* jmp to _start */
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| 134 |
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| 135 | finish_move:
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| 136 |
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| 137 | /* Mask off all possible interrupts */
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| 138 | wrctl ienable, r0
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| 139 |
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| 140 | /* Clear .bss */
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| 141 | movia r2, __bss_start
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| 142 | movia r1, __bss_stop
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| 143 | 1:
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| 144 | stb r0, 0(r2)
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| 145 | addi r2, r2, 1
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| 146 | bne r1, r2, 1b
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| 147 |
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| 148 | movia r1, init_thread_union /* set stack at top of the task union */
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| 149 | addi sp, r1, THREAD_SIZE
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| 150 | movia r2, _current_thread /* Remember current thread */
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| 151 | stw r1, 0(r2)
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| 152 |
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| 153 | movia r1, nios2_boot_init /* save args r4-r7 passed from u-boot */
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| 154 | callr r1
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| 155 |
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| 156 | movia r1, start_kernel /* call start_kernel as a subroutine */
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| 157 | callr r1
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| 158 |
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| 159 | /* If we return from start_kernel, break to the oci debugger and
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| 160 | * buggered we are.
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| 161 | */
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| 162 | break
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| 163 |
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| 164 | /* End of startup code */
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| 165 | .set at
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