| 1 | /* This file is subject to the terms and conditions of the GNU General Public
|
| 2 | * License. See the file "COPYING" in the main directory of this archive
|
| 3 | * for more details.
|
| 4 | *
|
| 5 | * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
|
| 6 | * Copyright 1999 SuSE GmbH (Philipp Rumpf)
|
| 7 | * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
|
| 8 | * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
|
| 9 | * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
|
| 10 | * Copyright (C) 2004 Kyle McMartin <kyle@debian.org>
|
| 11 | *
|
| 12 | * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
|
| 13 | */
|
| 14 |
|
| 15 | |
| 16 | |
| 17 | |
| 18 |
|
| 19 | |
| 20 |
|
| 21 | |
| 22 | |
| 23 | |
| 24 |
|
| 25 | .level 1.1
|
| 26 |
|
| 27 | __INITDATA
|
| 28 | ENTRY(boot_args)
|
| 29 | .word 0 /* arg0 */
|
| 30 | .word 0 /* arg1 */
|
| 31 | .word 0 /* arg2 */
|
| 32 | .word 0 /* arg3 */
|
| 33 | END(boot_args)
|
| 34 |
|
| 35 | __HEAD
|
| 36 |
|
| 37 | .align 4
|
| 38 | .import init_task,data
|
| 39 | .import init_stack,data
|
| 40 | .import fault_vector_20,code /* IVA parisc 2.0 32 bit */
|
| 41 | |
| 42 | .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
|
| 43 | .import $global$ /* forward declaration */
|
| 44 | |
| 45 | ENTRY(parisc_kernel_start)
|
| 46 | .proc
|
| 47 | .callinfo
|
| 48 |
|
| 49 | /* Make sure sr4-sr7 are set to zero for the kernel address space */
|
| 50 | mtsp %r0,%sr4
|
| 51 | mtsp %r0,%sr5
|
| 52 | mtsp %r0,%sr6
|
| 53 | mtsp %r0,%sr7
|
| 54 |
|
| 55 | /* Clear BSS (shouldn't the boot loader do this?) */
|
| 56 |
|
| 57 | .import __bss_start,data
|
| 58 | .import __bss_stop,data
|
| 59 | .import __end,data
|
| 60 |
|
| 61 | load32 PA(__bss_start),%r3
|
| 62 | load32 PA(__bss_stop),%r4
|
| 63 | $bss_loop:
|
| 64 | cmpb,<<,n %r3,%r4,$bss_loop
|
| 65 | stw,ma %r0,4(%r3)
|
| 66 |
|
| 67 | /* Save away the arguments the boot loader passed in (32 bit args) */
|
| 68 | load32 PA(boot_args),%r1
|
| 69 | stw,ma %arg0,4(%r1)
|
| 70 | stw,ma %arg1,4(%r1)
|
| 71 | stw,ma %arg2,4(%r1)
|
| 72 | stw,ma %arg3,4(%r1)
|
| 73 |
|
| 74 | #if defined(CONFIG_PA20)
|
| 75 | /* check for 64-bit capable CPU as required by current kernel */
|
| 76 | ldi 32,%r10
|
| 77 | mtctl %r10,%cr11
|
| 78 | .level 2.0
|
| 79 | mfctl,w %cr11,%r10
|
| 80 | .level 1.1
|
| 81 | comib,<>,n 0,%r10,$cpu_ok
|
| 82 |
|
| 83 | load32 PA(msg1),%arg0
|
| 84 | ldi msg1_end-msg1,%arg1
|
| 85 | $iodc_panic:
|
| 86 | copy %arg0, %r10
|
| 87 | copy %arg1, %r11
|
| 88 | load32 PA(init_stack),%sp
|
| 89 | #define MEM_CONS 0x3A0
|
| 90 | ldw MEM_CONS+32(%r0),%arg0 // HPA
|
| 91 | ldi ENTRY_IO_COUT,%arg1
|
| 92 | ldw MEM_CONS+36(%r0),%arg2 // SPA
|
| 93 | ldw MEM_CONS+8(%r0),%arg3 // layers
|
| 94 | load32 PA(__bss_start),%r1
|
| 95 | stw %r1,-52(%sp) // arg4
|
| 96 | stw %r0,-56(%sp) // arg5
|
| 97 | stw %r10,-60(%sp) // arg6 = ptr to text
|
| 98 | stw %r11,-64(%sp) // arg7 = len
|
| 99 | stw %r0,-68(%sp) // arg8
|
| 100 | load32 PA(.iodc_panic_ret), %rp
|
| 101 | ldw MEM_CONS+40(%r0),%r1 // ENTRY_IODC
|
| 102 | bv,n (%r1)
|
| 103 | .iodc_panic_ret:
|
| 104 | b . /* wait endless with ... */
|
| 105 | or %r10,%r10,%r10 /* qemu idle sleep */
|
| 106 | msg1: .ascii "Can't boot kernel which was built for PA8x00 CPUs on this machine.\r\n"
|
| 107 | msg1_end:
|
| 108 | .align 4
|
| 109 |
|
| 110 | $cpu_ok:
|
| 111 | #endif
|
| 112 |
|
| 113 | .level PA_ASM_LEVEL
|
| 114 |
|
| 115 | /* Initialize startup VM. Just map first 16/32 MB of memory */
|
| 116 | load32 PA(swapper_pg_dir),%r4
|
| 117 | mtctl %r4,%cr24 /* Initialize kernel root pointer */
|
| 118 | mtctl %r4,%cr25 /* Initialize user root pointer */
|
| 119 |
|
| 120 | #if CONFIG_PGTABLE_LEVELS == 3
|
| 121 | /* Set pmd in pgd */
|
| 122 | load32 PA(pmd0),%r5
|
| 123 | shrd %r5,PxD_VALUE_SHIFT,%r3
|
| 124 | ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
|
| 125 | stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
|
| 126 | ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
|
| 127 | #else
|
| 128 | /* 2-level page table, so pmd == pgd */
|
| 129 | ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
|
| 130 | #endif
|
| 131 |
|
| 132 | /* Fill in pmd with enough pte directories */
|
| 133 | load32 PA(pg0),%r1
|
| 134 | SHRREG %r1,PxD_VALUE_SHIFT,%r3
|
| 135 | ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
|
| 136 |
|
| 137 | ldi ASM_PT_INITIAL,%r1
|
| 138 |
|
| 139 | 1:
|
| 140 | stw %r3,0(%r4)
|
| 141 | ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
|
| 142 | addib,> -1,%r1,1b
|
| 143 | #if CONFIG_PGTABLE_LEVELS == 3
|
| 144 | ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
|
| 145 | #else
|
| 146 | ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
|
| 147 | #endif
|
| 148 |
|
| 149 |
|
| 150 | /* Now initialize the PTEs themselves. We use RWX for
|
| 151 | * everything ... it will get remapped correctly later */
|
| 152 | ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
|
| 153 | load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
|
| 154 | load32 PA(_end),%r1
|
| 155 | SHRREG %r1,PAGE_SHIFT,%r1 /* %r1 is PFN count for _end symbol */
|
| 156 | cmpb,<<,n %r11,%r1,1f
|
| 157 | copy %r1,%r11 /* %r1 PFN count smaller than %r11 */
|
| 158 | 1: load32 PA(pg0),%r1
|
| 159 |
|
| 160 | $pgt_fill_loop:
|
| 161 | STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
|
| 162 | ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */
|
| 163 | addib,> -1,%r11,$pgt_fill_loop
|
| 164 | nop
|
| 165 |
|
| 166 | /* Load the return address...er...crash 'n burn */
|
| 167 | copy %r0,%r2
|
| 168 |
|
| 169 | /* And the RFI Target address too */
|
| 170 | load32 start_parisc,%r11
|
| 171 |
|
| 172 | /* And the initial task pointer */
|
| 173 | load32 init_task,%r6
|
| 174 | mtctl %r6,%cr30
|
| 175 |
|
| 176 | /* And the stack pointer too */
|
| 177 | load32 init_stack,%sp
|
| 178 | tophys_r1 %sp
|
| 179 | #if defined(CONFIG_64BIT) && defined(CONFIG_FUNCTION_TRACER)
|
| 180 | .import _mcount,data
|
| 181 | /* initialize mcount FPTR */
|
| 182 | /* Get the global data pointer */
|
| 183 | loadgp
|
| 184 | load32 PA(_mcount), %r10
|
| 185 | std %dp,0x18(%r10)
|
| 186 | #endif
|
| 187 |
|
| 188 | #define MEM_PDC_LO 0x388
|
| 189 | #define MEM_PDC_HI 0x35C
|
| 190 | #ifdef CONFIG_64BIT
|
| 191 | /* Get PDCE_PROC for monarch CPU. */
|
| 192 | ldw MEM_PDC_LO(%r0),%r3
|
| 193 | ldw MEM_PDC_HI(%r0),%r10
|
| 194 | depd %r10, 31, 32, %r3 /* move to upper word */
|
| 195 | #endif
|
| 196 |
|
| 197 |
|
| 198 | #ifdef CONFIG_SMP
|
| 199 | /* Set the smp rendezvous address into page zero.
|
| 200 | ** It would be safer to do this in init_smp_config() but
|
| 201 | ** it's just way easier to deal with here because
|
| 202 | ** of 64-bit function ptrs and the address is local to this file.
|
| 203 | */
|
| 204 | load32 PA(smp_slave_stext),%r10
|
| 205 | stw %r10,0x10(%r0) /* MEM_RENDEZ */
|
| 206 | stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
|
| 207 |
|
| 208 | /* FALLTHROUGH */
|
| 209 | .procend
|
| 210 |
|
| 211 | #ifdef CONFIG_HOTPLUG_CPU
|
| 212 | /* common_stext is far away in another section... jump there */
|
| 213 | load32 PA(common_stext), %rp
|
| 214 | bv,n (%rp)
|
| 215 |
|
| 216 | /* common_stext and smp_slave_stext needs to be in text section */
|
| 217 | .text
|
| 218 | #endif
|
| 219 |
|
| 220 | /*
|
| 221 | ** Code Common to both Monarch and Slave processors.
|
| 222 | ** Entry:
|
| 223 | **
|
| 224 | ** 1.1:
|
| 225 | ** %r11 must contain RFI target address.
|
| 226 | ** %r25/%r26 args to pass to target function
|
| 227 | ** %r2 in case rfi target decides it didn't like something
|
| 228 | **
|
| 229 | ** 2.0w:
|
| 230 | ** %r3 PDCE_PROC address
|
| 231 | ** %r11 RFI target address
|
| 232 | **
|
| 233 | ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
|
| 234 | */
|
| 235 | common_stext:
|
| 236 | .proc
|
| 237 | .callinfo
|
| 238 | #else
|
| 239 | /* Clear PDC entry point - we won't use it */
|
| 240 | stw %r0,0x10(%r0) /* MEM_RENDEZ */
|
| 241 | stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
|
| 242 | #endif /*CONFIG_SMP*/
|
| 243 |
|
| 244 | #ifdef CONFIG_64BIT
|
| 245 | mfctl %cr30,%r6 /* PCX-W2 firmware bug */
|
| 246 | tophys_r1 %r6
|
| 247 |
|
| 248 | /* Save the rfi target address */
|
| 249 | STREG %r11, TASK_PT_GR11(%r6)
|
| 250 | /* Switch to wide mode Superdome doesn't support narrow PDC
|
| 251 | ** calls.
|
| 252 | */
|
| 253 | 1: mfia %rp /* clear upper part of pcoq */
|
| 254 | ldo 2f-1b(%rp),%rp
|
| 255 | depdi 0,31,32,%rp
|
| 256 | bv (%rp)
|
| 257 | ssm PSW_SM_W,%r0
|
| 258 |
|
| 259 | /* Set Wide mode as the "Default" (eg for traps)
|
| 260 | ** First trap occurs *right* after (or part of) rfi for slave CPUs.
|
| 261 | ** Someday, palo might not do this for the Monarch either.
|
| 262 | */
|
| 263 | 2:
|
| 264 |
|
| 265 | ldo PDC_PSW(%r0),%arg0 /* 21 */
|
| 266 | ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
|
| 267 | ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
|
| 268 | load32 PA(stext_pdc_ret), %rp
|
| 269 | bv (%r3)
|
| 270 | copy %r0,%arg3
|
| 271 |
|
| 272 | stext_pdc_ret:
|
| 273 | LDREG TASK_PT_GR11(%r6), %r11
|
| 274 | tovirt_r1 %r6
|
| 275 | mtctl %r6,%cr30 /* restore task thread info */
|
| 276 | #endif
|
| 277 |
|
| 278 | #ifndef CONFIG_64BIT
|
| 279 | /* clear all BTLBs */
|
| 280 | ldi PDC_BLOCK_TLB,%arg0
|
| 281 | load32 PA(stext_pdc_btlb_ret), %rp
|
| 282 | ldw MEM_PDC_LO(%r0),%r3
|
| 283 | bv (%r3)
|
| 284 | ldi PDC_BTLB_PURGE_ALL,%arg1
|
| 285 | stext_pdc_btlb_ret:
|
| 286 | #endif
|
| 287 |
|
| 288 | /* PARANOID: clear user scratch/user space SR's */
|
| 289 | mtsp %r0,%sr0
|
| 290 | mtsp %r0,%sr1
|
| 291 | mtsp %r0,%sr2
|
| 292 | mtsp %r0,%sr3
|
| 293 |
|
| 294 | /* Initialize Protection Registers */
|
| 295 | mtctl %r0,%cr8
|
| 296 | mtctl %r0,%cr9
|
| 297 | mtctl %r0,%cr12
|
| 298 | mtctl %r0,%cr13
|
| 299 |
|
| 300 | /* Initialize the global data pointer */
|
| 301 | loadgp
|
| 302 |
|
| 303 | /* Set up our interrupt table. HPMCs might not work after this!
|
| 304 | *
|
| 305 | * We need to install the correct iva for PA1.1 or PA2.0. The
|
| 306 | * following short sequence of instructions can determine this
|
| 307 | * (without being illegal on a PA1.1 machine).
|
| 308 | */
|
| 309 | #ifndef CONFIG_64BIT
|
| 310 | ldi 32,%r10
|
| 311 | mtctl %r10,%cr11
|
| 312 | .level 2.0
|
| 313 | mfctl,w %cr11,%r10
|
| 314 | .level 1.1
|
| 315 | comib,<>,n 0,%r10,$is_pa20
|
| 316 | ldil L%PA(fault_vector_11),%r10
|
| 317 | b $install_iva
|
| 318 | ldo R%PA(fault_vector_11)(%r10),%r10
|
| 319 |
|
| 320 | $is_pa20:
|
| 321 | .level PA_ASM_LEVEL /* restore 1.1 || 2.0w */
|
| 322 | #endif /*!CONFIG_64BIT*/
|
| 323 | load32 PA(fault_vector_20),%r10
|
| 324 |
|
| 325 | $install_iva:
|
| 326 | mtctl %r10,%cr14
|
| 327 |
|
| 328 | b aligned_rfi /* Prepare to RFI! Man all the cannons! */
|
| 329 | nop
|
| 330 |
|
| 331 | .align 128
|
| 332 | aligned_rfi:
|
| 333 | pcxt_ssm_bug
|
| 334 |
|
| 335 | copy %r3, %arg0 /* PDCE_PROC for smp_callin() */
|
| 336 |
|
| 337 | rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
|
| 338 | /* Don't need NOPs, have 8 compliant insn before rfi */
|
| 339 |
|
| 340 | mtctl %r0,%cr17 /* Clear IIASQ tail */
|
| 341 | mtctl %r0,%cr17 /* Clear IIASQ head */
|
| 342 |
|
| 343 | /* Load RFI target into PC queue */
|
| 344 | mtctl %r11,%cr18 /* IIAOQ head */
|
| 345 | ldo 4(%r11),%r11
|
| 346 | mtctl %r11,%cr18 /* IIAOQ tail */
|
| 347 |
|
| 348 | load32 KERNEL_PSW,%r10
|
| 349 | mtctl %r10,%ipsw
|
| 350 |
|
| 351 | tovirt_r1 %sp
|
| 352 |
|
| 353 | /* Jump through hyperspace to Virt Mode */
|
| 354 | rfi
|
| 355 | nop
|
| 356 |
|
| 357 | .procend
|
| 358 |
|
| 359 | #ifdef CONFIG_SMP
|
| 360 |
|
| 361 | .import smp_init_current_idle_task,data
|
| 362 | .import smp_callin,code
|
| 363 |
|
| 364 | #ifndef CONFIG_64BIT
|
| 365 | smp_callin_rtn:
|
| 366 | .proc
|
| 367 | .callinfo
|
| 368 | break 1,1 /* Break if returned from start_secondary */
|
| 369 | nop
|
| 370 | nop
|
| 371 | .procend
|
| 372 | #endif /*!CONFIG_64BIT*/
|
| 373 |
|
| 374 | /***************************************************************************
|
| 375 | * smp_slave_stext is executed by all non-monarch Processors when the Monarch
|
| 376 | * pokes the slave CPUs in smp.c:smp_boot_cpus().
|
| 377 | *
|
| 378 | * Once here, registers values are initialized in order to branch to virtual
|
| 379 | * mode. Once all available/eligible CPUs are in virtual mode, all are
|
| 380 | * released and start out by executing their own idle task.
|
| 381 | *****************************************************************************/
|
| 382 | smp_slave_stext:
|
| 383 | .proc
|
| 384 | .callinfo
|
| 385 |
|
| 386 | /*
|
| 387 | ** Initialize Space registers
|
| 388 | */
|
| 389 | mtsp %r0,%sr4
|
| 390 | mtsp %r0,%sr5
|
| 391 | mtsp %r0,%sr6
|
| 392 | mtsp %r0,%sr7
|
| 393 |
|
| 394 | #ifdef CONFIG_64BIT
|
| 395 | /*
|
| 396 | * Enable Wide mode early, in case the task_struct for the idle
|
| 397 | * task in smp_init_current_idle_task was allocated above 4GB.
|
| 398 | */
|
| 399 | 1: mfia %rp /* clear upper part of pcoq */
|
| 400 | ldo 2f-1b(%rp),%rp
|
| 401 | depdi 0,31,32,%rp
|
| 402 | bv (%rp)
|
| 403 | ssm PSW_SM_W,%r0
|
| 404 | 2:
|
| 405 | #endif
|
| 406 |
|
| 407 | /* Initialize the SP - monarch sets up smp_init_current_idle_task */
|
| 408 | load32 PA(smp_init_current_idle_task),%r6
|
| 409 | LDREG 0(%r6),%r6
|
| 410 | mtctl %r6,%cr30
|
| 411 | tophys_r1 %r6
|
| 412 | LDREG TASK_STACK(%r6),%sp
|
| 413 | tophys_r1 %sp
|
| 414 | ldo FRAME_SIZE(%sp),%sp
|
| 415 |
|
| 416 | /* point CPU to kernel page tables */
|
| 417 | load32 PA(swapper_pg_dir),%r4
|
| 418 | mtctl %r4,%cr24 /* Initialize kernel root pointer */
|
| 419 | mtctl %r4,%cr25 /* Initialize user root pointer */
|
| 420 |
|
| 421 | #ifdef CONFIG_64BIT
|
| 422 | /* Setup PDCE_PROC entry */
|
| 423 | copy %arg0,%r3
|
| 424 | #else
|
| 425 | /* Load RFI *return* address in case smp_callin bails */
|
| 426 | load32 smp_callin_rtn,%r2
|
| 427 | #endif
|
| 428 |
|
| 429 | /* Load RFI target address. */
|
| 430 | load32 smp_callin,%r11
|
| 431 |
|
| 432 | /* ok...common code can handle the rest */
|
| 433 | b common_stext
|
| 434 | nop
|
| 435 |
|
| 436 | .procend
|
| 437 | #endif /* CONFIG_SMP */
|
| 438 |
|
| 439 | #ifndef CONFIG_64BIT
|
| 440 | .section .data..ro_after_init
|
| 441 |
|
| 442 | .align 4
|
| 443 | .export $global$,data
|
| 444 |
|
| 445 | .type $global$,@object
|
| 446 | .size $global$,4
|
| 447 | $global$:
|
| 448 | .word 0
|
| 449 | #endif /*!CONFIG_64BIT*/
|