projects/linux·blob master · refs

77 lines · 2.2 KiB

1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_SYNCH_H
3#define _ASM_POWERPC_SYNCH_H
4#ifdef __KERNEL__
5
6#include <asm/cputable.h>
7#include <asm/feature-fixups.h>
8#include <asm/ppc-opcode.h>
9
10#ifndef __ASSEMBLER__
11extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
12extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
13 void *fixup_end);
14
15static inline void eieio(void)
16{
17 if (IS_ENABLED(CONFIG_BOOKE))
18 __asm__ __volatile__ ("mbar" : : : "memory");
19 else
20 __asm__ __volatile__ ("eieio" : : : "memory");
21}
22
23static inline void isync(void)
24{
25 __asm__ __volatile__ ("isync" : : : "memory");
26}
27
28static inline void ppc_after_tlbiel_barrier(void)
29{
30 asm volatile("ptesync": : :"memory");
31 /*
32 * POWER9, POWER10 need a cp_abort after tlbiel to ensure the copy is
33 * invalidated correctly. If this is not done, the paste can take data
34 * from the physical address that was translated at copy time.
35 *
36 * POWER9 in practice does not need this, because address spaces with
37 * accelerators mapped will use tlbie (which does invalidate the copy)
38 * to invalidate translations. It's not possible to limit POWER10 this
39 * way due to local copy-paste.
40 *
41 * POWER12 does not need it.
42 */
43 asm volatile(ASM_FTR_IF(PPC_CP_ABORT, "", %0, %1) :
44 : "i" (CPU_FTR_ARCH_31|CPU_FTR_ARCH_32), "i" (CPU_FTR_ARCH_31)
45 : "memory");
46}
47#endif /* __ASSEMBLER__ */
48
49#if defined(__powerpc64__)
50# define LWSYNC lwsync
51#elif defined(CONFIG_PPC_E500)
52# define LWSYNC \
53 START_LWSYNC_SECTION(96); \
54 sync; \
55 MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup);
56#else
57# define LWSYNC sync
58#endif
59
60#ifdef CONFIG_SMP
61#define __PPC_ACQUIRE_BARRIER \
62 START_LWSYNC_SECTION(97); \
63 isync; \
64 MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
65#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
66#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
67#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(sync) "\n"
68#define PPC_ATOMIC_EXIT_BARRIER "\n" stringify_in_c(sync) "\n"
69#else
70#define PPC_ACQUIRE_BARRIER
71#define PPC_RELEASE_BARRIER
72#define PPC_ATOMIC_ENTRY_BARRIER
73#define PPC_ATOMIC_EXIT_BARRIER
74#endif
75
76#endif /* __KERNEL__ */
77#endif /* _ASM_POWERPC_SYNCH_H */