| 1 | |
| 2 | |
| 3 | |
| 4 | |
| 5 | |
| 6 | |
| 7 | |
| 8 | |
| 9 | |
| 10 | |
| 11 | |
| 12 | |
| 13 | |
| 14 | |
| 15 |
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| 16 | .align 7
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| 17 |
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| 18 | .macro DEBUG_SRR_VALID srr
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| 19 | |
| 20 | .ifc \srr,srr
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| 21 | mfspr r11,SPRN_SRR0
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| 22 | ld r12,_NIP(r1)
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| 23 | clrrdi r11,r11,2
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| 24 | clrrdi r12,r12,2
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| 25 | 100: tdne r11,r12
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| 26 | EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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| 27 | mfspr r11,SPRN_SRR1
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| 28 | ld r12,_MSR(r1)
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| 29 | 100: tdne r11,r12
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| 30 | EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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| 31 | .else
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| 32 | mfspr r11,SPRN_HSRR0
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| 33 | ld r12,_NIP(r1)
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| 34 | clrrdi r11,r11,2
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| 35 | clrrdi r12,r12,2
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| 36 | 100: tdne r11,r12
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| 37 | EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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| 38 | mfspr r11,SPRN_HSRR1
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| 39 | ld r12,_MSR(r1)
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| 40 | 100: tdne r11,r12
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| 41 | EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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| 42 | .endif
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| 43 | |
| 44 | .endm
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| 45 |
|
| 46 | |
| 47 | .macro system_call_vectored name trapnr
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| 48 | .globl system_call_vectored_\name
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| 49 | system_call_vectored_\name:
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| 50 | _ASM_NOKPROBE_SYMBOL(system_call_vectored_\name)
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| 51 | SCV_INTERRUPT_TO_KERNEL
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| 52 | mr r10,r1
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| 53 | ld r1,PACAKSAVE(r13)
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| 54 | std r10,0(r1)
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| 55 | std r11,_LINK(r1)
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| 56 | std r11,_NIP(r1) /* Saved LR is also the next instruction */
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| 57 | std r12,_MSR(r1)
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| 58 | std r0,GPR0(r1)
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| 59 | std r10,GPR1(r1)
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| 60 | std r2,GPR2(r1)
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| 61 | LOAD_PACA_TOC()
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| 62 | mfcr r12
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| 63 | li r11,0
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| 64 | /* Save syscall parameters in r3-r8 */
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| 65 | SAVE_GPRS(3, 8, r1)
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| 66 | /* Zero r9-r12, this should only be required when restoring all GPRs */
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| 67 | std r11,GPR9(r1)
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| 68 | std r11,GPR10(r1)
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| 69 | std r11,GPR11(r1)
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| 70 | std r11,GPR12(r1)
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| 71 | std r9,GPR13(r1)
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| 72 | SAVE_NVGPRS(r1)
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| 73 | std r11,_XER(r1)
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| 74 | std r11,_CTR(r1)
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| 75 |
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| 76 | li r11,\trapnr
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| 77 | std r11,_TRAP(r1)
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| 78 | std r12,_CCR(r1)
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| 79 | std r3,ORIG_GPR3(r1)
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| 80 | LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER)
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| 81 | std r11,STACK_INT_FRAME_MARKER(r1) /* "regs" marker */
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| 82 | /* Calling convention has r3 = regs, r4 = orig r0 */
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| 83 | addi r3,r1,STACK_INT_FRAME_REGS
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| 84 | mr r4,r0
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| 85 |
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| 86 | BEGIN_FTR_SECTION
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| 87 | HMT_MEDIUM
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| 88 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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| 89 |
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| 90 | /*
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| 91 | * scv enters with MSR[EE]=1 and is immediately considered soft-masked.
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| 92 | * The entry vector already sets PACAIRQSOFTMASK to IRQS_ALL_DISABLED,
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| 93 | * and interrupts may be masked and pending already.
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| 94 | * system_call_exception() will call trace_hardirqs_off() which means
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| 95 | * interrupts could already have been blocked before trace_hardirqs_off,
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| 96 | * but this is the best we can do.
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| 97 | */
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| 98 |
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| 99 | /*
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| 100 | * Zero user registers to prevent influencing speculative execution
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| 101 | * state of kernel code.
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| 102 | */
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| 103 | SANITIZE_SYSCALL_GPRS()
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| 104 | bl CFUNC(system_call_exception)
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| 105 |
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| 106 | .Lsyscall_vectored_\name\()_exit:
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| 107 | addi r4,r1,STACK_INT_FRAME_REGS
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| 108 | li r5,1 /* scv */
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| 109 | bl CFUNC(syscall_exit_prepare)
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| 110 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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| 111 | .Lsyscall_vectored_\name\()_rst_start:
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| 112 | lbz r11,PACAIRQHAPPENED(r13)
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| 113 | andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
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| 114 | bne- syscall_vectored_\name\()_restart
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| 115 | li r11,IRQS_ENABLED
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| 116 | stb r11,PACAIRQSOFTMASK(r13)
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| 117 | li r11,0
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| 118 | stb r11,PACAIRQHAPPENED(r13) |
| 119 |
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| 120 | ld r2,_CCR(r1)
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| 121 | ld r4,_NIP(r1)
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| 122 | ld r5,_MSR(r1)
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| 123 |
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| 124 | BEGIN_FTR_SECTION
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| 125 | stdcx. r0,0,r1 /* to clear the reservation */
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| 126 | END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
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| 127 |
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| 128 | BEGIN_FTR_SECTION
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| 129 | HMT_MEDIUM_LOW
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| 130 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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| 131 |
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| 132 | SANITIZE_RESTORE_NVGPRS()
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| 133 | cmpdi r3,0
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| 134 | bne .Lsyscall_vectored_\name\()_restore_regs
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| 135 |
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| 136 | /* rfscv returns with LR->NIA and CTR->MSR */
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| 137 | mtlr r4
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| 138 | mtctr r5
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| 139 |
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| 140 | /* Could zero these as per ABI, but we may consider a stricter ABI
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| 141 | * which preserves these if libc implementations can benefit, so
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| 142 | * restore them for now until further measurement is done. */
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| 143 | REST_GPR(0, r1)
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| 144 | REST_GPRS(4, 8, r1)
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| 145 | /* Zero volatile regs that may contain sensitive kernel data */
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| 146 | ZEROIZE_GPRS(9, 12)
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| 147 | mtspr SPRN_XER,r0
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| 148 |
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| 149 | /*
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| 150 | * We don't need to restore AMR on the way back to userspace for KUAP.
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| 151 | * The value of AMR only matters while we're in the kernel.
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| 152 | */
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| 153 | mtcr r2
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| 154 | REST_GPRS(2, 3, r1)
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| 155 | REST_GPR(13, r1)
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| 156 | REST_GPR(1, r1)
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| 157 | RFSCV_TO_USER
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| 158 | b . /* prevent speculative execution */
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| 159 |
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| 160 | .Lsyscall_vectored_\name\()_restore_regs:
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| 161 | mtspr SPRN_SRR0,r4
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| 162 | mtspr SPRN_SRR1,r5
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| 163 |
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| 164 | ld r3,_CTR(r1)
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| 165 | ld r4,_LINK(r1)
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| 166 | ld r5,_XER(r1)
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| 167 |
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| 168 | HANDLER_RESTORE_NVGPRS()
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| 169 | REST_GPR(0, r1)
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| 170 | mtcr r2
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| 171 | mtctr r3
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| 172 | mtlr r4
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| 173 | mtspr SPRN_XER,r5
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| 174 | REST_GPRS(2, 13, r1)
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| 175 | REST_GPR(1, r1)
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| 176 | RFI_TO_USER
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| 177 | .Lsyscall_vectored_\name\()_rst_end:
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| 178 |
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| 179 | syscall_vectored_\name\()_restart:
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| 180 | _ASM_NOKPROBE_SYMBOL(syscall_vectored_\name\()_restart)
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| 181 | GET_PACA(r13)
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| 182 | ld r1,PACA_EXIT_SAVE_R1(r13)
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| 183 | LOAD_PACA_TOC()
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| 184 | ld r3,RESULT(r1)
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| 185 | addi r4,r1,STACK_INT_FRAME_REGS
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| 186 | li r11,IRQS_ALL_DISABLED
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| 187 | stb r11,PACAIRQSOFTMASK(r13)
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| 188 | bl CFUNC(syscall_exit_restart)
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| 189 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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| 190 | b .Lsyscall_vectored_\name\()_rst_start
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| 191 | 1:
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| 192 |
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| 193 | SOFT_MASK_TABLE(.Lsyscall_vectored_\name\()_rst_start, 1b)
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| 194 | RESTART_TABLE(.Lsyscall_vectored_\name\()_rst_start, .Lsyscall_vectored_\name\()_rst_end, syscall_vectored_\name\()_restart)
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| 195 |
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| 196 | .endm
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| 197 |
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| 198 | system_call_vectored common 0x3000
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| 199 |
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| 200 | /*
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| 201 | * We instantiate another entry copy for the SIGILL variant, with TRAP=0x7ff0
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| 202 | * which is tested by system_call_exception when r0 is -1 (as set by vector
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| 203 | * entry code).
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| 204 | */
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| 205 | system_call_vectored sigill 0x7ff0
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| 206 |
|
| 207 | |
| 208 |
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| 209 | .balign IFETCH_ALIGN_BYTES
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| 210 | .globl system_call_common_real
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| 211 | system_call_common_real:
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| 212 | _ASM_NOKPROBE_SYMBOL(system_call_common_real)
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| 213 | ld r10,PACAKMSR(r13) /* get MSR value for kernel */
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| 214 | mtmsrd r10
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| 215 |
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| 216 | .balign IFETCH_ALIGN_BYTES
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| 217 | .globl system_call_common
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| 218 | system_call_common:
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| 219 | _ASM_NOKPROBE_SYMBOL(system_call_common)
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| 220 | mr r10,r1
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| 221 | ld r1,PACAKSAVE(r13)
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| 222 | std r10,0(r1)
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| 223 | std r11,_NIP(r1)
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| 224 | std r12,_MSR(r1)
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| 225 | std r0,GPR0(r1)
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| 226 | std r10,GPR1(r1)
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| 227 | std r2,GPR2(r1)
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| 228 | |
| 229 | START_BTB_FLUSH_SECTION
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| 230 | BTB_FLUSH(r10)
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| 231 | END_BTB_FLUSH_SECTION
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| 232 | |
| 233 | LOAD_PACA_TOC()
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| 234 | mfcr r12
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| 235 | li r11,0
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| 236 | /* Save syscall parameters in r3-r8 */
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| 237 | SAVE_GPRS(3, 8, r1)
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| 238 | /* Zero r9-r12, this should only be required when restoring all GPRs */
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| 239 | std r11,GPR9(r1)
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| 240 | std r11,GPR10(r1)
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| 241 | std r11,GPR11(r1)
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| 242 | std r11,GPR12(r1)
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| 243 | std r9,GPR13(r1)
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| 244 | SAVE_NVGPRS(r1)
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| 245 | std r11,_XER(r1)
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| 246 | std r11,_CTR(r1)
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| 247 | mflr r10
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| 248 |
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| 249 | /*
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| 250 | * This clears CR0.SO (bit 28), which is the error indication on
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| 251 | * return from this system call.
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| 252 | */
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| 253 | rldimi r12,r11,28,(63-28)
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| 254 | li r11,0xc00
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| 255 | std r10,_LINK(r1)
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| 256 | std r11,_TRAP(r1)
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| 257 | std r12,_CCR(r1)
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| 258 | std r3,ORIG_GPR3(r1)
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| 259 | LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER)
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| 260 | std r11,STACK_INT_FRAME_MARKER(r1) /* "regs" marker */
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| 261 | /* Calling convention has r3 = regs, r4 = orig r0 */
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| 262 | addi r3,r1,STACK_INT_FRAME_REGS
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| 263 | mr r4,r0
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| 264 |
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| 265 | |
| 266 | li r11,1
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| 267 | stb r11,PACASRR_VALID(r13)
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| 268 | |
| 269 |
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| 270 | /*
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| 271 | * We always enter kernel from userspace with irq soft-mask enabled and
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| 272 | * nothing pending. system_call_exception() will call
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| 273 | * trace_hardirqs_off().
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| 274 | */
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| 275 | li r11,IRQS_ALL_DISABLED
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| 276 | stb r11,PACAIRQSOFTMASK(r13)
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| 277 | |
| 278 | li r12,-1 /* Set MSR_EE and MSR_RI */
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| 279 | mtmsrd r12,1
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| 280 | |
| 281 | wrteei 1
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| 282 | |
| 283 |
|
| 284 | /*
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| 285 | * Zero user registers to prevent influencing speculative execution
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| 286 | * state of kernel code.
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| 287 | */
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| 288 | SANITIZE_SYSCALL_GPRS()
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| 289 | bl CFUNC(system_call_exception)
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| 290 |
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| 291 | .Lsyscall_exit:
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| 292 | addi r4,r1,STACK_INT_FRAME_REGS
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| 293 | li r5,0 /* !scv */
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| 294 | bl CFUNC(syscall_exit_prepare)
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| 295 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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| 296 | |
| 297 | .Lsyscall_rst_start:
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| 298 | lbz r11,PACAIRQHAPPENED(r13)
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| 299 | andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
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| 300 | bne- syscall_restart
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| 301 | |
| 302 | li r11,IRQS_ENABLED
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| 303 | stb r11,PACAIRQSOFTMASK(r13)
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| 304 | li r11,0
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| 305 | stb r11,PACAIRQHAPPENED(r13) |
| 306 |
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| 307 | ld r2,_CCR(r1)
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| 308 | ld r6,_LINK(r1)
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| 309 | mtlr r6
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| 310 |
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| 311 | |
| 312 | lbz r4,PACASRR_VALID(r13)
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| 313 | cmpdi r4,0
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| 314 | bne 1f
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| 315 | li r4,0
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| 316 | stb r4,PACASRR_VALID(r13)
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| 317 | |
| 318 | ld r4,_NIP(r1)
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| 319 | ld r5,_MSR(r1)
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| 320 | mtspr SPRN_SRR0,r4
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| 321 | mtspr SPRN_SRR1,r5
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| 322 | 1:
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| 323 | DEBUG_SRR_VALID srr
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| 324 |
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| 325 | BEGIN_FTR_SECTION
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| 326 | stdcx. r0,0,r1 /* to clear the reservation */
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| 327 | END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
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| 328 |
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| 329 | SANITIZE_RESTORE_NVGPRS()
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| 330 | cmpdi r3,0
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| 331 | bne .Lsyscall_restore_regs
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| 332 | /* Zero volatile regs that may contain sensitive kernel data */
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| 333 | ZEROIZE_GPR(0)
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| 334 | ZEROIZE_GPRS(4, 12)
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| 335 | mtctr r0
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| 336 | mtspr SPRN_XER,r0
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| 337 | .Lsyscall_restore_regs_cont:
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| 338 |
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| 339 | BEGIN_FTR_SECTION
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| 340 | HMT_MEDIUM_LOW
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| 341 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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| 342 |
|
| 343 | /*
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| 344 | * We don't need to restore AMR on the way back to userspace for KUAP.
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| 345 | * The value of AMR only matters while we're in the kernel.
|
| 346 | */
|
| 347 | mtcr r2
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| 348 | REST_GPRS(2, 3, r1)
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| 349 | REST_GPR(13, r1)
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| 350 | REST_GPR(1, r1)
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| 351 | RFI_TO_USER
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| 352 | b . /* prevent speculative execution */
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| 353 |
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| 354 | .Lsyscall_restore_regs:
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| 355 | ld r3,_CTR(r1)
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| 356 | ld r4,_XER(r1)
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| 357 | HANDLER_RESTORE_NVGPRS()
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| 358 | mtctr r3
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| 359 | mtspr SPRN_XER,r4
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| 360 | REST_GPR(0, r1)
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| 361 | REST_GPRS(4, 12, r1)
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| 362 | b .Lsyscall_restore_regs_cont
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| 363 | .Lsyscall_rst_end:
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| 364 |
|
| 365 | |
| 366 | syscall_restart:
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| 367 | _ASM_NOKPROBE_SYMBOL(syscall_restart)
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| 368 | GET_PACA(r13)
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| 369 | ld r1,PACA_EXIT_SAVE_R1(r13)
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| 370 | LOAD_PACA_TOC()
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| 371 | ld r3,RESULT(r1)
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| 372 | addi r4,r1,STACK_INT_FRAME_REGS
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| 373 | li r11,IRQS_ALL_DISABLED
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| 374 | stb r11,PACAIRQSOFTMASK(r13)
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| 375 | bl CFUNC(syscall_exit_restart)
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| 376 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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| 377 | b .Lsyscall_rst_start
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| 378 | 1:
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| 379 |
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| 380 | SOFT_MASK_TABLE(.Lsyscall_rst_start, 1b)
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| 381 | RESTART_TABLE(.Lsyscall_rst_start, .Lsyscall_rst_end, syscall_restart)
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| 382 | |
| 383 |
|
| 384 | /*
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| 385 | * If MSR EE/RI was never enabled, IRQs not reconciled, NVGPRs not
|
| 386 | * touched, no exit work created, then this can be used.
|
| 387 | */
|
| 388 | .balign IFETCH_ALIGN_BYTES
|
| 389 | .globl fast_interrupt_return_srr
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| 390 | fast_interrupt_return_srr:
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| 391 | _ASM_NOKPROBE_SYMBOL(fast_interrupt_return_srr)
|
| 392 | kuap_check_amr r3, r4
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| 393 | ld r5,_MSR(r1)
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| 394 | andi. r0,r5,MSR_PR
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| 395 | |
| 396 | beq 1f
|
| 397 | kuap_user_restore r3, r4
|
| 398 | b .Lfast_user_interrupt_return_srr
|
| 399 | 1: kuap_kernel_restore r3, r4
|
| 400 | andi. r0,r5,MSR_RI
|
| 401 | li r3,0 /* 0 return value, no EMULATE_STACK_STORE */
|
| 402 | bne+ .Lfast_kernel_interrupt_return_srr
|
| 403 | addi r3,r1,STACK_INT_FRAME_REGS
|
| 404 | bl CFUNC(unrecoverable_exception)
|
| 405 | b . /* should not get here */
|
| 406 | |
| 407 | bne .Lfast_user_interrupt_return_srr
|
| 408 | b .Lfast_kernel_interrupt_return_srr
|
| 409 | |
| 410 |
|
| 411 | .macro interrupt_return_macro srr
|
| 412 | .balign IFETCH_ALIGN_BYTES
|
| 413 | .globl interrupt_return_\srr
|
| 414 | interrupt_return_\srr\():
|
| 415 | _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\())
|
| 416 | ld r4,_MSR(r1)
|
| 417 | andi. r0,r4,MSR_PR
|
| 418 | beq interrupt_return_\srr\()_kernel
|
| 419 | interrupt_return_\srr\()_user: /* make backtraces match the _kernel variant */
|
| 420 | _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user)
|
| 421 | addi r3,r1,STACK_INT_FRAME_REGS
|
| 422 | bl CFUNC(interrupt_exit_user_prepare)
|
| 423 | |
| 424 | cmpdi r3,0
|
| 425 | bne- .Lrestore_nvgprs_\srr
|
| 426 | .Lrestore_nvgprs_\srr\()_cont:
|
| 427 | |
| 428 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
| 429 | |
| 430 | .Linterrupt_return_\srr\()_user_rst_start:
|
| 431 | lbz r11,PACAIRQHAPPENED(r13)
|
| 432 | andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
|
| 433 | bne- interrupt_return_\srr\()_user_restart
|
| 434 | |
| 435 | li r11,IRQS_ENABLED
|
| 436 | stb r11,PACAIRQSOFTMASK(r13)
|
| 437 | li r11,0
|
| 438 | stb r11,PACAIRQHAPPENED(r13) |
| 439 |
|
| 440 | .Lfast_user_interrupt_return_\srr\():
|
| 441 | SANITIZE_RESTORE_NVGPRS()
|
| 442 | |
| 443 | .ifc \srr,srr
|
| 444 | lbz r4,PACASRR_VALID(r13)
|
| 445 | .else
|
| 446 | lbz r4,PACAHSRR_VALID(r13)
|
| 447 | .endif
|
| 448 | cmpdi r4,0
|
| 449 | li r4,0
|
| 450 | bne 1f
|
| 451 | |
| 452 | ld r11,_NIP(r1)
|
| 453 | ld r12,_MSR(r1)
|
| 454 | .ifc \srr,srr
|
| 455 | mtspr SPRN_SRR0,r11
|
| 456 | mtspr SPRN_SRR1,r12
|
| 457 | 1:
|
| 458 | |
| 459 | stb r4,PACASRR_VALID(r13)
|
| 460 | |
| 461 | .else
|
| 462 | mtspr SPRN_HSRR0,r11
|
| 463 | mtspr SPRN_HSRR1,r12
|
| 464 | 1:
|
| 465 | |
| 466 | stb r4,PACAHSRR_VALID(r13)
|
| 467 | |
| 468 | .endif
|
| 469 | DEBUG_SRR_VALID \srr
|
| 470 |
|
| 471 | |
| 472 | lbz r4,PACAIRQSOFTMASK(r13)
|
| 473 | tdnei r4,IRQS_ENABLED
|
| 474 | |
| 475 |
|
| 476 | BEGIN_FTR_SECTION
|
| 477 | ld r10,_PPR(r1)
|
| 478 | mtspr SPRN_PPR,r10
|
| 479 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
|
| 480 |
|
| 481 | BEGIN_FTR_SECTION
|
| 482 | stdcx. r0,0,r1 /* to clear the reservation */
|
| 483 | FTR_SECTION_ELSE
|
| 484 | ldarx r0,0,r1
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| 485 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
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| 486 |
|
| 487 | ld r3,_CCR(r1)
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| 488 | ld r4,_LINK(r1)
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| 489 | ld r5,_CTR(r1)
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| 490 | ld r6,_XER(r1)
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| 491 | li r0,0
|
| 492 |
|
| 493 | REST_GPRS(7, 13, r1)
|
| 494 |
|
| 495 | mtcr r3
|
| 496 | mtlr r4
|
| 497 | mtctr r5
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| 498 | mtspr SPRN_XER,r6
|
| 499 |
|
| 500 | REST_GPRS(2, 6, r1)
|
| 501 | REST_GPR(0, r1)
|
| 502 | REST_GPR(1, r1)
|
| 503 | .ifc \srr,srr
|
| 504 | RFI_TO_USER
|
| 505 | .else
|
| 506 | HRFI_TO_USER
|
| 507 | .endif
|
| 508 | b . /* prevent speculative execution */
|
| 509 | .Linterrupt_return_\srr\()_user_rst_end:
|
| 510 |
|
| 511 | |
| 512 | .Lrestore_nvgprs_\srr\():
|
| 513 | REST_NVGPRS(r1)
|
| 514 | b .Lrestore_nvgprs_\srr\()_cont
|
| 515 | |
| 516 |
|
| 517 | |
| 518 | interrupt_return_\srr\()_user_restart:
|
| 519 | _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user_restart)
|
| 520 | GET_PACA(r13)
|
| 521 | ld r1,PACA_EXIT_SAVE_R1(r13)
|
| 522 | LOAD_PACA_TOC()
|
| 523 | addi r3,r1,STACK_INT_FRAME_REGS
|
| 524 | li r11,IRQS_ALL_DISABLED
|
| 525 | stb r11,PACAIRQSOFTMASK(r13)
|
| 526 | bl CFUNC(interrupt_exit_user_restart)
|
| 527 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
| 528 | b .Linterrupt_return_\srr\()_user_rst_start
|
| 529 | 1:
|
| 530 |
|
| 531 | SOFT_MASK_TABLE(.Linterrupt_return_\srr\()_user_rst_start, 1b)
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| 532 | RESTART_TABLE(.Linterrupt_return_\srr\()_user_rst_start, .Linterrupt_return_\srr\()_user_rst_end, interrupt_return_\srr\()_user_restart)
|
| 533 | |
| 534 |
|
| 535 | .balign IFETCH_ALIGN_BYTES
|
| 536 | interrupt_return_\srr\()_kernel:
|
| 537 | _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel)
|
| 538 | addi r3,r1,STACK_INT_FRAME_REGS
|
| 539 | bl CFUNC(interrupt_exit_kernel_prepare)
|
| 540 |
|
| 541 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
| 542 | .Linterrupt_return_\srr\()_kernel_rst_start:
|
| 543 | ld r11,SOFTE(r1)
|
| 544 | cmpwi r11,IRQS_ENABLED
|
| 545 | stb r11,PACAIRQSOFTMASK(r13)
|
| 546 | beq .Linterrupt_return_\srr\()_soft_enabled
|
| 547 |
|
| 548 | /*
|
| 549 | * Returning to soft-disabled context.
|
| 550 | * Check if a MUST_HARD_MASK interrupt has become pending, in which
|
| 551 | * case we need to disable MSR[EE] in the return context.
|
| 552 | *
|
| 553 | * The MSR[EE] check catches among other things the short incoherency
|
| 554 | * in hard_irq_disable() between clearing MSR[EE] and setting
|
| 555 | * PACA_IRQ_HARD_DIS.
|
| 556 | */
|
| 557 | ld r12,_MSR(r1)
|
| 558 | andi. r10,r12,MSR_EE
|
| 559 | beq .Lfast_kernel_interrupt_return_\srr\() // EE already disabled
|
| 560 | lbz r11,PACAIRQHAPPENED(r13)
|
| 561 | andi. r10,r11,PACA_IRQ_MUST_HARD_MASK
|
| 562 | bne 1f // HARD_MASK is pending
|
| 563 | // No HARD_MASK pending, clear possible HARD_DIS set by interrupt
|
| 564 | andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
|
| 565 | stb r11,PACAIRQHAPPENED(r13)
|
| 566 | b .Lfast_kernel_interrupt_return_\srr\()
|
| 567 |
|
| 568 |
|
| 569 | 1: /* Must clear MSR_EE from _MSR */
|
| 570 | |
| 571 | li r10,0
|
| 572 | /* Clear valid before changing _MSR */
|
| 573 | .ifc \srr,srr
|
| 574 | stb r10,PACASRR_VALID(r13)
|
| 575 | .else
|
| 576 | stb r10,PACAHSRR_VALID(r13)
|
| 577 | .endif
|
| 578 | |
| 579 | xori r12,r12,MSR_EE
|
| 580 | std r12,_MSR(r1)
|
| 581 | b .Lfast_kernel_interrupt_return_\srr\()
|
| 582 |
|
| 583 | .Linterrupt_return_\srr\()_soft_enabled:
|
| 584 | /*
|
| 585 | * In the soft-enabled case, need to double-check that we have no
|
| 586 | * pending interrupts that might have come in before we reached the
|
| 587 | * restart section of code, and restart the exit so those can be
|
| 588 | * handled.
|
| 589 | *
|
| 590 | * If there are none, it is be possible that the interrupt still
|
| 591 | * has PACA_IRQ_HARD_DIS set, which needs to be cleared for the
|
| 592 | * interrupted context. This clear will not clobber a new pending
|
| 593 | * interrupt coming in, because we're in the restart section, so
|
| 594 | * such would return to the restart location.
|
| 595 | */
|
| 596 | #ifdef CONFIG_PPC_BOOK3S
|
| 597 | lbz r11,PACAIRQHAPPENED(r13)
|
| 598 | andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
|
| 599 | bne- interrupt_return_\srr\()_kernel_restart
|
| 600 | #endif
|
| 601 | li r11,0
|
| 602 | stb r11,PACAIRQHAPPENED(r13) // clear the possible HARD_DIS
|
| 603 |
|
| 604 | .Lfast_kernel_interrupt_return_\srr\():
|
| 605 | SANITIZE_RESTORE_NVGPRS()
|
| 606 | cmpdi cr1,r3,0
|
| 607 | #ifdef CONFIG_PPC_BOOK3S
|
| 608 | .ifc \srr,srr
|
| 609 | lbz r4,PACASRR_VALID(r13)
|
| 610 | .else
|
| 611 | lbz r4,PACAHSRR_VALID(r13)
|
| 612 | .endif
|
| 613 | cmpdi r4,0
|
| 614 | li r4,0
|
| 615 | bne 1f
|
| 616 | #endif
|
| 617 | ld r11,_NIP(r1)
|
| 618 | ld r12,_MSR(r1)
|
| 619 | .ifc \srr,srr
|
| 620 | mtspr SPRN_SRR0,r11
|
| 621 | mtspr SPRN_SRR1,r12
|
| 622 | 1:
|
| 623 | #ifdef CONFIG_PPC_BOOK3S
|
| 624 | stb r4,PACASRR_VALID(r13)
|
| 625 | #endif
|
| 626 | .else
|
| 627 | mtspr SPRN_HSRR0,r11
|
| 628 | mtspr SPRN_HSRR1,r12
|
| 629 | 1:
|
| 630 | #ifdef CONFIG_PPC_BOOK3S
|
| 631 | stb r4,PACAHSRR_VALID(r13)
|
| 632 | #endif
|
| 633 | .endif
|
| 634 | DEBUG_SRR_VALID \srr
|
| 635 |
|
| 636 | BEGIN_FTR_SECTION
|
| 637 | stdcx. r0,0,r1 /* to clear the reservation */
|
| 638 | FTR_SECTION_ELSE
|
| 639 | ldarx r0,0,r1
|
| 640 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
|
| 641 |
|
| 642 | ld r3,_LINK(r1)
|
| 643 | ld r4,_CTR(r1)
|
| 644 | ld r5,_XER(r1)
|
| 645 | ld r6,_CCR(r1)
|
| 646 | li r0,0
|
| 647 |
|
| 648 | REST_GPRS(7, 12, r1)
|
| 649 |
|
| 650 | mtlr r3
|
| 651 | mtctr r4
|
| 652 | mtspr SPRN_XER,r5
|
| 653 |
|
| 654 | /*
|
| 655 | * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
|
| 656 | * the reliable stack unwinder later on. Clear it.
|
| 657 | */
|
| 658 | std r0,STACK_INT_FRAME_MARKER(r1)
|
| 659 |
|
| 660 | REST_GPRS(2, 5, r1)
|
| 661 |
|
| 662 | bne- cr1,1f /* emulate stack store */
|
| 663 | mtcr r6
|
| 664 | REST_GPR(6, r1)
|
| 665 | REST_GPR(0, r1)
|
| 666 | REST_GPR(1, r1)
|
| 667 | .ifc \srr,srr
|
| 668 | RFI_TO_KERNEL
|
| 669 | .else
|
| 670 | HRFI_TO_KERNEL
|
| 671 | .endif
|
| 672 | b . /* prevent speculative execution */
|
| 673 |
|
| 674 | 1: /*
|
| 675 | * Emulate stack store with update. New r1 value was already calculated
|
| 676 | * and updated in our interrupt regs by emulate_loadstore, but we can't
|
| 677 | * store the previous value of r1 to the stack before re-loading our
|
| 678 | * registers from it, otherwise they could be clobbered. Use
|
| 679 | * PACA_EXGEN as temporary storage to hold the store data, as
|
| 680 | * interrupts are disabled here so it won't be clobbered.
|
| 681 | */
|
| 682 | mtcr r6
|
| 683 | std r9,PACA_EXGEN+0(r13)
|
| 684 | addi r9,r1,INT_FRAME_SIZE /* get original r1 */
|
| 685 | REST_GPR(6, r1)
|
| 686 | REST_GPR(0, r1)
|
| 687 | REST_GPR(1, r1)
|
| 688 | std r9,0(r1) /* perform store component of stdu */
|
| 689 | ld r9,PACA_EXGEN+0(r13)
|
| 690 |
|
| 691 | .ifc \srr,srr
|
| 692 | RFI_TO_KERNEL
|
| 693 | .else
|
| 694 | HRFI_TO_KERNEL
|
| 695 | .endif
|
| 696 | b . /* prevent speculative execution */
|
| 697 | .Linterrupt_return_\srr\()_kernel_rst_end:
|
| 698 |
|
| 699 | #ifdef CONFIG_PPC_BOOK3S
|
| 700 | interrupt_return_\srr\()_kernel_restart:
|
| 701 | _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel_restart)
|
| 702 | GET_PACA(r13)
|
| 703 | ld r1,PACA_EXIT_SAVE_R1(r13)
|
| 704 | LOAD_PACA_TOC()
|
| 705 | addi r3,r1,STACK_INT_FRAME_REGS
|
| 706 | li r11,IRQS_ALL_DISABLED
|
| 707 | stb r11,PACAIRQSOFTMASK(r13)
|
| 708 | bl CFUNC(interrupt_exit_kernel_restart)
|
| 709 | std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
| 710 | b .Linterrupt_return_\srr\()_kernel_rst_start
|
| 711 | 1:
|
| 712 |
|
| 713 | SOFT_MASK_TABLE(.Linterrupt_return_\srr\()_kernel_rst_start, 1b)
|
| 714 | RESTART_TABLE(.Linterrupt_return_\srr\()_kernel_rst_start, .Linterrupt_return_\srr\()_kernel_rst_end, interrupt_return_\srr\()_kernel_restart)
|
| 715 | #endif
|
| 716 |
|
| 717 | .endm
|
| 718 |
|
| 719 | interrupt_return_macro srr
|
| 720 | #ifdef CONFIG_PPC_BOOK3S
|
| 721 | interrupt_return_macro hsrr
|
| 722 |
|
| 723 | .globl __end_soft_masked
|
| 724 | __end_soft_masked:
|
| 725 | DEFINE_FIXED_SYMBOL(__end_soft_masked, text)
|
| 726 | #endif /* CONFIG_PPC_BOOK3S */
|
| 727 |
|
| 728 | #ifdef CONFIG_PPC_BOOK3S
|
| 729 | _GLOBAL(ret_from_fork_scv)
|
| 730 | bl CFUNC(schedule_tail)
|
| 731 | HANDLER_RESTORE_NVGPRS()
|
| 732 | li r3,0 /* fork() return value */
|
| 733 | b .Lsyscall_vectored_common_exit
|
| 734 | #endif
|
| 735 |
|
| 736 | _GLOBAL(ret_from_fork)
|
| 737 | bl CFUNC(schedule_tail)
|
| 738 | HANDLER_RESTORE_NVGPRS()
|
| 739 | li r3,0 /* fork() return value */
|
| 740 | b .Lsyscall_exit
|
| 741 |
|
| 742 | _GLOBAL(ret_from_kernel_user_thread)
|
| 743 | bl CFUNC(schedule_tail)
|
| 744 | mtctr r14
|
| 745 | mr r3,r15
|
| 746 | #ifdef CONFIG_PPC64_ELF_ABI_V2
|
| 747 | mr r12,r14
|
| 748 | #endif
|
| 749 | bctrl
|
| 750 | li r3,0
|
| 751 | /*
|
| 752 | * It does not matter whether this returns via the scv or sc path
|
| 753 | * because it returns as execve() and therefore has no calling ABI
|
| 754 | * (i.e., it sets registers according to the exec()ed entry point).
|
| 755 | */
|
| 756 | b .Lsyscall_exit
|
| 757 |
|
| 758 | _GLOBAL(start_kernel_thread)
|
| 759 | bl CFUNC(schedule_tail)
|
| 760 | mtctr r14
|
| 761 | mr r3,r15
|
| 762 | #ifdef CONFIG_PPC64_ELF_ABI_V2
|
| 763 | mr r12,r14
|
| 764 | #endif
|
| 765 | bctrl
|
| 766 | /*
|
| 767 | * This must not return. We actually want to BUG here, not WARN,
|
| 768 | * because BUG will exit the process which is what the kernel thread
|
| 769 | * should have done, which may give some hope of continuing.
|
| 770 | */
|
| 771 | 100: trap
|
| 772 | EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,0
|