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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Common boot and setup code for both 32-bit and 64-bit.
4 * Extracted from arch/powerpc/kernel/setup_64.c.
5 *
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 */
8
9#undef DEBUG
10
11#include <linux/export.h>
12#include <linux/panic_notifier.h>
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/reboot.h>
18#include <linux/delay.h>
19#include <linux/initrd.h>
20#include <linux/platform_device.h>
21#include <linux/printk.h>
22#include <linux/seq_file.h>
23#include <linux/ioport.h>
24#include <linux/console.h>
25#include <linux/root_dev.h>
26#include <linux/cpu.h>
27#include <linux/unistd.h>
28#include <linux/seq_buf.h>
29#include <linux/serial.h>
30#include <linux/serial_8250.h>
31#include <linux/percpu.h>
32#include <linux/memblock.h>
33#include <linux/of.h>
34#include <linux/of_fdt.h>
35#include <linux/of_irq.h>
36#include <linux/hugetlb.h>
37#include <linux/pgtable.h>
38#include <asm/io.h>
39#include <asm/paca.h>
40#include <asm/processor.h>
41#include <asm/vdso_datapage.h>
42#include <asm/smp.h>
43#include <asm/elf.h>
44#include <asm/machdep.h>
45#include <asm/time.h>
46#include <asm/cputable.h>
47#include <asm/sections.h>
48#include <asm/firmware.h>
49#include <asm/btext.h>
50#include <asm/nvram.h>
51#include <asm/setup.h>
52#include <asm/rtas.h>
53#include <asm/iommu.h>
54#include <asm/serial.h>
55#include <asm/cache.h>
56#include <asm/page.h>
57#include <asm/mmu.h>
58#include <asm/xmon.h>
59#include <asm/cputhreads.h>
60#include <mm/mmu_decl.h>
61#include <asm/archrandom.h>
62#include <asm/fadump.h>
63#include <asm/udbg.h>
64#include <asm/hugetlb.h>
65#include <asm/livepatch.h>
66#include <asm/mmu_context.h>
67#include <asm/cpu_has_feature.h>
68#include <asm/kasan.h>
69#include <asm/mce.h>
70#include <asm/systemcfg.h>
71#include <linux/kmsg_dump.h>
72
73#include "setup.h"
74
75#ifdef DEBUG
76#define DBG(fmt...) udbg_printf(fmt)
77#else
78#define DBG(fmt...)
79#endif
80
81/* The main machine-dep calls structure
82 */
83struct machdep_calls ppc_md;
84EXPORT_SYMBOL(ppc_md);
85struct machdep_calls *machine_id;
86EXPORT_SYMBOL(machine_id);
87
88int boot_cpuid = -1;
89EXPORT_SYMBOL_GPL(boot_cpuid);
90int __initdata boot_core_hwid = -1;
91
92#ifdef CONFIG_PPC64
93int boot_cpu_hwid = -1;
94#endif
95
96/*
97 * These are used in binfmt_elf.c to put aux entries on the stack
98 * for each elf executable being started.
99 */
100int dcache_bsize;
101int icache_bsize;
102
103/* Variables required to store legacy IO irq routing */
104int of_i8042_kbd_irq;
105EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
106int of_i8042_aux_irq;
107EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
108
109#ifdef __DO_IRQ_CANON
110/* XXX should go elsewhere eventually */
111int ppc_do_canonicalize_irqs;
112EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
113#endif
114
115#ifdef CONFIG_CRASH_DUMP
116/* This keeps a track of which one is the crashing cpu. */
117int crashing_cpu = -1;
118#endif
119
120/* also used by kexec */
121void machine_shutdown(void)
122{
123 /*
124 * if fadump is active, cleanup the fadump registration before we
125 * shutdown.
126 */
127 fadump_cleanup();
128
129 if (ppc_md.machine_shutdown)
130 ppc_md.machine_shutdown();
131}
132
133static void machine_hang(void)
134{
135 pr_emerg("System Halted, OK to turn off power\n");
136 local_irq_disable();
137 while (1)
138 ;
139}
140
141void machine_restart(char *cmd)
142{
143 machine_shutdown();
144 if (ppc_md.restart)
145 ppc_md.restart(cmd);
146
147 smp_send_stop();
148
149 do_kernel_restart(cmd);
150 mdelay(1000);
151
152 machine_hang();
153}
154
155void machine_power_off(void)
156{
157 machine_shutdown();
158 do_kernel_power_off();
159 smp_send_stop();
160 machine_hang();
161}
162/* Used by the G5 thermal driver */
163EXPORT_SYMBOL_GPL(machine_power_off);
164
165void (*pm_power_off)(void);
166EXPORT_SYMBOL_GPL(pm_power_off);
167
168size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
169{
170 if (max_longs && ppc_md.get_random_seed && ppc_md.get_random_seed(v))
171 return 1;
172 return 0;
173}
174EXPORT_SYMBOL(arch_get_random_seed_longs);
175
176void machine_halt(void)
177{
178 machine_shutdown();
179 if (ppc_md.halt)
180 ppc_md.halt();
181
182 smp_send_stop();
183 machine_hang();
184}
185
186#ifdef CONFIG_SMP
187DEFINE_PER_CPU(unsigned int, cpu_pvr);
188#endif
189
190static void show_cpuinfo_summary(struct seq_file *m)
191{
192 struct device_node *root;
193 const char *model = NULL;
194 unsigned long bogosum = 0;
195 int i;
196
197 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
198 for_each_online_cpu(i)
199 bogosum += loops_per_jiffy;
200 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
201 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
202 }
203 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
204 if (ppc_md.name)
205 seq_printf(m, "platform\t: %s\n", ppc_md.name);
206 root = of_find_node_by_path("/");
207 if (root)
208 model = of_get_property(root, "model", NULL);
209 if (model)
210 seq_printf(m, "model\t\t: %s\n", model);
211 of_node_put(root);
212
213 if (ppc_md.show_cpuinfo != NULL)
214 ppc_md.show_cpuinfo(m);
215
216 /* Display the amount of memory */
217 if (IS_ENABLED(CONFIG_PPC32))
218 seq_printf(m, "Memory\t\t: %d MB\n",
219 (unsigned int)(total_memory / (1024 * 1024)));
220}
221
222static int show_cpuinfo(struct seq_file *m, void *v)
223{
224 unsigned long cpu_id = (unsigned long)v - 1;
225 unsigned int pvr;
226 unsigned long proc_freq;
227 unsigned short maj;
228 unsigned short min;
229
230#ifdef CONFIG_SMP
231 pvr = per_cpu(cpu_pvr, cpu_id);
232#else
233 pvr = mfspr(SPRN_PVR);
234#endif
235 maj = (pvr >> 8) & 0xFF;
236 min = pvr & 0xFF;
237
238 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
239
240 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
241 seq_puts(m, cur_cpu_spec->cpu_name);
242 else
243 seq_printf(m, "unknown (%08x)", pvr);
244
245 if (cpu_has_feature(CPU_FTR_ALTIVEC))
246 seq_puts(m, ", altivec supported");
247
248 seq_putc(m, '\n');
249
250#ifdef CONFIG_TAU
251 if (cpu_has_feature(CPU_FTR_TAU)) {
252 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
253 /* more straightforward, but potentially misleading */
254 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
255 cpu_temp(cpu_id));
256 } else {
257 /* show the actual temp sensor range */
258 u32 temp;
259 temp = cpu_temp_both(cpu_id);
260 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
261 temp & 0xff, temp >> 16);
262 }
263 }
264#endif /* CONFIG_TAU */
265
266 /*
267 * Platforms that have variable clock rates, should implement
268 * the method ppc_md.get_proc_freq() that reports the clock
269 * rate of a given cpu. The rest can use ppc_proc_freq to
270 * report the clock rate that is same across all cpus.
271 */
272 if (ppc_md.get_proc_freq)
273 proc_freq = ppc_md.get_proc_freq(cpu_id);
274 else
275 proc_freq = ppc_proc_freq;
276
277 if (proc_freq)
278 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
279 proc_freq / 1000000, proc_freq % 1000000);
280
281 /* If we are a Freescale core do a simple check so
282 * we don't have to keep adding cases in the future */
283 if (PVR_VER(pvr) & 0x8000) {
284 switch (PVR_VER(pvr)) {
285 case 0x8000: /* 7441/7450/7451, Voyager */
286 case 0x8001: /* 7445/7455, Apollo 6 */
287 case 0x8002: /* 7447/7457, Apollo 7 */
288 case 0x8003: /* 7447A, Apollo 7 PM */
289 case 0x8004: /* 7448, Apollo 8 */
290 case 0x800c: /* 7410, Nitro */
291 maj = ((pvr >> 8) & 0xF);
292 min = PVR_MIN(pvr);
293 break;
294 default: /* e500/book-e */
295 maj = PVR_MAJ(pvr);
296 min = PVR_MIN(pvr);
297 break;
298 }
299 } else {
300 switch (PVR_VER(pvr)) {
301 case 0x1008: /* 740P/750P ?? */
302 maj = ((pvr >> 8) & 0xFF) - 1;
303 min = pvr & 0xFF;
304 break;
305 case 0x004e: /* POWER9 bits 12-15 give chip type */
306 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
307 case 0x0083: /* POWER12 bit 12 gives SMT8/4 */
308 maj = (pvr >> 8) & 0x0F;
309 min = pvr & 0xFF;
310 break;
311 default:
312 maj = (pvr >> 8) & 0xFF;
313 min = pvr & 0xFF;
314 break;
315 }
316 }
317
318 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
319 maj, min, PVR_VER(pvr), PVR_REV(pvr));
320
321 if (IS_ENABLED(CONFIG_PPC32))
322 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
323 (loops_per_jiffy / (5000 / HZ)) % 100);
324
325 seq_putc(m, '\n');
326
327 /* If this is the last cpu, print the summary */
328 if (cpu_id == cpumask_last(cpu_online_mask))
329 show_cpuinfo_summary(m);
330
331 return 0;
332}
333
334static void *c_start(struct seq_file *m, loff_t *pos)
335{
336 *pos = cpumask_next(*pos - 1, cpu_online_mask);
337 if ((*pos) < nr_cpu_ids)
338 return (void *)(unsigned long)(*pos + 1);
339 return NULL;
340}
341
342static void *c_next(struct seq_file *m, void *v, loff_t *pos)
343{
344 (*pos)++;
345 return c_start(m, pos);
346}
347
348static void c_stop(struct seq_file *m, void *v)
349{
350}
351
352const struct seq_operations cpuinfo_op = {
353 .start = c_start,
354 .next = c_next,
355 .stop = c_stop,
356 .show = show_cpuinfo,
357};
358
359void __init check_for_initrd(void)
360{
361#ifdef CONFIG_BLK_DEV_INITRD
362 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
363 initrd_start, initrd_end);
364
365 /* If we were passed an initrd, set the ROOT_DEV properly if the values
366 * look sensible. If not, clear initrd reference.
367 */
368 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
369 initrd_end > initrd_start)
370 ROOT_DEV = Root_RAM0;
371 else
372 initrd_start = initrd_end = 0;
373
374 if (initrd_start)
375 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
376
377 DBG(" <- check_for_initrd()\n");
378#endif /* CONFIG_BLK_DEV_INITRD */
379}
380
381#ifdef CONFIG_SMP
382
383int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
384cpumask_t threads_core_mask __read_mostly;
385EXPORT_SYMBOL_GPL(threads_per_core);
386EXPORT_SYMBOL_GPL(threads_per_subcore);
387EXPORT_SYMBOL_GPL(threads_shift);
388EXPORT_SYMBOL_GPL(threads_core_mask);
389
390static void __init cpu_init_thread_core_maps(int tpc)
391{
392 int i;
393
394 threads_per_core = tpc;
395 threads_per_subcore = tpc;
396 cpumask_clear(&threads_core_mask);
397
398 /* This implementation only supports power of 2 number of threads
399 * for simplicity and performance
400 */
401 threads_shift = ilog2(tpc);
402 BUG_ON(tpc != (1 << threads_shift));
403
404 for (i = 0; i < tpc; i++)
405 cpumask_set_cpu(i, &threads_core_mask);
406
407 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
408 tpc, str_plural(tpc));
409 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
410}
411
412
413u32 *cpu_to_phys_id = NULL;
414
415static int assign_threads(unsigned int cpu, unsigned int nthreads, bool present,
416 const __be32 *hw_ids)
417{
418 for (int i = 0; i < nthreads && cpu < nr_cpu_ids; i++) {
419 __be32 hwid;
420
421 hwid = be32_to_cpu(hw_ids[i]);
422
423 DBG(" thread %d -> cpu %d (hard id %d)\n", i, cpu, hwid);
424
425 set_cpu_present(cpu, present);
426 set_cpu_possible(cpu, true);
427 cpu_to_phys_id[cpu] = hwid;
428 cpu++;
429 }
430
431 return cpu;
432}
433
434/**
435 * setup_cpu_maps - initialize the following cpu maps:
436 * cpu_possible_mask
437 * cpu_present_mask
438 *
439 * Having the possible map set up early allows us to restrict allocations
440 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
441 *
442 * We do not initialize the online map here; cpus set their own bits in
443 * cpu_online_mask as they come up.
444 *
445 * This function is valid only for Open Firmware systems. finish_device_tree
446 * must be called before using this.
447 *
448 * While we're here, we may as well set the "physical" cpu ids in the paca.
449 *
450 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
451 */
452void __init smp_setup_cpu_maps(void)
453{
454 struct device_node *dn;
455 int cpu = 0;
456 int nthreads = 1;
457
458 DBG("smp_setup_cpu_maps()\n");
459
460 cpu_to_phys_id = memblock_alloc_or_panic(nr_cpu_ids * sizeof(u32),
461 __alignof__(u32));
462
463 for_each_node_by_type(dn, "cpu") {
464 const __be32 *intserv;
465 __be32 cpu_be;
466 int len;
467
468 DBG(" * %pOF...\n", dn);
469
470 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
471 &len);
472 if (intserv) {
473 DBG(" ibm,ppc-interrupt-server#s -> %lu threads\n",
474 (len / sizeof(int)));
475 } else {
476 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
477 intserv = of_get_property(dn, "reg", &len);
478 if (!intserv) {
479 cpu_be = cpu_to_be32(cpu);
480 /* XXX: what is this? uninitialized?? */
481 intserv = &cpu_be; /* assume logical == phys */
482 len = 4;
483 }
484 }
485
486 nthreads = len / sizeof(int);
487
488 bool avail = of_device_is_available(dn);
489 if (!avail)
490 avail = !of_property_match_string(dn,
491 "enable-method", "spin-table");
492
493 if (boot_core_hwid >= 0) {
494 if (cpu == 0) {
495 pr_info("Skipping CPU node %pOF to allow for boot core.\n", dn);
496 cpu = nthreads;
497 continue;
498 }
499
500 if (be32_to_cpu(intserv[0]) == boot_core_hwid) {
501 pr_info("Renumbered boot core %pOF to logical 0\n", dn);
502 assign_threads(0, nthreads, avail, intserv);
503 of_node_put(dn);
504 break;
505 }
506 } else if (cpu >= nr_cpu_ids) {
507 of_node_put(dn);
508 break;
509 }
510
511 if (cpu < nr_cpu_ids)
512 cpu = assign_threads(cpu, nthreads, avail, intserv);
513 }
514
515 /* If no SMT supported, nthreads is forced to 1 */
516 if (!cpu_has_feature(CPU_FTR_SMT)) {
517 DBG(" SMT disabled ! nthreads forced to 1\n");
518 nthreads = 1;
519 }
520
521#ifdef CONFIG_PPC64
522 /*
523 * On pSeries LPAR, we need to know how many cpus
524 * could possibly be added to this partition.
525 */
526 if (firmware_has_feature(FW_FEATURE_LPAR) &&
527 (dn = of_find_node_by_path("/rtas"))) {
528 int num_addr_cell, num_size_cell, maxcpus;
529 const __be32 *ireg;
530
531 num_addr_cell = of_n_addr_cells(dn);
532 num_size_cell = of_n_size_cells(dn);
533
534 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
535
536 if (!ireg)
537 goto out;
538
539 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
540
541 /* Double maxcpus for processors which have SMT capability */
542 if (cpu_has_feature(CPU_FTR_SMT))
543 maxcpus *= nthreads;
544
545 if (maxcpus > nr_cpu_ids) {
546 printk(KERN_WARNING
547 "Partition configured for %d cpus, "
548 "operating system maximum is %u.\n",
549 maxcpus, nr_cpu_ids);
550 maxcpus = nr_cpu_ids;
551 } else
552 printk(KERN_INFO "Partition configured for %d cpus.\n",
553 maxcpus);
554
555 for (cpu = 0; cpu < maxcpus; cpu++)
556 set_cpu_possible(cpu, true);
557 out:
558 of_node_put(dn);
559 }
560#endif
561#ifdef CONFIG_PPC64_PROC_SYSTEMCFG
562 systemcfg->processorCount = num_present_cpus();
563#endif /* CONFIG_PPC64 */
564
565 /* Initialize CPU <=> thread mapping/
566 *
567 * WARNING: We assume that the number of threads is the same for
568 * every CPU in the system. If that is not the case, then some code
569 * here will have to be reworked
570 */
571 cpu_init_thread_core_maps(nthreads);
572
573 /* Now that possible cpus are set, set nr_cpu_ids for later use */
574 setup_nr_cpu_ids();
575
576 free_unused_pacas();
577}
578#endif /* CONFIG_SMP */
579
580#ifdef CONFIG_PCSPKR_PLATFORM
581static __init int add_pcspkr(void)
582{
583 struct device_node *np;
584 struct platform_device *pd;
585 int ret;
586
587 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
588 of_node_put(np);
589 if (!np)
590 return -ENODEV;
591
592 pd = platform_device_alloc("pcspkr", -1);
593 if (!pd)
594 return -ENOMEM;
595
596 ret = platform_device_add(pd);
597 if (ret)
598 platform_device_put(pd);
599
600 return ret;
601}
602device_initcall(add_pcspkr);
603#endif /* CONFIG_PCSPKR_PLATFORM */
604
605static char ppc_hw_desc_buf[128] __initdata;
606
607struct seq_buf ppc_hw_desc __initdata = {
608 .buffer = ppc_hw_desc_buf,
609 .size = sizeof(ppc_hw_desc_buf),
610 .len = 0,
611};
612
613static __init void probe_machine(void)
614{
615 extern struct machdep_calls __machine_desc_start;
616 extern struct machdep_calls __machine_desc_end;
617 unsigned int i;
618
619 /*
620 * Iterate all ppc_md structures until we find the proper
621 * one for the current machine type
622 */
623 DBG("Probing machine type ...\n");
624
625 /*
626 * Check ppc_md is empty, if not we have a bug, ie, we setup an
627 * entry before probe_machine() which will be overwritten
628 */
629 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
630 if (((void **)&ppc_md)[i]) {
631 printk(KERN_ERR "Entry %d in ppc_md non empty before"
632 " machine probe !\n", i);
633 }
634 }
635
636 for (machine_id = &__machine_desc_start;
637 machine_id < &__machine_desc_end;
638 machine_id++) {
639 DBG(" %s ...\n", machine_id->name);
640 if (machine_id->compatible && !of_machine_is_compatible(machine_id->compatible))
641 continue;
642 if (machine_id->compatibles && !of_machine_compatible_match(machine_id->compatibles))
643 continue;
644 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
645 if (ppc_md.probe && !ppc_md.probe())
646 continue;
647 DBG(" %s match !\n", machine_id->name);
648 break;
649 }
650 /* What can we do if we didn't find ? */
651 if (machine_id >= &__machine_desc_end) {
652 pr_err("No suitable machine description found !\n");
653 for (;;);
654 }
655
656 // Append the machine name to other info we've gathered
657 seq_buf_puts(&ppc_hw_desc, ppc_md.name);
658
659 // Set the generic hardware description shown in oopses
660 dump_stack_set_arch_desc(ppc_hw_desc.buffer);
661
662 pr_info("Hardware name: %s\n", ppc_hw_desc.buffer);
663}
664
665/* Match a class of boards, not a specific device configuration. */
666int check_legacy_ioport(unsigned long base_port)
667{
668 struct device_node *parent, *np = NULL;
669 int ret = -ENODEV;
670
671 switch(base_port) {
672 case I8042_DATA_REG:
673 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
674 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
675 if (np) {
676 parent = of_get_parent(np);
677
678 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
679 if (!of_i8042_kbd_irq)
680 of_i8042_kbd_irq = 1;
681
682 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
683 if (!of_i8042_aux_irq)
684 of_i8042_aux_irq = 12;
685
686 of_node_put(np);
687 np = parent;
688 break;
689 }
690 np = of_find_node_by_type(NULL, "8042");
691 /* Pegasos has no device_type on its 8042 node, look for the
692 * name instead */
693 if (!np)
694 np = of_find_node_by_name(NULL, "8042");
695 if (np) {
696 of_i8042_kbd_irq = 1;
697 of_i8042_aux_irq = 12;
698 }
699 break;
700 case FDC_BASE: /* FDC1 */
701 np = of_find_node_by_type(NULL, "fdc");
702 break;
703 default:
704 /* ipmi is supposed to fail here */
705 break;
706 }
707 if (!np)
708 return ret;
709 parent = of_get_parent(np);
710 if (parent) {
711 if (of_node_is_type(parent, "isa"))
712 ret = 0;
713 of_node_put(parent);
714 }
715 of_node_put(np);
716 return ret;
717}
718EXPORT_SYMBOL(check_legacy_ioport);
719
720/*
721 * Panic notifiers setup
722 *
723 * We have 3 notifiers for powerpc, each one from a different "nature":
724 *
725 * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables
726 * IRQs and deal with the Firmware-Assisted dump, when it is configured;
727 * should run early in the panic path.
728 *
729 * - dump_kernel_offset() is an informative notifier, just showing the KASLR
730 * offset if we have RANDOMIZE_BASE set.
731 *
732 * - ppc_panic_platform_handler() is a low-level handler that's registered
733 * only if the platform wishes to perform final actions in the panic path,
734 * hence it should run late and might not even return. Currently, only
735 * pseries and ps3 platforms register callbacks.
736 */
737static int ppc_panic_fadump_handler(struct notifier_block *this,
738 unsigned long event, void *ptr)
739{
740 /*
741 * panic does a local_irq_disable, but we really
742 * want interrupts to be hard disabled.
743 */
744 hard_irq_disable();
745
746 /*
747 * Invoke kmsg_dump (e.g., pstore) before crash_fadump() as fadump
748 * runs before panic()'s kmsg_dump_desc() call.
749 */
750 if (should_fadump_crash())
751 kmsg_dump_desc(KMSG_DUMP_PANIC, (char *)ptr);
752
753 /*
754 * If firmware-assisted dump has been registered then trigger
755 * its callback and let the firmware handles everything else.
756 */
757 crash_fadump(NULL, ptr);
758
759 return NOTIFY_DONE;
760}
761
762static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
763 void *p)
764{
765 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
766 kaslr_offset(), KERNELBASE);
767
768 return NOTIFY_DONE;
769}
770
771static int ppc_panic_platform_handler(struct notifier_block *this,
772 unsigned long event, void *ptr)
773{
774 /*
775 * This handler is only registered if we have a panic callback
776 * on ppc_md, hence NULL check is not needed.
777 * Also, it may not return, so it runs really late on panic path.
778 */
779 ppc_md.panic(ptr);
780
781 return NOTIFY_DONE;
782}
783
784static struct notifier_block ppc_fadump_block = {
785 .notifier_call = ppc_panic_fadump_handler,
786 .priority = INT_MAX, /* run early, to notify the firmware ASAP */
787};
788
789static struct notifier_block kernel_offset_notifier = {
790 .notifier_call = dump_kernel_offset,
791};
792
793static struct notifier_block ppc_panic_block = {
794 .notifier_call = ppc_panic_platform_handler,
795 .priority = INT_MIN, /* may not return; must be done last */
796};
797
798void __init setup_panic(void)
799{
800 /* Hard-disables IRQs + deal with FW-assisted dump (fadump) */
801 atomic_notifier_chain_register(&panic_notifier_list,
802 &ppc_fadump_block);
803
804 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
805 atomic_notifier_chain_register(&panic_notifier_list,
806 &kernel_offset_notifier);
807
808 /* Low-level platform-specific routines that should run on panic */
809 if (ppc_md.panic)
810 atomic_notifier_chain_register(&panic_notifier_list,
811 &ppc_panic_block);
812}
813
814#ifdef CONFIG_CHECK_CACHE_COHERENCY
815/*
816 * For platforms that have configurable cache-coherency. This function
817 * checks that the cache coherency setting of the kernel matches the setting
818 * left by the firmware, as indicated in the device tree. Since a mismatch
819 * will eventually result in DMA failures, we print * and error and call
820 * BUG() in that case.
821 */
822
823#define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
824
825static int __init check_cache_coherency(void)
826{
827 struct device_node *np;
828 const void *prop;
829 bool devtree_coherency;
830
831 np = of_find_node_by_path("/");
832 prop = of_get_property(np, "coherency-off", NULL);
833 of_node_put(np);
834
835 devtree_coherency = prop ? false : true;
836
837 if (devtree_coherency != KERNEL_COHERENCY) {
838 printk(KERN_ERR
839 "kernel coherency:%s != device tree_coherency:%s\n",
840 str_on_off(KERNEL_COHERENCY),
841 str_on_off(devtree_coherency));
842 BUG();
843 }
844
845 return 0;
846}
847
848late_initcall(check_cache_coherency);
849#endif /* CONFIG_CHECK_CACHE_COHERENCY */
850
851void ppc_printk_progress(char *s, unsigned short hex)
852{
853 pr_info("%s\n", s);
854}
855
856static __init void print_system_info(void)
857{
858 pr_info("-----------------------------------------------------\n");
859 pr_info("phys_mem_size = 0x%llx\n",
860 (unsigned long long)memblock_phys_mem_size());
861
862 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
863 pr_info("icache_bsize = 0x%x\n", icache_bsize);
864
865 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
866 pr_info(" possible = 0x%016lx\n",
867 (unsigned long)CPU_FTRS_POSSIBLE);
868 pr_info(" always = 0x%016lx\n",
869 (unsigned long)CPU_FTRS_ALWAYS);
870 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
871 cur_cpu_spec->cpu_user_features,
872 cur_cpu_spec->cpu_user_features2);
873 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
874 pr_info(" possible = 0x%016lx\n",
875 (unsigned long)MMU_FTRS_POSSIBLE);
876 pr_info(" always = 0x%016lx\n",
877 (unsigned long)MMU_FTRS_ALWAYS);
878#ifdef CONFIG_PPC64
879 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
880#ifdef CONFIG_PPC_BOOK3S
881 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START);
882 pr_info("IO start = 0x%lx\n", KERN_IO_START);
883 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap);
884#endif
885#endif
886
887 if (!early_radix_enabled())
888 print_system_hash_info();
889
890 if (PHYSICAL_START > 0)
891 pr_info("physical_start = 0x%llx\n",
892 (unsigned long long)PHYSICAL_START);
893 pr_info("-----------------------------------------------------\n");
894}
895
896#ifdef CONFIG_SMP
897static void __init smp_setup_pacas(void)
898{
899 int cpu;
900
901 for_each_possible_cpu(cpu) {
902 if (cpu == smp_processor_id())
903 continue;
904 allocate_paca(cpu);
905 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
906 }
907
908 memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
909 cpu_to_phys_id = NULL;
910}
911#endif
912
913/*
914 * Called into from start_kernel this initializes memblock, which is used
915 * to manage page allocation until mem_init is called.
916 */
917void __init setup_arch(char **cmdline_p)
918{
919 kasan_init();
920
921 *cmdline_p = boot_command_line;
922
923 /* Set a half-reasonable default so udelay does something sensible */
924 loops_per_jiffy = 500000000 / HZ;
925
926 /* Unflatten the device-tree passed by prom_init or kexec */
927 unflatten_device_tree();
928
929 /*
930 * Initialize cache line/block info from device-tree (on ppc64) or
931 * just cputable (on ppc32).
932 */
933 initialize_cache_info();
934
935 /* Initialize RTAS if available. */
936 rtas_initialize();
937
938 /* Check if we have an initrd provided via the device-tree. */
939 check_for_initrd();
940
941 /* Probe the machine type, establish ppc_md. */
942 probe_machine();
943
944 /* Setup panic notifier if requested by the platform. */
945 setup_panic();
946
947 /*
948 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
949 * it from their respective probe() function.
950 */
951 setup_power_save();
952
953 /* Discover standard serial ports. */
954 find_legacy_serial_ports();
955
956 /* Register early console with the printk subsystem. */
957 register_early_udbg_console();
958
959 /* Setup the various CPU maps based on the device-tree. */
960 smp_setup_cpu_maps();
961
962 /* Initialize xmon. */
963 xmon_setup();
964
965 /* Check the SMT related command line arguments (ppc64). */
966 check_smt_enabled();
967
968 /* Parse memory topology */
969 mem_topology_setup();
970 high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);
971
972 /*
973 * Release secondary cpus out of their spinloops at 0x60 now that
974 * we can map physical -> logical CPU ids.
975 *
976 * Freescale Book3e parts spin in a loop provided by firmware,
977 * so smp_release_cpus() does nothing for them.
978 */
979#ifdef CONFIG_SMP
980 smp_setup_pacas();
981
982 /* On BookE, setup per-core TLB data structures. */
983 setup_tlb_core_data();
984#endif
985
986 /* Print various info about the machine that has been gathered so far. */
987 print_system_info();
988
989 klp_init_thread_info(&init_task);
990
991 setup_initial_init_mm(_stext, _etext, _edata, _end);
992 /* sched_init() does the mmgrab(&init_mm) for the primary CPU */
993 VM_WARN_ON(cpumask_test_cpu(smp_processor_id(), mm_cpumask(&init_mm)));
994 cpumask_set_cpu(smp_processor_id(), mm_cpumask(&init_mm));
995 inc_mm_active_cpus(&init_mm);
996 mm_iommu_init(&init_mm);
997
998 irqstack_early_init();
999 exc_lvl_early_init();
1000 emergency_stack_init();
1001
1002 mce_init();
1003 smp_release_cpus();
1004
1005 initmem_init();
1006
1007 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
1008
1009 if (ppc_md.setup_arch)
1010 ppc_md.setup_arch();
1011
1012 setup_barrier_nospec();
1013 setup_spectre_v2();
1014
1015 paging_init();
1016
1017 /* Initialize the MMU context management stuff. */
1018 mmu_context_init();
1019
1020 /* Interrupt code needs to be 64K-aligned. */
1021 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
1022 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
1023 (unsigned long)_stext);
1024}