| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */
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| 2 | /*
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| 3 | * Floating-point, VMX/Altivec and VSX loads and stores
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| 4 | * for use in instruction emulation.
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| 5 | *
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| 6 | * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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| 7 | */
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| 8 |
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| 9 | |
| 10 | |
| 11 | |
| 12 | |
| 13 | |
| 14 | |
| 15 | |
| 16 |
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| 17 | |
| 18 |
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| 19 | /* Get the contents of frN into *p; N is in r3 and p is in r4. */
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| 20 | _GLOBAL(get_fpr)
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| 21 | mflr r0
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| 22 | mfmsr r6
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| 23 | ori r7, r6, MSR_FP
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| 24 | MTMSRD(r7)
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| 25 | isync
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| 26 | rlwinm r3,r3,3,0xf8
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| 27 | bcl 20,31,1f
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| 28 | reg = 0
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| 29 | .rept 32
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| 30 | stfd reg, 0(r4)
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| 31 | b 2f
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| 32 | reg = reg + 1
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| 33 | .endr
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| 34 | 1: mflr r5
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| 35 | add r5,r3,r5
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| 36 | mtctr r5
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| 37 | mtlr r0
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| 38 | bctr
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| 39 | 2: MTMSRD(r6)
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| 40 | isync
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| 41 | blr
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| 42 |
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| 43 | /* Put the contents of *p into frN; N is in r3 and p is in r4. */
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| 44 | _GLOBAL(put_fpr)
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| 45 | mflr r0
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| 46 | mfmsr r6
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| 47 | ori r7, r6, MSR_FP
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| 48 | MTMSRD(r7)
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| 49 | isync
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| 50 | rlwinm r3,r3,3,0xf8
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| 51 | bcl 20,31,1f
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| 52 | reg = 0
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| 53 | .rept 32
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| 54 | lfd reg, 0(r4)
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| 55 | b 2f
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| 56 | reg = reg + 1
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| 57 | .endr
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| 58 | 1: mflr r5
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| 59 | add r5,r3,r5
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| 60 | mtctr r5
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| 61 | mtlr r0
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| 62 | bctr
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| 63 | 2: MTMSRD(r6)
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| 64 | isync
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| 65 | blr
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| 66 |
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| 67 | |
| 68 | /* Get the contents of vrN into *p; N is in r3 and p is in r4. */
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| 69 | _GLOBAL(get_vr)
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| 70 | mflr r0
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| 71 | mfmsr r6
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| 72 | oris r7, r6, MSR_VEC@h
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| 73 | MTMSRD(r7)
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| 74 | isync
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| 75 | rlwinm r3,r3,3,0xf8
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| 76 | bcl 20,31,1f
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| 77 | reg = 0
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| 78 | .rept 32
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| 79 | stvx reg, 0, r4
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| 80 | b 2f
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| 81 | reg = reg + 1
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| 82 | .endr
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| 83 | 1: mflr r5
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| 84 | add r5,r3,r5
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| 85 | mtctr r5
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| 86 | mtlr r0
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| 87 | bctr
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| 88 | 2: MTMSRD(r6)
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| 89 | isync
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| 90 | blr
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| 91 |
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| 92 | /* Put the contents of *p into vrN; N is in r3 and p is in r4. */
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| 93 | _GLOBAL(put_vr)
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| 94 | mflr r0
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| 95 | mfmsr r6
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| 96 | oris r7, r6, MSR_VEC@h
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| 97 | MTMSRD(r7)
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| 98 | isync
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| 99 | rlwinm r3,r3,3,0xf8
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| 100 | bcl 20,31,1f
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| 101 | reg = 0
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| 102 | .rept 32
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| 103 | lvx reg, 0, r4
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| 104 | b 2f
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| 105 | reg = reg + 1
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| 106 | .endr
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| 107 | 1: mflr r5
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| 108 | add r5,r3,r5
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| 109 | mtctr r5
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| 110 | mtlr r0
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| 111 | bctr
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| 112 | 2: MTMSRD(r6)
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| 113 | isync
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| 114 | blr
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| 115 | |
| 116 |
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| 117 | |
| 118 | /* Get the contents of vsN into vs0; N is in r3. */
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| 119 | _GLOBAL(get_vsr)
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| 120 | mflr r0
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| 121 | rlwinm r3,r3,3,0x1f8
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| 122 | bcl 20,31,1f
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| 123 | blr /* vs0 is already in vs0 */
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| 124 | nop
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| 125 | reg = 1
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| 126 | .rept 63
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| 127 | XXLOR(0,reg,reg)
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| 128 | blr
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| 129 | reg = reg + 1
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| 130 | .endr
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| 131 | 1: mflr r5
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| 132 | add r5,r3,r5
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| 133 | mtctr r5
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| 134 | mtlr r0
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| 135 | bctr
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| 136 |
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| 137 | /* Put the contents of vs0 into vsN; N is in r3. */
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| 138 | _GLOBAL(put_vsr)
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| 139 | mflr r0
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| 140 | rlwinm r3,r3,3,0x1f8
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| 141 | bcl 20,31,1f
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| 142 | blr /* v0 is already in v0 */
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| 143 | nop
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| 144 | reg = 1
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| 145 | .rept 63
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| 146 | XXLOR(reg,0,0)
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| 147 | blr
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| 148 | reg = reg + 1
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| 149 | .endr
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| 150 | 1: mflr r5
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| 151 | add r5,r3,r5
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| 152 | mtctr r5
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| 153 | mtlr r0
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| 154 | bctr
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| 155 |
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| 156 | /* Load VSX reg N from vector doubleword *p. N is in r3, p in r4. */
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| 157 | _GLOBAL(load_vsrn)
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| 158 | PPC_STLU r1,-STKFRM(r1)
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| 159 | mflr r0
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| 160 | PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
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| 161 | mfmsr r6
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| 162 | oris r7,r6,MSR_VSX@h
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| 163 | cmpwi cr7,r3,0
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| 164 | li r8,STKFRM-16
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| 165 | MTMSRD(r7)
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| 166 | isync
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| 167 | beq cr7,1f
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| 168 | STXVD2X(0,R1,R8)
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| 169 | 1: LXVD2X(0,R0,R4)
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| 170 | |
| 171 | XXSWAPD(0,0)
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| 172 | |
| 173 | beq cr7,4f
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| 174 | bl put_vsr
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| 175 | LXVD2X(0,R1,R8)
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| 176 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
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| 177 | mtlr r0
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| 178 | MTMSRD(r6)
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| 179 | isync
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| 180 | addi r1,r1,STKFRM
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| 181 | blr
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| 182 |
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| 183 | /* Store VSX reg N to vector doubleword *p. N is in r3, p in r4. */
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| 184 | _GLOBAL(store_vsrn)
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| 185 | PPC_STLU r1,-STKFRM(r1)
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| 186 | mflr r0
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| 187 | PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
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| 188 | mfmsr r6
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| 189 | oris r7,r6,MSR_VSX@h
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| 190 | li r8,STKFRM-16
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| 191 | MTMSRD(r7)
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| 192 | isync
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| 193 | STXVD2X(0,R1,R8)
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| 194 | bl get_vsr
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| 195 | |
| 196 | XXSWAPD(0,0)
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| 197 | |
| 198 | STXVD2X(0,R0,R4)
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| 199 | LXVD2X(0,R1,R8)
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| 200 | PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
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| 201 | mtlr r0
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| 202 | MTMSRD(r6)
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| 203 | isync
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| 204 | mr r3,r9
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| 205 | addi r1,r1,STKFRM
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| 206 | blr
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| 207 | |
| 208 |
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| 209 | /* Convert single-precision to double, without disturbing FPRs. */
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| 210 | /* conv_sp_to_dp(float *sp, double *dp) */
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| 211 | _GLOBAL(conv_sp_to_dp)
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| 212 | mfmsr r6
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| 213 | ori r7, r6, MSR_FP
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| 214 | MTMSRD(r7)
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| 215 | isync
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| 216 | stfd fr0, -16(r1)
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| 217 | lfs fr0, 0(r3)
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| 218 | stfd fr0, 0(r4)
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| 219 | lfd fr0, -16(r1)
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| 220 | MTMSRD(r6)
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| 221 | isync
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| 222 | blr
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| 223 |
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| 224 | /* Convert single-precision to double, without disturbing FPRs. */
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| 225 | /* conv_sp_to_dp(double *dp, float *sp) */
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| 226 | _GLOBAL(conv_dp_to_sp)
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| 227 | mfmsr r6
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| 228 | ori r7, r6, MSR_FP
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| 229 | MTMSRD(r7)
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| 230 | isync
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| 231 | stfd fr0, -16(r1)
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| 232 | lfd fr0, 0(r3)
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| 233 | stfs fr0, 0(r4)
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| 234 | lfd fr0, -16(r1)
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| 235 | MTMSRD(r6)
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| 236 | isync
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| 237 | blr
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