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| 2 | |
| 3 | * Copyright (C) 2017 Chen Liqin <[email protected]>
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| 4 | * Copyright (C) 2012 Regents of the University of California
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| 5 |
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| 6 |
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| 7 | #ifndef _ASM_RISCV_CACHE_H
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| 8 | #define _ASM_RISCV_CACHE_H
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| 9 |
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| 10 | #define L1_CACHE_SHIFT 6
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| 11 |
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| 12 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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| 13 |
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| 14 | #ifdef CONFIG_RISCV_DMA_NONCOHERENT
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| 15 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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| 16 | #define ARCH_KMALLOC_MINALIGN (8)
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| 17 | #endif
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| 18 |
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| 19 | |
| 20 | * RISC-V requires the stack pointer to be 16-byte aligned, so ensure that
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| 21 | * the flat loader aligns it accordingly.
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| 22 |
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| 23 | #ifndef CONFIG_MMU
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| 24 | #define ARCH_SLAB_MINALIGN 16
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| 25 | #endif
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| 26 |
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| 27 | #ifndef __ASSEMBLER__
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| 28 |
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| 29 | extern int dma_cache_alignment;
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| 30 | #ifdef CONFIG_RISCV_DMA_NONCOHERENT
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| 31 | #define dma_get_cache_alignment dma_get_cache_alignment
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| 32 | static inline int dma_get_cache_alignment(void)
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| 33 | {
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| 34 | return dma_cache_alignment;
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| 35 | }
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| 36 | #endif
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| 37 |
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| 38 | #endif
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| 39 |
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| 40 | #endif
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