projects/linux·blob master · refs

232 lines · 7.9 KiB

1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2012 Regents of the University of California
4 */
5
6#ifndef _ASM_RISCV_PROCESSOR_H
7#define _ASM_RISCV_PROCESSOR_H
8
9#include <linux/const.h>
10#include <linux/cache.h>
11#include <linux/prctl.h>
12
13#include <vdso/processor.h>
14
15#include <asm/ptrace.h>
16#include <asm/insn-def.h>
17#include <asm/alternative-macros.h>
18#include <asm/hwcap.h>
19#include <asm/usercfi.h>
20
21#define arch_get_mmap_end(addr, len, flags) \
22({ \
23 STACK_TOP_MAX; \
24})
25
26#define arch_get_mmap_base(addr, base) \
27({ \
28 base; \
29})
30
31#ifdef CONFIG_64BIT
32#define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1))
33#define STACK_TOP_MAX TASK_SIZE_64
34#else
35#define DEFAULT_MAP_WINDOW TASK_SIZE
36#define STACK_TOP_MAX TASK_SIZE
37#endif
38#define STACK_ALIGN 16
39
40#define STACK_TOP DEFAULT_MAP_WINDOW
41
42#ifdef CONFIG_MMU
43#define user_max_virt_addr() arch_get_mmap_end(ULONG_MAX, 0, 0)
44#else
45#define user_max_virt_addr() 0
46#endif /* CONFIG_MMU */
47
48/*
49 * This decides where the kernel will search for a free chunk of vm
50 * space during mmap's.
51 */
52#ifdef CONFIG_64BIT
53#define TASK_UNMAPPED_BASE PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3)
54#else
55#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
56#endif
57
58#ifndef __ASSEMBLER__
59
60struct task_struct;
61struct pt_regs;
62
63/*
64 * We use a flag to track in-kernel Vector context. Currently the flag has the
65 * following meaning:
66 *
67 * - bit 0: indicates whether the in-kernel Vector context is active. The
68 * activation of this state disables the preemption. On a non-RT kernel, it
69 * also disable bh.
70 * - bit 1: tells kvm that the vcpu process has guest context saved in vcpu's
71 * context memory and need to be restore upon returing back to the guest.
72 * - bit 2: represents that the vector context has now loaded and belongs to
73 * the guest kernel. Any non-scheduler context saving routing needs to save
74 * the register file to vcpu's context memory. The bit is set upon returing
75 * back to the guest and cleared after loading the host's vector context.
76 * - bits 8: is used for tracking preemptible kernel-mode Vector, when
77 * RISCV_ISA_V_PREEMPTIVE is enabled. Calling kernel_vector_begin() does not
78 * disable the preemption if the thread's kernel_vstate.datap is allocated.
79 * Instead, the kernel set this bit field. Then the trap entry/exit code
80 * knows if we are entering/exiting the context that owns preempt_v.
81 * - 0: the task is not using preempt_v
82 * - 1: the task is actively using preempt_v. But whether does the task own
83 * the preempt_v context is decided by bits in RISCV_V_CTX_DEPTH_MASK.
84 * - bit 16-23 are RISCV_V_CTX_DEPTH_MASK, used by context tracking routine
85 * when preempt_v starts:
86 * - 0: the task is actively using, and own preempt_v context.
87 * - non-zero: the task was using preempt_v, but then took a trap within.
88 * Thus, the task does not own preempt_v. Any use of Vector will have to
89 * save preempt_v, if dirty, and fallback to non-preemptible kernel-mode
90 * Vector.
91 * - bit 29: The thread voluntarily calls schedule() while holding an active
92 * preempt_v. All preempt_v context should be dropped in such case because
93 * V-regs are caller-saved. Only sstatus.VS=ON is persisted across a
94 * schedule() call.
95 * - bit 30: The in-kernel preempt_v context is saved, and is required to be
96 * restored when returning to the context that owns the preempt_v.
97 * - bit 31: The in-kernel preempt_v context is dirty, as signaled by the
98 * trap entry code. Any context switches out-of current task need to save
99 * it to the task's in-kernel V context. Also, any traps nesting on-top-of
100 * preempt_v requesting to use V needs a save.
101 */
102#define RISCV_V_CTX_DEPTH_MASK 0x00ff0000
103
104#define RISCV_V_CTX_UNIT_DEPTH 0x00010000
105#define RISCV_KERNEL_MODE_V 0x00000001
106#define RISCV_V_VCPU_NEED_RESTORE 0x00000002
107#define RISCV_V_VCPU_CTX 0x00000004
108#define RISCV_PREEMPT_V 0x00000100
109#define RISCV_PREEMPT_V_DIRTY 0x80000000
110#define RISCV_PREEMPT_V_NEED_RESTORE 0x40000000
111#define RISCV_PREEMPT_V_IN_SCHEDULE 0x20000000
112
113/* CPU-specific state of a task */
114struct thread_struct {
115 /* Callee-saved registers */
116 unsigned long ra;
117 unsigned long sp; /* Kernel mode stack */
118 unsigned long s[12]; /* s[0]: frame pointer */
119 struct __riscv_d_ext_state fstate;
120 unsigned long bad_cause;
121 unsigned long envcfg;
122 unsigned long sum;
123 u32 riscv_v_flags;
124 u32 vstate_ctrl;
125 struct __riscv_v_ext_state vstate;
126 unsigned long align_ctl;
127 struct __riscv_v_ext_state kernel_vstate;
128#ifdef CONFIG_SMP
129 /* Flush the icache on migration */
130 bool force_icache_flush;
131 /* A forced icache flush is not needed if migrating to the previous cpu. */
132 unsigned int prev_cpu;
133#endif
134#ifdef CONFIG_RISCV_ISA_SSQOSID
135 u32 srmcfg;
136#endif
137};
138
139/* Whitelist the fstate from the task_struct for hardened usercopy */
140static inline void arch_thread_struct_whitelist(unsigned long *offset,
141 unsigned long *size)
142{
143 *offset = offsetof(struct thread_struct, fstate);
144 *size = sizeof_field(struct thread_struct, fstate);
145}
146
147#define INIT_THREAD { \
148 .sp = sizeof(init_stack) + (long)&init_stack, \
149 .align_ctl = PR_UNALIGN_NOPRINT, \
150}
151
152#define task_pt_regs(tsk) \
153 ((struct pt_regs *)(task_stack_page(tsk) + THREAD_SIZE \
154 - ALIGN(sizeof(struct pt_regs), STACK_ALIGN)))
155
156#define KSTK_EIP(tsk) (task_pt_regs(tsk)->epc)
157#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
158
159#define PREFETCH_ASM(x) \
160 ALTERNATIVE(__nops(1), PREFETCH_R(x, 0), 0, \
161 RISCV_ISA_EXT_ZICBOP, CONFIG_RISCV_ISA_ZICBOP)
162
163#define PREFETCHW_ASM(x) \
164 ALTERNATIVE(__nops(1), PREFETCH_W(x, 0), 0, \
165 RISCV_ISA_EXT_ZICBOP, CONFIG_RISCV_ISA_ZICBOP)
166
167#ifdef CONFIG_RISCV_ISA_ZICBOP
168#define ARCH_HAS_PREFETCH
169static inline void prefetch(const void *x)
170{
171 __asm__ __volatile__(PREFETCH_ASM(%0) : : "r" (x) : "memory");
172}
173
174#define ARCH_HAS_PREFETCHW
175static inline void prefetchw(const void *x)
176{
177 __asm__ __volatile__(PREFETCHW_ASM(%0) : : "r" (x) : "memory");
178}
179#endif /* CONFIG_RISCV_ISA_ZICBOP */
180
181/* Do necessary setup to start up a newly executed thread. */
182extern void start_thread(struct pt_regs *regs,
183 unsigned long pc, unsigned long sp);
184
185extern unsigned long __get_wchan(struct task_struct *p);
186
187
188static inline void wait_for_interrupt(void)
189{
190 __asm__ __volatile__ ("wfi");
191}
192
193extern phys_addr_t dma32_phys_limit;
194
195struct device_node;
196int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
197int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid);
198int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
199
200extern void riscv_fill_hwcap(void);
201extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
202
203extern unsigned long signal_minsigstksz __ro_after_init;
204
205#ifdef CONFIG_RISCV_ISA_V
206/* Userspace interface for PR_RISCV_V_{SET,GET}_VS prctl()s: */
207#define RISCV_V_SET_CONTROL(arg) riscv_v_vstate_ctrl_set_current(arg)
208#define RISCV_V_GET_CONTROL() riscv_v_vstate_ctrl_get_current()
209extern long riscv_v_vstate_ctrl_set_current(unsigned long arg);
210extern long riscv_v_vstate_ctrl_get_current(void);
211#endif /* CONFIG_RISCV_ISA_V */
212
213extern int get_unalign_ctl(struct task_struct *tsk, unsigned long addr);
214extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
215
216#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
217#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
218
219#define RISCV_SET_ICACHE_FLUSH_CTX(arg1, arg2) riscv_set_icache_flush_ctx(arg1, arg2)
220extern int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long per_thread);
221
222#ifdef CONFIG_RISCV_ISA_SUPM
223/* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
224long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
225long get_tagged_addr_ctrl(struct task_struct *task);
226#define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg)
227#define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current)
228#endif
229
230#endif /* __ASSEMBLER__ */
231
232#endif /* _ASM_RISCV_PROCESSOR_H */