| 1 | /* SPDX-License-Identifier: GPL-2.0 */
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| 2 | /*
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| 3 | * Copyright (C) 2012 Regents of the University of California
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| 4 | * Copyright (C) 2017 SiFive
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| 5 | *
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| 6 | * This program is free software; you can redistribute it and/or
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| 7 | * modify it under the terms of the GNU General Public License
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| 8 | * as published by the Free Software Foundation, version 2.
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| 9 | *
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| 10 | * This program is distributed in the hope that it will be useful,
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| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 13 | * GNU General Public License for more details.
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| 14 | */
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| 15 |
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| 16 | |
| 17 |
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| 18 | |
| 19 | |
| 20 | |
| 21 |
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| 22 | SYM_FUNC_START(__fstate_save)
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| 23 | li a2, TASK_THREAD_F0
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| 24 | add a0, a0, a2
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| 25 | li t1, SR_FS
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| 26 | csrs CSR_STATUS, t1
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| 27 | frcsr t0
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| 28 | fsd f0, TASK_THREAD_F0_F0(a0)
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| 29 | fsd f1, TASK_THREAD_F1_F0(a0)
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| 30 | fsd f2, TASK_THREAD_F2_F0(a0)
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| 31 | fsd f3, TASK_THREAD_F3_F0(a0)
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| 32 | fsd f4, TASK_THREAD_F4_F0(a0)
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| 33 | fsd f5, TASK_THREAD_F5_F0(a0)
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| 34 | fsd f6, TASK_THREAD_F6_F0(a0)
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| 35 | fsd f7, TASK_THREAD_F7_F0(a0)
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| 36 | fsd f8, TASK_THREAD_F8_F0(a0)
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| 37 | fsd f9, TASK_THREAD_F9_F0(a0)
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| 38 | fsd f10, TASK_THREAD_F10_F0(a0)
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| 39 | fsd f11, TASK_THREAD_F11_F0(a0)
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| 40 | fsd f12, TASK_THREAD_F12_F0(a0)
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| 41 | fsd f13, TASK_THREAD_F13_F0(a0)
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| 42 | fsd f14, TASK_THREAD_F14_F0(a0)
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| 43 | fsd f15, TASK_THREAD_F15_F0(a0)
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| 44 | fsd f16, TASK_THREAD_F16_F0(a0)
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| 45 | fsd f17, TASK_THREAD_F17_F0(a0)
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| 46 | fsd f18, TASK_THREAD_F18_F0(a0)
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| 47 | fsd f19, TASK_THREAD_F19_F0(a0)
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| 48 | fsd f20, TASK_THREAD_F20_F0(a0)
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| 49 | fsd f21, TASK_THREAD_F21_F0(a0)
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| 50 | fsd f22, TASK_THREAD_F22_F0(a0)
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| 51 | fsd f23, TASK_THREAD_F23_F0(a0)
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| 52 | fsd f24, TASK_THREAD_F24_F0(a0)
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| 53 | fsd f25, TASK_THREAD_F25_F0(a0)
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| 54 | fsd f26, TASK_THREAD_F26_F0(a0)
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| 55 | fsd f27, TASK_THREAD_F27_F0(a0)
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| 56 | fsd f28, TASK_THREAD_F28_F0(a0)
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| 57 | fsd f29, TASK_THREAD_F29_F0(a0)
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| 58 | fsd f30, TASK_THREAD_F30_F0(a0)
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| 59 | fsd f31, TASK_THREAD_F31_F0(a0)
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| 60 | sw t0, TASK_THREAD_FCSR_F0(a0)
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| 61 | csrc CSR_STATUS, t1
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| 62 | ret
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| 63 | SYM_FUNC_END(__fstate_save)
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| 64 |
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| 65 | SYM_FUNC_START(__fstate_restore)
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| 66 | li a2, TASK_THREAD_F0
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| 67 | add a0, a0, a2
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| 68 | li t1, SR_FS
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| 69 | lw t0, TASK_THREAD_FCSR_F0(a0)
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| 70 | csrs CSR_STATUS, t1
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| 71 | fld f0, TASK_THREAD_F0_F0(a0)
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| 72 | fld f1, TASK_THREAD_F1_F0(a0)
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| 73 | fld f2, TASK_THREAD_F2_F0(a0)
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| 74 | fld f3, TASK_THREAD_F3_F0(a0)
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| 75 | fld f4, TASK_THREAD_F4_F0(a0)
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| 76 | fld f5, TASK_THREAD_F5_F0(a0)
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| 77 | fld f6, TASK_THREAD_F6_F0(a0)
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| 78 | fld f7, TASK_THREAD_F7_F0(a0)
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| 79 | fld f8, TASK_THREAD_F8_F0(a0)
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| 80 | fld f9, TASK_THREAD_F9_F0(a0)
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| 81 | fld f10, TASK_THREAD_F10_F0(a0)
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| 82 | fld f11, TASK_THREAD_F11_F0(a0)
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| 83 | fld f12, TASK_THREAD_F12_F0(a0)
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| 84 | fld f13, TASK_THREAD_F13_F0(a0)
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| 85 | fld f14, TASK_THREAD_F14_F0(a0)
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| 86 | fld f15, TASK_THREAD_F15_F0(a0)
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| 87 | fld f16, TASK_THREAD_F16_F0(a0)
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| 88 | fld f17, TASK_THREAD_F17_F0(a0)
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| 89 | fld f18, TASK_THREAD_F18_F0(a0)
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| 90 | fld f19, TASK_THREAD_F19_F0(a0)
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| 91 | fld f20, TASK_THREAD_F20_F0(a0)
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| 92 | fld f21, TASK_THREAD_F21_F0(a0)
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| 93 | fld f22, TASK_THREAD_F22_F0(a0)
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| 94 | fld f23, TASK_THREAD_F23_F0(a0)
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| 95 | fld f24, TASK_THREAD_F24_F0(a0)
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| 96 | fld f25, TASK_THREAD_F25_F0(a0)
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| 97 | fld f26, TASK_THREAD_F26_F0(a0)
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| 98 | fld f27, TASK_THREAD_F27_F0(a0)
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| 99 | fld f28, TASK_THREAD_F28_F0(a0)
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| 100 | fld f29, TASK_THREAD_F29_F0(a0)
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| 101 | fld f30, TASK_THREAD_F30_F0(a0)
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| 102 | fld f31, TASK_THREAD_F31_F0(a0)
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| 103 | fscsr t0
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| 104 | csrc CSR_STATUS, t1
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| 105 | ret
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| 106 | SYM_FUNC_END(__fstate_restore)
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| 107 |
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| 108 | |
| 109 | |
| 110 | |
| 111 | |
| 112 | |
| 113 | |
| 114 | |
| 115 | |
| 116 | |
| 117 |
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| 118 | .macro fp_access_prologue
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| 119 | /*
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| 120 | * Compute jump offset to store the correct FP register since we don't
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| 121 | * have indirect FP register access
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| 122 | */
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| 123 | sll t0, a0, 3
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| 124 | la t2, 1f
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| 125 | add t0, t0, t2
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| 126 | li t1, SR_FS
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| 127 | csrs CSR_STATUS, t1
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| 128 | jr t0
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| 129 | 1:
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| 130 | .endm
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| 131 |
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| 132 | .macro fp_access_epilogue
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| 133 | 2:
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| 134 | csrc CSR_STATUS, t1
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| 135 | ret
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| 136 | .endm
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| 137 |
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| 138 | #define fp_access_body(__access_func) \
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| 139 | __access_func(f0); \
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| 140 | __access_func(f1); \
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| 141 | __access_func(f2); \
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| 142 | __access_func(f3); \
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| 143 | __access_func(f4); \
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| 144 | __access_func(f5); \
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| 145 | __access_func(f6); \
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| 146 | __access_func(f7); \
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| 147 | __access_func(f8); \
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| 148 | __access_func(f9); \
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| 149 | __access_func(f10); \
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| 150 | __access_func(f11); \
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| 151 | __access_func(f12); \
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| 152 | __access_func(f13); \
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| 153 | __access_func(f14); \
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| 154 | __access_func(f15); \
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| 155 | __access_func(f16); \
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| 156 | __access_func(f17); \
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| 157 | __access_func(f18); \
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| 158 | __access_func(f19); \
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| 159 | __access_func(f20); \
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| 160 | __access_func(f21); \
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| 161 | __access_func(f22); \
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| 162 | __access_func(f23); \
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| 163 | __access_func(f24); \
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| 164 | __access_func(f25); \
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| 165 | __access_func(f26); \
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| 166 | __access_func(f27); \
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| 167 | __access_func(f28); \
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| 168 | __access_func(f29); \
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| 169 | __access_func(f30); \
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| 170 | __access_func(f31)
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| 171 |
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| 172 |
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| 173 | #ifdef CONFIG_RISCV_SCALAR_MISALIGNED
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| 174 |
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| 175 | /*
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| 176 | * Disable compressed instructions set to keep a constant offset between FP
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| 177 | * load/store/move instructions
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| 178 | */
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| 179 | .option norvc
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| 180 | /*
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| 181 | * put_f32_reg - Set a FP register from a register containing the value
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| 182 | * a0 = FP register index to be set
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| 183 | * a1 = value to be loaded in the FP register
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| 184 | */
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| 185 | SYM_FUNC_START(put_f32_reg)
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| 186 | fp_access_prologue
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| 187 | fp_access_body(put_f32)
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| 188 | fp_access_epilogue
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| 189 | SYM_FUNC_END(put_f32_reg)
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| 190 |
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| 191 | /*
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| 192 | * get_f32_reg - Get a FP register value and return it
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| 193 | * a0 = FP register index to be retrieved
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| 194 | */
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| 195 | SYM_FUNC_START(get_f32_reg)
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| 196 | fp_access_prologue
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| 197 | fp_access_body(get_f32)
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| 198 | fp_access_epilogue
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| 199 | SYM_FUNC_END(get_f32_reg)
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| 200 |
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| 201 | /*
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| 202 | * put_f64_reg - Set a 64 bits FP register from a value or a pointer.
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| 203 | * a0 = FP register index to be set
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| 204 | * a1 = value/pointer to be loaded in the FP register (when xlen == 32 bits, we
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| 205 | * load the value to a pointer).
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| 206 | */
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| 207 | SYM_FUNC_START(put_f64_reg)
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| 208 | fp_access_prologue
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| 209 | fp_access_body(put_f64)
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| 210 | fp_access_epilogue
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| 211 | SYM_FUNC_END(put_f64_reg)
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| 212 |
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| 213 | /*
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| 214 | * get_f64_reg - Get a 64 bits FP register value and returned it or store it to
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| 215 | * a pointer.
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| 216 | * a0 = FP register index to be retrieved
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| 217 | * a1 = If xlen == 32, pointer which should be loaded with the FP register value
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| 218 | * or unused if xlen == 64. In which case the FP register value is returned
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| 219 | * through a0
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| 220 | */
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| 221 | SYM_FUNC_START(get_f64_reg)
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| 222 | fp_access_prologue
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| 223 | fp_access_body(get_f64)
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| 224 | fp_access_epilogue
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| 225 | SYM_FUNC_END(get_f64_reg)
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| 226 |
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| 227 | #endif /* CONFIG_RISCV_SCALAR_MISALIGNED */
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