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| 3 | * Copyright IBM Corp. 1999, 2023
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| 4 |
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| 5 |
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| 6 | #include <linux/irqflags.h>
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| 7 | #include <linux/spinlock.h>
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| 8 | #include <linux/export.h>
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| 9 | #include <linux/kernel.h>
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| 10 | #include <linux/init.h>
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| 11 | #include <linux/smp.h>
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| 12 | #include <linux/cache.h>
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| 13 | #include <asm/abs_lowcore.h>
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| 14 | #include <asm/ctlreg.h>
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| 15 |
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| 16 | |
| 17 | * ctl_lock guards access to global control register contents which
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| 18 | * are kept in the control register save area within absolute lowcore
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| 19 | * at physical address zero.
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| 20 |
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| 21 | static DEFINE_SPINLOCK(system_ctl_lock);
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| 22 |
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| 23 | void system_ctlreg_lock(void)
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| 24 | __acquires(&system_ctl_lock)
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| 25 | {
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| 26 | spin_lock(&system_ctl_lock);
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| 27 | }
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| 28 |
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| 29 | void system_ctlreg_unlock(void)
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| 30 | __releases(&system_ctl_lock)
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| 31 | {
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| 32 | spin_unlock(&system_ctl_lock);
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| 33 | }
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| 34 |
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| 35 | static bool system_ctlreg_area_init __ro_after_init;
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| 36 |
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| 37 | void __init system_ctlreg_init_save_area(struct lowcore *lc)
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| 38 | {
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| 39 | struct lowcore *abs_lc;
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| 40 |
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| 41 | abs_lc = get_abs_lowcore();
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| 42 | __local_ctl_store(0, 15, lc->cregs_save_area);
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| 43 | __local_ctl_store(0, 15, abs_lc->cregs_save_area);
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| 44 | put_abs_lowcore(abs_lc);
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| 45 | system_ctlreg_area_init = true;
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| 46 | }
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| 47 |
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| 48 | struct ctlreg_parms {
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| 49 | unsigned long andval;
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| 50 | unsigned long orval;
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| 51 | unsigned long val;
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| 52 | int request;
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| 53 | int cr;
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| 54 | };
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| 55 |
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| 56 | static void ctlreg_callback(void *info)
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| 57 | {
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| 58 | struct ctlreg_parms *pp = info;
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| 59 | struct ctlreg regs[16];
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| 60 |
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| 61 | __local_ctl_store(0, 15, regs);
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| 62 | if (pp->request == CTLREG_LOAD) {
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| 63 | regs[pp->cr].val = pp->val;
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| 64 | } else {
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| 65 | regs[pp->cr].val &= pp->andval;
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| 66 | regs[pp->cr].val |= pp->orval;
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| 67 | }
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| 68 | __local_ctl_load(0, 15, regs);
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| 69 | }
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| 70 |
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| 71 | static void system_ctlreg_update(void *info)
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| 72 | {
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| 73 | unsigned long flags;
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| 74 |
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| 75 | if (system_state == SYSTEM_BOOTING) {
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| 76 | |
| 77 | * For very early calls do not call on_each_cpu()
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| 78 | * since not everything might be setup.
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| 79 |
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| 80 | local_irq_save(flags);
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| 81 | ctlreg_callback(info);
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| 82 | local_irq_restore(flags);
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| 83 | } else {
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| 84 | on_each_cpu(ctlreg_callback, info, 1);
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| 85 | }
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| 86 | }
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| 87 |
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| 88 | void system_ctlreg_modify(unsigned int cr, unsigned long data, int request)
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| 89 | {
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| 90 | struct ctlreg_parms pp = { .cr = cr, .request = request, };
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| 91 | struct lowcore *abs_lc;
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| 92 |
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| 93 | switch (request) {
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| 94 | case CTLREG_SET_BIT:
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| 95 | pp.orval = 1UL << data;
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| 96 | pp.andval = -1UL;
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| 97 | break;
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| 98 | case CTLREG_CLEAR_BIT:
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| 99 | pp.orval = 0;
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| 100 | pp.andval = ~(1UL << data);
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| 101 | break;
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| 102 | case CTLREG_LOAD:
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| 103 | pp.val = data;
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| 104 | break;
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| 105 | }
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| 106 | if (system_ctlreg_area_init) {
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| 107 | system_ctlreg_lock();
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| 108 | abs_lc = get_abs_lowcore();
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| 109 | if (request == CTLREG_LOAD) {
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| 110 | abs_lc->cregs_save_area[cr].val = pp.val;
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| 111 | } else {
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| 112 | abs_lc->cregs_save_area[cr].val &= pp.andval;
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| 113 | abs_lc->cregs_save_area[cr].val |= pp.orval;
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| 114 | }
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| 115 | put_abs_lowcore(abs_lc);
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| 116 | system_ctlreg_update(&pp);
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| 117 | system_ctlreg_unlock();
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| 118 | } else {
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| 119 | system_ctlreg_update(&pp);
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| 120 | }
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| 121 | }
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| 122 | EXPORT_SYMBOL(system_ctlreg_modify);
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