| 1 | |
| 2 | |
| 3 | * Copyright (C) 2009 Daniel Hellstrom ([email protected]) Aeroflex Gaisler AB
|
| 4 | * Copyright (C) 2009 Konrad Eisele ([email protected]) Aeroflex Gaisler AB
|
| 5 |
|
| 6 |
|
| 7 | #include <linux/kernel.h>
|
| 8 | #include <linux/errno.h>
|
| 9 | #include <linux/mutex.h>
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| 10 | #include <linux/of.h>
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| 11 | #include <linux/interrupt.h>
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| 12 | #include <linux/clocksource.h>
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| 13 | #include <linux/clockchips.h>
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| 14 |
|
| 15 | #include <asm/oplib.h>
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| 16 | #include <asm/timer.h>
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| 17 | #include <asm/prom.h>
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| 18 | #include <asm/leon.h>
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| 19 | #include <asm/leon_amba.h>
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| 20 | #include <asm/traps.h>
|
| 21 | #include <asm/cacheflush.h>
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| 22 | #include <asm/smp.h>
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| 23 | #include <asm/setup.h>
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| 24 |
|
| 25 | #include "kernel.h"
|
| 26 | #include "prom.h"
|
| 27 | #include "irq.h"
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| 28 |
|
| 29 | struct leon3_irqctrl_regs_map *leon3_irqctrl_regs;
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| 30 | struct leon3_gptimer_regs_map *leon3_gptimer_regs;
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| 31 |
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| 32 | int leondebug_irq_disable;
|
| 33 | int leon_debug_irqout;
|
| 34 | static volatile u32 dummy_master_l10_counter;
|
| 35 | unsigned long amba_system_id;
|
| 36 | static DEFINE_SPINLOCK(leon_irq_lock);
|
| 37 |
|
| 38 | static unsigned long leon3_gptimer_idx;
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| 39 | static unsigned long leon3_gptimer_ackmask;
|
| 40 | unsigned long leon3_gptimer_irq;
|
| 41 | unsigned int sparc_leon_eirq;
|
| 42 | #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
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| 43 | #define LEON_IACK (&leon3_irqctrl_regs->iclear)
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| 44 | #define LEON_DO_ACK_HW 1
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| 45 |
|
| 46 | |
| 47 | * been (automatically) ACKed when the CPU takes the trap.
|
| 48 |
|
| 49 | static inline unsigned int leon_eirq_get(int cpu)
|
| 50 | {
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| 51 | return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f;
|
| 52 | }
|
| 53 |
|
| 54 |
|
| 55 | static void leon_handle_ext_irq(struct irq_desc *desc)
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| 56 | {
|
| 57 | unsigned int eirq;
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| 58 | struct irq_bucket *p;
|
| 59 | int cpu = sparc_leon3_cpuid();
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| 60 |
|
| 61 | eirq = leon_eirq_get(cpu);
|
| 62 | p = irq_map[eirq];
|
| 63 | if ((eirq & 0x10) && p && p->irq)
|
| 64 | generic_handle_irq(p->irq);
|
| 65 | }
|
| 66 |
|
| 67 |
|
| 68 | static void leon_eirq_setup(unsigned int eirq)
|
| 69 | {
|
| 70 | unsigned long mask, oldmask;
|
| 71 | unsigned int veirq;
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| 72 |
|
| 73 | if (eirq < 1 || eirq > 0xf) {
|
| 74 | printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq);
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| 75 | return;
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| 76 | }
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| 77 |
|
| 78 | veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0);
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| 79 |
|
| 80 | |
| 81 | * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
|
| 82 | * controller have a mask-bit of their own, so this is safe.
|
| 83 |
|
| 84 | irq_link(veirq);
|
| 85 | mask = 1 << eirq;
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| 86 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id));
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| 87 | LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask));
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| 88 | sparc_leon_eirq = eirq;
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| 89 | }
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| 90 |
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| 91 | unsigned long leon_get_irqmask(unsigned int irq)
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| 92 | {
|
| 93 | unsigned long mask;
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| 94 |
|
| 95 | if (!irq || ((irq > 0xf) && !sparc_leon_eirq)
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| 96 | || ((irq > 0x1f) && sparc_leon_eirq)) {
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| 97 | printk(KERN_ERR
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| 98 | "leon_get_irqmask: false irq number: %d\n", irq);
|
| 99 | mask = 0;
|
| 100 | } else {
|
| 101 | mask = LEON_HARD_INT(irq);
|
| 102 | }
|
| 103 | return mask;
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| 104 | }
|
| 105 |
|
| 106 | #ifdef CONFIG_SMP
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| 107 | static int irq_choose_cpu(const struct cpumask *affinity)
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| 108 | {
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| 109 | unsigned int cpu = cpumask_first_and(affinity, cpu_online_mask);
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| 110 |
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| 111 | if (cpumask_subset(cpu_online_mask, affinity) || cpu >= nr_cpu_ids)
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| 112 | return boot_cpu_id;
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| 113 | else
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| 114 | return cpu;
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| 115 | }
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| 116 | #else
|
| 117 | #define irq_choose_cpu(affinity) boot_cpu_id
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| 118 | #endif
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| 119 |
|
| 120 | static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest,
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| 121 | bool force)
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| 122 | {
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| 123 | unsigned long mask, oldmask, flags;
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| 124 | int oldcpu, newcpu;
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| 125 |
|
| 126 | mask = (unsigned long)data->chip_data;
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| 127 | oldcpu = irq_choose_cpu(irq_data_get_affinity_mask(data));
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| 128 | newcpu = irq_choose_cpu(dest);
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| 129 |
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| 130 | if (oldcpu == newcpu)
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| 131 | goto out;
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| 132 |
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| 133 |
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| 134 | spin_lock_irqsave(&leon_irq_lock, flags);
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| 135 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu));
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| 136 | LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask));
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| 137 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu));
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| 138 | LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask));
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| 139 | spin_unlock_irqrestore(&leon_irq_lock, flags);
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| 140 | out:
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| 141 | return IRQ_SET_MASK_OK;
|
| 142 | }
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| 143 |
|
| 144 | static void leon_unmask_irq(struct irq_data *data)
|
| 145 | {
|
| 146 | unsigned long mask, oldmask, flags;
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| 147 | int cpu;
|
| 148 |
|
| 149 | mask = (unsigned long)data->chip_data;
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| 150 | cpu = irq_choose_cpu(irq_data_get_affinity_mask(data));
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| 151 | spin_lock_irqsave(&leon_irq_lock, flags);
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| 152 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
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| 153 | LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask));
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| 154 | spin_unlock_irqrestore(&leon_irq_lock, flags);
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| 155 | }
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| 156 |
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| 157 | static void leon_mask_irq(struct irq_data *data)
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| 158 | {
|
| 159 | unsigned long mask, oldmask, flags;
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| 160 | int cpu;
|
| 161 |
|
| 162 | mask = (unsigned long)data->chip_data;
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| 163 | cpu = irq_choose_cpu(irq_data_get_affinity_mask(data));
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| 164 | spin_lock_irqsave(&leon_irq_lock, flags);
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| 165 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
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| 166 | LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask));
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| 167 | spin_unlock_irqrestore(&leon_irq_lock, flags);
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| 168 | }
|
| 169 |
|
| 170 | static unsigned int leon_startup_irq(struct irq_data *data)
|
| 171 | {
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| 172 | irq_link(data->irq);
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| 173 | leon_unmask_irq(data);
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| 174 | return 0;
|
| 175 | }
|
| 176 |
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| 177 | static void leon_shutdown_irq(struct irq_data *data)
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| 178 | {
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| 179 | leon_mask_irq(data);
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| 180 | irq_unlink(data->irq);
|
| 181 | }
|
| 182 |
|
| 183 |
|
| 184 | static void leon_eoi_irq(struct irq_data *data)
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| 185 | {
|
| 186 | unsigned long mask = (unsigned long)data->chip_data;
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| 187 |
|
| 188 | if (mask & LEON_DO_ACK_HW)
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| 189 | LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW);
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| 190 | }
|
| 191 |
|
| 192 | static struct irq_chip leon_irq = {
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| 193 | .name = "leon",
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| 194 | .irq_startup = leon_startup_irq,
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| 195 | .irq_shutdown = leon_shutdown_irq,
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| 196 | .irq_mask = leon_mask_irq,
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| 197 | .irq_unmask = leon_unmask_irq,
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| 198 | .irq_eoi = leon_eoi_irq,
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| 199 | .irq_set_affinity = leon_set_affinity,
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| 200 | };
|
| 201 |
|
| 202 | |
| 203 | * Build a LEON IRQ for the edge triggered LEON IRQ controller:
|
| 204 | * Edge (normal) IRQ - handle_simple_irq, ack=DON'T-CARE, never ack
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| 205 | * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR
|
| 206 | * Per-CPU Edge - handle_percpu_irq, ack=0
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| 207 |
|
| 208 | unsigned int leon_build_device_irq(unsigned int real_irq,
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| 209 | irq_flow_handler_t flow_handler,
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| 210 | const char *name, int do_ack)
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| 211 | {
|
| 212 | unsigned int irq;
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| 213 | unsigned long mask;
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| 214 | struct irq_desc *desc;
|
| 215 |
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| 216 | irq = 0;
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| 217 | mask = leon_get_irqmask(real_irq);
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| 218 | if (mask == 0)
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| 219 | goto out;
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| 220 |
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| 221 | irq = irq_alloc(real_irq, real_irq);
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| 222 | if (irq == 0)
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| 223 | goto out;
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| 224 |
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| 225 | if (do_ack)
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| 226 | mask |= LEON_DO_ACK_HW;
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| 227 |
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| 228 | desc = irq_to_desc(irq);
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| 229 | if (!desc || !desc->handle_irq || desc->handle_irq == handle_bad_irq) {
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| 230 | irq_set_chip_and_handler_name(irq, &leon_irq,
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| 231 | flow_handler, name);
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| 232 | irq_set_chip_data(irq, (void *)mask);
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| 233 | }
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| 234 |
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| 235 | out:
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| 236 | return irq;
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| 237 | }
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| 238 |
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| 239 | static unsigned int _leon_build_device_irq(struct platform_device *op,
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| 240 | unsigned int real_irq)
|
| 241 | {
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| 242 | return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
|
| 243 | }
|
| 244 |
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| 245 | void leon_update_virq_handling(unsigned int virq,
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| 246 | irq_flow_handler_t flow_handler,
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| 247 | const char *name, int do_ack)
|
| 248 | {
|
| 249 | unsigned long mask = (unsigned long)irq_get_chip_data(virq);
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| 250 |
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| 251 | mask &= ~LEON_DO_ACK_HW;
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| 252 | if (do_ack)
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| 253 | mask |= LEON_DO_ACK_HW;
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| 254 |
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| 255 | irq_set_chip_and_handler_name(virq, &leon_irq,
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| 256 | flow_handler, name);
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| 257 | irq_set_chip_data(virq, (void *)mask);
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| 258 | }
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| 259 |
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| 260 | static u32 leon_cycles_offset(void)
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| 261 | {
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| 262 | u32 rld, val, ctrl, off;
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| 263 |
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| 264 | rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld);
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| 265 | val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
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| 266 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
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| 267 | if (LEON3_GPTIMER_CTRL_ISPENDING(ctrl)) {
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| 268 | val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
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| 269 | off = 2 * rld - val;
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| 270 | } else {
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| 271 | off = rld - val;
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| 272 | }
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| 273 |
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| 274 | return off;
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| 275 | }
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| 276 |
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| 277 | #ifdef CONFIG_SMP
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| 278 |
|
| 279 |
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| 280 | static irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused)
|
| 281 | {
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| 282 | struct clock_event_device *ce;
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| 283 | int cpu = smp_processor_id();
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| 284 |
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| 285 | leon_clear_profile_irq(cpu);
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| 286 |
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| 287 | if (cpu == boot_cpu_id)
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| 288 | timer_interrupt(irq, NULL);
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| 289 |
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| 290 | ce = &per_cpu(sparc32_clockevent, cpu);
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| 291 |
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| 292 | irq_enter();
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| 293 | if (ce->event_handler)
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| 294 | ce->event_handler(ce);
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| 295 | irq_exit();
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| 296 |
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| 297 | return IRQ_HANDLED;
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| 298 | }
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| 299 |
|
| 300 | #endif
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| 301 |
|
| 302 | void __init leon_init_timers(void)
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| 303 | {
|
| 304 | int irq, eirq;
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| 305 | struct device_node *rootnp, *np, *nnp;
|
| 306 | struct property *pp;
|
| 307 | int len;
|
| 308 | int icsel;
|
| 309 | int ampopts;
|
| 310 | int err;
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| 311 | u32 config;
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| 312 | u32 ctrl;
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| 313 |
|
| 314 | sparc_config.get_cycles_offset = leon_cycles_offset;
|
| 315 | sparc_config.cs_period = 1000000 / HZ;
|
| 316 | sparc_config.features |= FEAT_L10_CLOCKSOURCE;
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| 317 |
|
| 318 | #ifndef CONFIG_SMP
|
| 319 | sparc_config.features |= FEAT_L10_CLOCKEVENT;
|
| 320 | #endif
|
| 321 |
|
| 322 | leondebug_irq_disable = 0;
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| 323 | leon_debug_irqout = 0;
|
| 324 | master_l10_counter = (u32 __iomem *)&dummy_master_l10_counter;
|
| 325 | dummy_master_l10_counter = 0;
|
| 326 |
|
| 327 | rootnp = of_find_node_by_path("/ambapp0");
|
| 328 | if (!rootnp)
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| 329 | goto bad;
|
| 330 |
|
| 331 |
|
| 332 | pp = of_find_property(rootnp, "systemid", &len);
|
| 333 | if (pp)
|
| 334 | amba_system_id = *(unsigned long *)pp->value;
|
| 335 |
|
| 336 |
|
| 337 | np = of_find_node_by_name(rootnp, "GAISLER_IRQMP");
|
| 338 | if (!np) {
|
| 339 | np = of_find_node_by_name(rootnp, "01_00d");
|
| 340 | if (!np)
|
| 341 | goto bad;
|
| 342 | }
|
| 343 | pp = of_find_property(np, "reg", &len);
|
| 344 | if (!pp)
|
| 345 | goto bad;
|
| 346 | leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value;
|
| 347 |
|
| 348 |
|
| 349 | nnp = rootnp;
|
| 350 |
|
| 351 | retry:
|
| 352 | np = of_find_node_by_name(nnp, "GAISLER_GPTIMER");
|
| 353 | if (!np) {
|
| 354 | np = of_find_node_by_name(nnp, "01_011");
|
| 355 | if (!np)
|
| 356 | goto bad;
|
| 357 | }
|
| 358 |
|
| 359 | ampopts = 0;
|
| 360 | pp = of_find_property(np, "ampopts", &len);
|
| 361 | if (pp) {
|
| 362 | ampopts = *(int *)pp->value;
|
| 363 | if (ampopts == 0) {
|
| 364 | |
| 365 | * allocated by other OS
|
| 366 | nnp = np;
|
| 367 | goto retry;
|
| 368 | }
|
| 369 | }
|
| 370 |
|
| 371 |
|
| 372 | leon3_gptimer_idx = ampopts & 0x7;
|
| 373 |
|
| 374 | pp = of_find_property(np, "reg", &len);
|
| 375 | if (pp)
|
| 376 | leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **)
|
| 377 | pp->value;
|
| 378 | pp = of_find_property(np, "interrupts", &len);
|
| 379 | if (pp)
|
| 380 | leon3_gptimer_irq = *(unsigned int *)pp->value;
|
| 381 |
|
| 382 | if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq))
|
| 383 | goto bad;
|
| 384 |
|
| 385 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
|
| 386 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
|
| 387 | ctrl | LEON3_GPTIMER_CTRL_PENDING);
|
| 388 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
|
| 389 |
|
| 390 | if ((ctrl & LEON3_GPTIMER_CTRL_PENDING) != 0)
|
| 391 | leon3_gptimer_ackmask = ~LEON3_GPTIMER_CTRL_PENDING;
|
| 392 | else
|
| 393 | leon3_gptimer_ackmask = ~0;
|
| 394 |
|
| 395 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0);
|
| 396 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld,
|
| 397 | (((1000000 / HZ) - 1)));
|
| 398 | LEON3_BYPASS_STORE_PA(
|
| 399 | &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0);
|
| 400 |
|
| 401 | |
| 402 | * The IRQ controller may (if implemented) consist of multiple
|
| 403 | * IRQ controllers, each mapped on a 4Kb boundary.
|
| 404 | * Each CPU may be routed to different IRQCTRLs, however
|
| 405 | * we assume that all CPUs (in SMP system) is routed to the
|
| 406 | * same IRQ Controller, and for non-SMP only one IRQCTRL is
|
| 407 | * accessed anyway.
|
| 408 | * In AMP systems, Linux must run on CPU0 for the time being.
|
| 409 |
|
| 410 | icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]);
|
| 411 | icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf;
|
| 412 | leon3_irqctrl_regs += icsel;
|
| 413 |
|
| 414 |
|
| 415 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0);
|
| 416 |
|
| 417 |
|
| 418 | eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus)
|
| 419 | >> 16) & 0xf;
|
| 420 | if (eirq != 0)
|
| 421 | leon_eirq_setup(eirq);
|
| 422 |
|
| 423 | #ifdef CONFIG_SMP
|
| 424 | {
|
| 425 | unsigned long flags;
|
| 426 |
|
| 427 | |
| 428 | * In SMP, sun4m adds a IPI handler to IRQ trap handler that
|
| 429 | * LEON never must take, sun4d and LEON overwrites the branch
|
| 430 | * with a NOP.
|
| 431 |
|
| 432 | local_irq_save(flags);
|
| 433 | patchme_maybe_smp_msg[0] = 0x01000000;
|
| 434 | local_ops->cache_all();
|
| 435 | local_irq_restore(flags);
|
| 436 | }
|
| 437 | #endif
|
| 438 |
|
| 439 | config = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config);
|
| 440 | if (config & (1 << LEON3_GPTIMER_SEPIRQ))
|
| 441 | leon3_gptimer_irq += leon3_gptimer_idx;
|
| 442 | else if ((config & LEON3_GPTIMER_TIMERS) > 1)
|
| 443 | pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n");
|
| 444 |
|
| 445 | #ifdef CONFIG_SMP
|
| 446 |
|
| 447 | irq = leon_build_device_irq(leon3_gptimer_irq, handle_percpu_irq,
|
| 448 | "per-cpu", 0);
|
| 449 | err = request_irq(irq, leon_percpu_timer_ce_interrupt,
|
| 450 | IRQF_PERCPU | IRQF_TIMER, "timer", NULL);
|
| 451 | #else
|
| 452 | irq = _leon_build_device_irq(NULL, leon3_gptimer_irq);
|
| 453 | err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
|
| 454 | #endif
|
| 455 | if (err) {
|
| 456 | pr_err("Unable to attach timer IRQ%d\n", irq);
|
| 457 | prom_halt();
|
| 458 | }
|
| 459 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
|
| 460 | LEON3_GPTIMER_EN |
|
| 461 | LEON3_GPTIMER_RL |
|
| 462 | LEON3_GPTIMER_LD |
|
| 463 | LEON3_GPTIMER_IRQEN);
|
| 464 | return;
|
| 465 | bad:
|
| 466 | printk(KERN_ERR "No Timer/irqctrl found\n");
|
| 467 | BUG();
|
| 468 | return;
|
| 469 | }
|
| 470 |
|
| 471 | static void leon_clear_clock_irq(void)
|
| 472 | {
|
| 473 | u32 ctrl;
|
| 474 |
|
| 475 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl);
|
| 476 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
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| 477 | ctrl & leon3_gptimer_ackmask);
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| 478 | }
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| 479 |
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| 480 | static void leon_load_profile_irq(int cpu, unsigned int limit)
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| 481 | {
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| 482 | }
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| 483 |
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| 484 | #ifdef CONFIG_SMP
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| 485 | void leon_clear_profile_irq(int cpu)
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| 486 | {
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| 487 | }
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| 488 |
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| 489 | void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
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| 490 | {
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| 491 | unsigned long mask, flags, *addr;
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| 492 | mask = leon_get_irqmask(irq_nr);
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| 493 | spin_lock_irqsave(&leon_irq_lock, flags);
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| 494 | addr = (unsigned long *)LEON_IMASK(cpu);
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| 495 | LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask));
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| 496 | spin_unlock_irqrestore(&leon_irq_lock, flags);
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| 497 | }
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| 498 |
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| 499 | #endif
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| 500 |
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| 501 | void __init leon_init_IRQ(void)
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| 502 | {
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| 503 | sparc_config.init_timers = leon_init_timers;
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| 504 | sparc_config.build_device_irq = _leon_build_device_irq;
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| 505 | sparc_config.clock_rate = 1000000;
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| 506 | sparc_config.clear_clock_irq = leon_clear_clock_irq;
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| 507 | sparc_config.load_profile_irq = leon_load_profile_irq;
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| 508 | }
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