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1// SPDX-License-Identifier: GPL-2.0
2/* time.c: UltraSparc timer and TOD clock support.
3 *
4 * Copyright (C) 1997, 2008 David S. Miller ([email protected])
5 * Copyright (C) 1998 Eddie C. Dost ([email protected])
6 *
7 * Based largely on code which is:
8 *
9 * Copyright (C) 1996 Thomas K. Dyas ([email protected])
10 */
11
12#include <linux/errno.h>
13#include <linux/export.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/string.h>
18#include <linux/mm.h>
19#include <linux/interrupt.h>
20#include <linux/time.h>
21#include <linux/timex.h>
22#include <linux/init.h>
23#include <linux/ioport.h>
24#include <linux/mc146818rtc.h>
25#include <linux/delay.h>
26#include <linux/profile.h>
27#include <linux/bcd.h>
28#include <linux/jiffies.h>
29#include <linux/cpufreq.h>
30#include <linux/percpu.h>
31#include <linux/rtc/m48t59.h>
32#include <linux/kernel_stat.h>
33#include <linux/clockchips.h>
34#include <linux/clocksource.h>
35#include <linux/platform_device.h>
36#include <linux/sched/clock.h>
37#include <linux/ftrace.h>
38
39#include <asm/oplib.h>
40#include <asm/timer.h>
41#include <asm/irq.h>
42#include <asm/io.h>
43#include <asm/prom.h>
44#include <asm/starfire.h>
45#include <asm/smp.h>
46#include <asm/sections.h>
47#include <asm/cpudata.h>
48#include <linux/uaccess.h>
49#include <asm/irq_regs.h>
50#include <asm/cacheflush.h>
51
52#include "entry.h"
53#include "kernel.h"
54
55DEFINE_SPINLOCK(rtc_lock);
56
57#ifdef CONFIG_SMP
58unsigned long profile_pc(struct pt_regs *regs)
59{
60 unsigned long pc = instruction_pointer(regs);
61
62 if (in_lock_functions(pc))
63 return regs->u_regs[UREG_RETPC];
64 return pc;
65}
66EXPORT_SYMBOL(profile_pc);
67#endif
68
69static void tick_disable_protection(void)
70{
71 /* Set things up so user can access tick register for profiling
72 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
73 * read back of %tick after writing it.
74 */
75 __asm__ __volatile__(
76 " ba,pt %%xcc, 1f\n"
77 " nop\n"
78 " .align 64\n"
79 "1: rd %%tick, %%g2\n"
80 " add %%g2, 6, %%g2\n"
81 " andn %%g2, %0, %%g2\n"
82 " wrpr %%g2, 0, %%tick\n"
83 " rdpr %%tick, %%g0"
84 : /* no outputs */
85 : "r" (TICK_PRIV_BIT)
86 : "g2");
87}
88
89static void tick_disable_irq(void)
90{
91 __asm__ __volatile__(
92 " ba,pt %%xcc, 1f\n"
93 " nop\n"
94 " .align 64\n"
95 "1: wr %0, 0x0, %%tick_cmpr\n"
96 " rd %%tick_cmpr, %%g0"
97 : /* no outputs */
98 : "r" (TICKCMP_IRQ_BIT));
99}
100
101static void tick_init_tick(void)
102{
103 tick_disable_protection();
104 tick_disable_irq();
105}
106
107static unsigned long long tick_get_tick(void)
108{
109 unsigned long ret;
110
111 __asm__ __volatile__("rd %%tick, %0\n\t"
112 "mov %0, %0"
113 : "=r" (ret));
114
115 return ret & ~TICK_PRIV_BIT;
116}
117
118static int tick_add_compare(unsigned long adj)
119{
120 unsigned long orig_tick, new_tick, new_compare;
121
122 __asm__ __volatile__("rd %%tick, %0"
123 : "=r" (orig_tick));
124
125 orig_tick &= ~TICKCMP_IRQ_BIT;
126
127 /* Workaround for Spitfire Errata (#54 I think??), I discovered
128 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
129 * number 103640.
130 *
131 * On Blackbird writes to %tick_cmpr can fail, the
132 * workaround seems to be to execute the wr instruction
133 * at the start of an I-cache line, and perform a dummy
134 * read back from %tick_cmpr right after writing to it. -DaveM
135 */
136 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
137 " add %1, %2, %0\n\t"
138 ".align 64\n"
139 "1:\n\t"
140 "wr %0, 0, %%tick_cmpr\n\t"
141 "rd %%tick_cmpr, %%g0\n\t"
142 : "=r" (new_compare)
143 : "r" (orig_tick), "r" (adj));
144
145 __asm__ __volatile__("rd %%tick, %0"
146 : "=r" (new_tick));
147 new_tick &= ~TICKCMP_IRQ_BIT;
148
149 return ((long)(new_tick - (orig_tick+adj))) > 0L;
150}
151
152static unsigned long tick_add_tick(unsigned long adj)
153{
154 unsigned long new_tick;
155
156 /* Also need to handle Blackbird bug here too. */
157 __asm__ __volatile__("rd %%tick, %0\n\t"
158 "add %0, %1, %0\n\t"
159 "wrpr %0, 0, %%tick\n\t"
160 : "=&r" (new_tick)
161 : "r" (adj));
162
163 return new_tick;
164}
165
166/* Searches for cpu clock frequency with given cpuid in OpenBoot tree */
167static unsigned long cpuid_to_freq(phandle node, int cpuid)
168{
169 bool is_cpu_node = false;
170 unsigned long freq = 0;
171 char type[128];
172
173 if (!node)
174 return freq;
175
176 if (prom_getproperty(node, "device_type", type, sizeof(type)) != -1)
177 is_cpu_node = (strcmp(type, "cpu") == 0);
178
179 /* try upa-portid then cpuid to get cpuid, see prom_64.c */
180 if (is_cpu_node && (prom_getint(node, "upa-portid") == cpuid ||
181 prom_getint(node, "cpuid") == cpuid))
182 freq = prom_getintdefault(node, "clock-frequency", 0);
183 if (!freq)
184 freq = cpuid_to_freq(prom_getchild(node), cpuid);
185 if (!freq)
186 freq = cpuid_to_freq(prom_getsibling(node), cpuid);
187
188 return freq;
189}
190
191static unsigned long tick_get_frequency(void)
192{
193 return cpuid_to_freq(prom_root_node, hard_smp_processor_id());
194}
195
196static struct sparc64_tick_ops tick_operations __cacheline_aligned = {
197 .name = "tick",
198 .init_tick = tick_init_tick,
199 .disable_irq = tick_disable_irq,
200 .get_tick = tick_get_tick,
201 .add_tick = tick_add_tick,
202 .add_compare = tick_add_compare,
203 .get_frequency = tick_get_frequency,
204 .softint_mask = 1UL << 0,
205};
206
207struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
208EXPORT_SYMBOL(tick_ops);
209
210static void stick_disable_irq(void)
211{
212 __asm__ __volatile__(
213 "wr %0, 0x0, %%asr25"
214 : /* no outputs */
215 : "r" (TICKCMP_IRQ_BIT));
216}
217
218static void stick_init_tick(void)
219{
220 /* Writes to the %tick and %stick register are not
221 * allowed on sun4v. The Hypervisor controls that
222 * bit, per-strand.
223 */
224 if (tlb_type != hypervisor) {
225 tick_disable_protection();
226 tick_disable_irq();
227
228 /* Let the user get at STICK too. */
229 __asm__ __volatile__(
230 " rd %%asr24, %%g2\n"
231 " andn %%g2, %0, %%g2\n"
232 " wr %%g2, 0, %%asr24"
233 : /* no outputs */
234 : "r" (TICK_PRIV_BIT)
235 : "g1", "g2");
236 }
237
238 stick_disable_irq();
239}
240
241static unsigned long long stick_get_tick(void)
242{
243 unsigned long ret;
244
245 __asm__ __volatile__("rd %%asr24, %0"
246 : "=r" (ret));
247
248 return ret & ~TICK_PRIV_BIT;
249}
250
251static unsigned long stick_add_tick(unsigned long adj)
252{
253 unsigned long new_tick;
254
255 __asm__ __volatile__("rd %%asr24, %0\n\t"
256 "add %0, %1, %0\n\t"
257 "wr %0, 0, %%asr24\n\t"
258 : "=&r" (new_tick)
259 : "r" (adj));
260
261 return new_tick;
262}
263
264static int stick_add_compare(unsigned long adj)
265{
266 unsigned long orig_tick, new_tick;
267
268 __asm__ __volatile__("rd %%asr24, %0"
269 : "=r" (orig_tick));
270 orig_tick &= ~TICKCMP_IRQ_BIT;
271
272 __asm__ __volatile__("wr %0, 0, %%asr25"
273 : /* no outputs */
274 : "r" (orig_tick + adj));
275
276 __asm__ __volatile__("rd %%asr24, %0"
277 : "=r" (new_tick));
278 new_tick &= ~TICKCMP_IRQ_BIT;
279
280 return ((long)(new_tick - (orig_tick+adj))) > 0L;
281}
282
283static unsigned long stick_get_frequency(void)
284{
285 return prom_getintdefault(prom_root_node, "stick-frequency", 0);
286}
287
288static struct sparc64_tick_ops stick_operations __read_mostly = {
289 .name = "stick",
290 .init_tick = stick_init_tick,
291 .disable_irq = stick_disable_irq,
292 .get_tick = stick_get_tick,
293 .add_tick = stick_add_tick,
294 .add_compare = stick_add_compare,
295 .get_frequency = stick_get_frequency,
296 .softint_mask = 1UL << 16,
297};
298
299/* On Hummingbird the STICK/STICK_CMPR register is implemented
300 * in I/O space. There are two 64-bit registers each, the
301 * first holds the low 32-bits of the value and the second holds
302 * the high 32-bits.
303 *
304 * Since STICK is constantly updating, we have to access it carefully.
305 *
306 * The sequence we use to read is:
307 * 1) read high
308 * 2) read low
309 * 3) read high again, if it rolled re-read both low and high again.
310 *
311 * Writing STICK safely is also tricky:
312 * 1) write low to zero
313 * 2) write high
314 * 3) write low
315 */
316static unsigned long __hbird_read_stick(void)
317{
318 unsigned long ret, tmp1, tmp2, tmp3;
319 unsigned long addr = HBIRD_STICK_ADDR+8;
320
321 __asm__ __volatile__("ldxa [%1] %5, %2\n"
322 "1:\n\t"
323 "sub %1, 0x8, %1\n\t"
324 "ldxa [%1] %5, %3\n\t"
325 "add %1, 0x8, %1\n\t"
326 "ldxa [%1] %5, %4\n\t"
327 "cmp %4, %2\n\t"
328 "bne,a,pn %%xcc, 1b\n\t"
329 " mov %4, %2\n\t"
330 "sllx %4, 32, %4\n\t"
331 "or %3, %4, %0\n\t"
332 : "=&r" (ret), "=&r" (addr),
333 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
334 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
335
336 return ret;
337}
338
339static void __hbird_write_stick(unsigned long val)
340{
341 unsigned long low = (val & 0xffffffffUL);
342 unsigned long high = (val >> 32UL);
343 unsigned long addr = HBIRD_STICK_ADDR;
344
345 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
346 "add %0, 0x8, %0\n\t"
347 "stxa %3, [%0] %4\n\t"
348 "sub %0, 0x8, %0\n\t"
349 "stxa %2, [%0] %4"
350 : "=&r" (addr)
351 : "0" (addr), "r" (low), "r" (high),
352 "i" (ASI_PHYS_BYPASS_EC_E));
353}
354
355static void __hbird_write_compare(unsigned long val)
356{
357 unsigned long low = (val & 0xffffffffUL);
358 unsigned long high = (val >> 32UL);
359 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
360
361 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
362 "sub %0, 0x8, %0\n\t"
363 "stxa %2, [%0] %4"
364 : "=&r" (addr)
365 : "0" (addr), "r" (low), "r" (high),
366 "i" (ASI_PHYS_BYPASS_EC_E));
367}
368
369static void hbtick_disable_irq(void)
370{
371 __hbird_write_compare(TICKCMP_IRQ_BIT);
372}
373
374static void hbtick_init_tick(void)
375{
376 tick_disable_protection();
377
378 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
379 * XXX into actually sending STICK interrupts. I think because
380 * XXX of how we store %tick_cmpr in head.S this somehow resets the
381 * XXX {TICK + STICK} interrupt mux. -DaveM
382 */
383 __hbird_write_stick(__hbird_read_stick());
384
385 hbtick_disable_irq();
386}
387
388static unsigned long long hbtick_get_tick(void)
389{
390 return __hbird_read_stick() & ~TICK_PRIV_BIT;
391}
392
393static unsigned long hbtick_add_tick(unsigned long adj)
394{
395 unsigned long val;
396
397 val = __hbird_read_stick() + adj;
398 __hbird_write_stick(val);
399
400 return val;
401}
402
403static int hbtick_add_compare(unsigned long adj)
404{
405 unsigned long val = __hbird_read_stick();
406 unsigned long val2;
407
408 val &= ~TICKCMP_IRQ_BIT;
409 val += adj;
410 __hbird_write_compare(val);
411
412 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
413
414 return ((long)(val2 - val)) > 0L;
415}
416
417static unsigned long hbtick_get_frequency(void)
418{
419 return prom_getintdefault(prom_root_node, "stick-frequency", 0);
420}
421
422static struct sparc64_tick_ops hbtick_operations __read_mostly = {
423 .name = "hbtick",
424 .init_tick = hbtick_init_tick,
425 .disable_irq = hbtick_disable_irq,
426 .get_tick = hbtick_get_tick,
427 .add_tick = hbtick_add_tick,
428 .add_compare = hbtick_add_compare,
429 .get_frequency = hbtick_get_frequency,
430 .softint_mask = 1UL << 0,
431};
432
433unsigned long cmos_regs;
434EXPORT_SYMBOL(cmos_regs);
435
436static struct resource rtc_cmos_resource;
437
438static struct platform_device rtc_cmos_device = {
439 .name = "rtc_cmos",
440 .id = -1,
441 .resource = &rtc_cmos_resource,
442 .num_resources = 1,
443};
444
445static int rtc_probe(struct platform_device *op)
446{
447 struct resource *r;
448
449 printk(KERN_INFO "%pOF: RTC regs at 0x%llx\n",
450 op->dev.of_node, op->resource[0].start);
451
452 /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
453 * up a fake resource so that the probe works for all cases.
454 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
455 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
456 */
457
458 r = &rtc_cmos_resource;
459 r->flags = IORESOURCE_IO;
460 r->name = op->resource[0].name;
461 r->start = op->resource[0].start;
462 r->end = op->resource[0].end;
463
464 cmos_regs = op->resource[0].start;
465 return platform_device_register(&rtc_cmos_device);
466}
467
468static const struct of_device_id rtc_match[] = {
469 {
470 .name = "rtc",
471 .compatible = "m5819",
472 },
473 {
474 .name = "rtc",
475 .compatible = "isa-m5819p",
476 },
477 {
478 .name = "rtc",
479 .compatible = "isa-m5823p",
480 },
481 {
482 .name = "rtc",
483 .compatible = "ds1287",
484 },
485 {},
486};
487
488static struct platform_driver rtc_driver = {
489 .probe = rtc_probe,
490 .driver = {
491 .name = "rtc",
492 .of_match_table = rtc_match,
493 },
494};
495
496static struct platform_device rtc_bq4802_device = {
497 .name = "rtc-bq4802",
498 .id = -1,
499 .num_resources = 1,
500};
501
502static int bq4802_probe(struct platform_device *op)
503{
504
505 printk(KERN_INFO "%pOF: BQ4802 regs at 0x%llx\n",
506 op->dev.of_node, op->resource[0].start);
507
508 rtc_bq4802_device.resource = &op->resource[0];
509 return platform_device_register(&rtc_bq4802_device);
510}
511
512static const struct of_device_id bq4802_match[] = {
513 {
514 .name = "rtc",
515 .compatible = "bq4802",
516 },
517 {},
518};
519
520static struct platform_driver bq4802_driver = {
521 .probe = bq4802_probe,
522 .driver = {
523 .name = "bq4802",
524 .of_match_table = bq4802_match,
525 },
526};
527
528static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
529{
530 struct platform_device *pdev = to_platform_device(dev);
531 void __iomem *regs = (void __iomem *) pdev->resource[0].start;
532
533 return readb(regs + ofs);
534}
535
536static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
537{
538 struct platform_device *pdev = to_platform_device(dev);
539 void __iomem *regs = (void __iomem *) pdev->resource[0].start;
540
541 writeb(val, regs + ofs);
542}
543
544static struct m48t59_plat_data m48t59_data = {
545 .read_byte = mostek_read_byte,
546 .write_byte = mostek_write_byte,
547 .yy_offset = 68,
548};
549
550static struct platform_device m48t59_rtc = {
551 .name = "rtc-m48t59",
552 .id = 0,
553 .num_resources = 1,
554 .dev = {
555 .platform_data = &m48t59_data,
556 },
557};
558
559static int mostek_probe(struct platform_device *op)
560{
561 struct device_node *dp = op->dev.of_node;
562
563 /* On an Enterprise system there can be multiple mostek clocks.
564 * We should only match the one that is on the central FHC bus.
565 */
566 if (of_node_name_eq(dp->parent, "fhc") &&
567 !of_node_name_eq(dp->parent->parent, "central"))
568 return -ENODEV;
569
570 printk(KERN_INFO "%pOF: Mostek regs at 0x%llx\n",
571 dp, op->resource[0].start);
572
573 m48t59_rtc.resource = &op->resource[0];
574 return platform_device_register(&m48t59_rtc);
575}
576
577static const struct of_device_id mostek_match[] = {
578 {
579 .name = "eeprom",
580 },
581 {},
582};
583
584static struct platform_driver mostek_driver = {
585 .probe = mostek_probe,
586 .driver = {
587 .name = "mostek",
588 .of_match_table = mostek_match,
589 },
590};
591
592static struct platform_device rtc_sun4v_device = {
593 .name = "rtc-sun4v",
594 .id = -1,
595};
596
597static struct platform_device rtc_starfire_device = {
598 .name = "rtc-starfire",
599 .id = -1,
600};
601
602static int __init clock_init(void)
603{
604 if (this_is_starfire)
605 return platform_device_register(&rtc_starfire_device);
606
607 if (tlb_type == hypervisor)
608 return platform_device_register(&rtc_sun4v_device);
609
610 (void) platform_driver_register(&rtc_driver);
611 (void) platform_driver_register(&mostek_driver);
612 (void) platform_driver_register(&bq4802_driver);
613
614 return 0;
615}
616
617/* Must be after subsys_initcall() so that busses are probed. Must
618 * be before device_initcall() because things like the RTC driver
619 * need to see the clock registers.
620 */
621fs_initcall(clock_init);
622
623/* Return true if this is Hummingbird, aka Ultra-IIe */
624static bool is_hummingbird(void)
625{
626 unsigned long ver, manuf, impl;
627
628 __asm__ __volatile__ ("rdpr %%ver, %0"
629 : "=&r" (ver));
630 manuf = ((ver >> 48) & 0xffff);
631 impl = ((ver >> 32) & 0xffff);
632
633 return (manuf == 0x17 && impl == 0x13);
634}
635
636struct freq_table {
637 unsigned long clock_tick_ref;
638 unsigned int ref_freq;
639};
640static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
641
642unsigned long sparc64_get_clock_tick(unsigned int cpu)
643{
644 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
645
646 if (ft->clock_tick_ref)
647 return ft->clock_tick_ref;
648 return cpu_data(cpu).clock_tick;
649}
650EXPORT_SYMBOL(sparc64_get_clock_tick);
651
652#ifdef CONFIG_CPU_FREQ
653
654static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
655 void *data)
656{
657 struct cpufreq_freqs *freq = data;
658 unsigned int cpu;
659 struct freq_table *ft;
660
661 for_each_cpu(cpu, freq->policy->cpus) {
662 ft = &per_cpu(sparc64_freq_table, cpu);
663
664 if (!ft->ref_freq) {
665 ft->ref_freq = freq->old;
666 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
667 }
668
669 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
670 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
671 cpu_data(cpu).clock_tick =
672 cpufreq_scale(ft->clock_tick_ref, ft->ref_freq,
673 freq->new);
674 }
675 }
676
677 return 0;
678}
679
680static struct notifier_block sparc64_cpufreq_notifier_block = {
681 .notifier_call = sparc64_cpufreq_notifier
682};
683
684static int __init register_sparc64_cpufreq_notifier(void)
685{
686
687 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
688 CPUFREQ_TRANSITION_NOTIFIER);
689 return 0;
690}
691
692core_initcall(register_sparc64_cpufreq_notifier);
693
694#endif /* CONFIG_CPU_FREQ */
695
696static int sparc64_next_event(unsigned long delta,
697 struct clock_event_device *evt)
698{
699 return tick_operations.add_compare(delta) ? -ETIME : 0;
700}
701
702static int sparc64_timer_shutdown(struct clock_event_device *evt)
703{
704 tick_operations.disable_irq();
705 return 0;
706}
707
708static struct clock_event_device sparc64_clockevent = {
709 .features = CLOCK_EVT_FEAT_ONESHOT,
710 .set_state_shutdown = sparc64_timer_shutdown,
711 .set_next_event = sparc64_next_event,
712 .rating = 100,
713 .shift = 30,
714 .irq = -1,
715};
716static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
717
718void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
719{
720 struct pt_regs *old_regs = set_irq_regs(regs);
721 unsigned long tick_mask = tick_operations.softint_mask;
722 int cpu = smp_processor_id();
723 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
724
725 clear_softint(tick_mask);
726
727 irq_enter();
728
729 local_cpu_data().irq0_irqs++;
730 kstat_incr_irq_this_cpu(0);
731
732 if (unlikely(!evt->event_handler)) {
733 printk(KERN_WARNING
734 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
735 } else
736 evt->event_handler(evt);
737
738 irq_exit();
739
740 set_irq_regs(old_regs);
741}
742
743void setup_sparc64_timer(void)
744{
745 struct clock_event_device *sevt;
746 unsigned long pstate;
747
748 /* Guarantee that the following sequences execute
749 * uninterrupted.
750 */
751 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
752 "wrpr %0, %1, %%pstate"
753 : "=r" (pstate)
754 : "i" (PSTATE_IE));
755
756 tick_operations.init_tick();
757
758 /* Restore PSTATE_IE. */
759 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
760 : /* no outputs */
761 : "r" (pstate));
762
763 sevt = this_cpu_ptr(&sparc64_events);
764
765 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
766 sevt->cpumask = cpumask_of(smp_processor_id());
767
768 clockevents_register_device(sevt);
769}
770
771#define SPARC64_NSEC_PER_CYC_SHIFT 10UL
772
773static struct clocksource clocksource_tick = {
774 .rating = 100,
775 .mask = CLOCKSOURCE_MASK(64),
776 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
777};
778
779static unsigned long tb_ticks_per_usec __read_mostly;
780
781void __delay(unsigned long loops)
782{
783 unsigned long bclock = get_tick();
784
785 while ((get_tick() - bclock) < loops)
786 ;
787}
788EXPORT_SYMBOL(__delay);
789
790void udelay(unsigned long usecs)
791{
792 __delay(tb_ticks_per_usec * usecs);
793}
794EXPORT_SYMBOL(udelay);
795
796static u64 clocksource_tick_read(struct clocksource *cs)
797{
798 return get_tick();
799}
800
801static void __init get_tick_patch(void)
802{
803 unsigned int *addr, *instr, i;
804 struct get_tick_patch *p;
805
806 if (tlb_type == spitfire && is_hummingbird())
807 return;
808
809 for (p = &__get_tick_patch; p < &__get_tick_patch_end; p++) {
810 instr = (tlb_type == spitfire) ? p->tick : p->stick;
811 addr = (unsigned int *)(unsigned long)p->addr;
812 for (i = 0; i < GET_TICK_NINSTR; i++) {
813 addr[i] = instr[i];
814 /* ensure that address is modified before flush */
815 wmb();
816 flushi(&addr[i]);
817 }
818 }
819}
820
821static void __init init_tick_ops(struct sparc64_tick_ops *ops)
822{
823 unsigned long freq, quotient, tick;
824
825 freq = ops->get_frequency();
826 quotient = clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT);
827 tick = ops->get_tick();
828
829 ops->offset = (tick * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT;
830 ops->ticks_per_nsec_quotient = quotient;
831 ops->frequency = freq;
832 tick_operations = *ops;
833 get_tick_patch();
834}
835
836void __init time_init_early(void)
837{
838 if (tlb_type == spitfire) {
839 if (is_hummingbird()) {
840 init_tick_ops(&hbtick_operations);
841 clocksource_tick.vdso_clock_mode = VDSO_CLOCKMODE_NONE;
842 } else {
843 init_tick_ops(&tick_operations);
844 clocksource_tick.vdso_clock_mode = VDSO_CLOCKMODE_TICK;
845 }
846 } else {
847 init_tick_ops(&stick_operations);
848 clocksource_tick.vdso_clock_mode = VDSO_CLOCKMODE_STICK;
849 }
850}
851
852void __init time_init(void)
853{
854 unsigned long freq;
855
856 freq = tick_operations.frequency;
857 tb_ticks_per_usec = freq / USEC_PER_SEC;
858
859 clocksource_tick.name = tick_operations.name;
860 clocksource_tick.read = clocksource_tick_read;
861
862 clocksource_register_hz(&clocksource_tick, freq);
863 printk("clocksource: mult[%x] shift[%d]\n",
864 clocksource_tick.mult, clocksource_tick.shift);
865
866 sparc64_clockevent.name = tick_operations.name;
867 clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4);
868
869 sparc64_clockevent.max_delta_ns =
870 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
871 sparc64_clockevent.max_delta_ticks = 0x7fffffffffffffffUL;
872 sparc64_clockevent.min_delta_ns =
873 clockevent_delta2ns(0xF, &sparc64_clockevent);
874 sparc64_clockevent.min_delta_ticks = 0xF;
875
876 printk("clockevent: mult[%x] shift[%d]\n",
877 sparc64_clockevent.mult, sparc64_clockevent.shift);
878
879 setup_sparc64_timer();
880}
881
882unsigned long long sched_clock(void)
883{
884 unsigned long quotient = tick_operations.ticks_per_nsec_quotient;
885 unsigned long offset = tick_operations.offset;
886
887 /* Use barrier so the compiler emits the loads first and overlaps load
888 * latency with reading tick, because reading %tick/%stick is a
889 * post-sync instruction that will flush and restart subsequent
890 * instructions after it commits.
891 */
892 barrier();
893
894 return ((get_tick() * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT) - offset;
895}
896
897bool delay_read_timer(unsigned long *timer_val)
898{
899 *timer_val = get_tick();
900 return true;
901}