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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18#define LOAD_OFFSET __START_KERNEL_map
19
20#define RUNTIME_DISCARD_EXIT
21#define EMITS_PT_NOTE
22#define RO_EXCEPTION_TABLE_ALIGN 16
23
24#include <asm-generic/vmlinux.lds.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27#include <asm/page_types.h>
28#include <asm/orc_lookup.h>
29#include <asm/cache.h>
30#include <asm/boot.h>
31#include <asm/kexec.h>
32
33#undef i386 /* in case the preprocessor is a 32bit one */
34
35OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
36
37#ifdef CONFIG_X86_32
38OUTPUT_ARCH(i386)
39ENTRY(phys_startup_32)
40#else
41OUTPUT_ARCH(i386:x86-64)
42ENTRY(phys_startup_64)
43#endif
44
45jiffies = jiffies_64;
46const_current_task = current_task;
47const_cpu_current_top_of_stack = cpu_current_top_of_stack;
48
49#if defined(CONFIG_X86_64)
50/*
51 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
52 * boundaries spanning kernel text, rodata and data sections.
53 *
54 * However, kernel identity mappings will have different RWX permissions
55 * to the pages mapping to text and to the pages padding (which are freed) the
56 * text section. Hence kernel identity mappings will be broken to smaller
57 * pages. For 64-bit, kernel text and kernel identity mappings are different,
58 * so we can enable protection checks as well as retain 2MB large page
59 * mappings for kernel text.
60 */
61#define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
62
63#define X86_ALIGN_RODATA_END \
64 . = ALIGN(HPAGE_SIZE); \
65 __end_rodata_hpage_align = .; \
66 __end_rodata_aligned = .;
67
68#if defined(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION) || defined(CONFIG_MITIGATION_SRSO)
69#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
70#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
71#else
72#define ALIGN_ENTRY_TEXT_BEGIN
73#define ALIGN_ENTRY_TEXT_END
74#endif
75
76#else
77
78#define X86_ALIGN_RODATA_BEGIN
79#define X86_ALIGN_RODATA_END \
80 . = ALIGN(PAGE_SIZE); \
81 __end_rodata_aligned = .;
82
83#define ALIGN_ENTRY_TEXT_BEGIN
84#define ALIGN_ENTRY_TEXT_END
85#endif
86
87#ifdef CONFIG_AMD_MEM_ENCRYPT
88/*
89 * This section contains data which will be mapped as decrypted. Memory
90 * encryption operates on a page basis. Make this section PMD-aligned
91 * to avoid splitting the pages while mapping the section early.
92 *
93 * Note: We use a separate section so that only this section gets
94 * decrypted to avoid exposing more than we wish.
95 */
96#define BSS_DECRYPTED \
97 . = ALIGN(PMD_SIZE); \
98 __start_bss_decrypted = .; \
99 __pi___start_bss_decrypted = .; \
100 *(.bss..decrypted); \
101 . = ALIGN(PAGE_SIZE); \
102 __start_bss_decrypted_unused = .; \
103 . = ALIGN(PMD_SIZE); \
104 __end_bss_decrypted = .; \
105 __pi___end_bss_decrypted = .; \
106
107#else
108#define BSS_DECRYPTED
109#endif
110
111#if defined(CONFIG_X86_64) && defined(CONFIG_KEXEC_CORE)
112#define KEXEC_RELOCATE_KERNEL \
113 . = ALIGN(0x100); \
114 __relocate_kernel_start = .; \
115 *(.text..relocate_kernel); \
116 *(.data..relocate_kernel); \
117 __relocate_kernel_end = .;
118
119ASSERT(__relocate_kernel_end - __relocate_kernel_start <= KEXEC_CONTROL_CODE_MAX_SIZE,
120 "relocate_kernel code too large!")
121#else
122#define KEXEC_RELOCATE_KERNEL
123#endif
124PHDRS {
125 text PT_LOAD FLAGS(5); /* R_E */
126 data PT_LOAD FLAGS(6); /* RW_ */
127 note PT_NOTE FLAGS(0); /* ___ */
128}
129
130SECTIONS
131{
132 . = __START_KERNEL;
133#ifdef CONFIG_X86_32
134 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
135#else
136 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
137#endif
138
139 /* Text and read-only data */
140 .text : AT(ADDR(.text) - LOAD_OFFSET) {
141 _text = .;
142 __pi__text = .;
143 _stext = .;
144 ALIGN_ENTRY_TEXT_BEGIN
145 *(.text..__x86.rethunk_untrain)
146 ENTRY_TEXT
147
148#ifdef CONFIG_MITIGATION_SRSO
149 /*
150 * See the comment above srso_alias_untrain_ret()'s
151 * definition.
152 */
153 . = srso_alias_untrain_ret | (1 << 2) | (1 << 8) | (1 << 14) | (1 << 20);
154 *(.text..__x86.rethunk_safe)
155#endif
156 ALIGN_ENTRY_TEXT_END
157
158 TEXT_TEXT
159 SCHED_TEXT
160 LOCK_TEXT
161 KPROBES_TEXT
162 SOFTIRQENTRY_TEXT
163#ifdef CONFIG_MITIGATION_RETPOLINE
164 *(.text..__x86.indirect_thunk)
165 *(.text..__x86.return_thunk)
166#endif
167 STATIC_CALL_TEXT
168 *(.gnu.warning)
169
170 } :text = 0xcccccccc
171
172 /* End of text section, which should occupy whole number of pages */
173 _etext = .;
174 . = ALIGN(PAGE_SIZE);
175
176 X86_ALIGN_RODATA_BEGIN
177 RO_DATA(PAGE_SIZE)
178 X86_ALIGN_RODATA_END
179
180 /* Data */
181 .data : AT(ADDR(.data) - LOAD_OFFSET) {
182 /* Start of data section */
183 _sdata = .;
184
185 /* init_task */
186 INIT_TASK_DATA(THREAD_SIZE)
187
188 /* equivalent to task_pt_regs(&init_task) */
189 __top_init_kernel_stack = __end_init_stack - TOP_OF_KERNEL_STACK_PADDING - PTREGS_SIZE;
190
191#ifdef CONFIG_X86_32
192 /* 32 bit has nosave before _edata */
193 NOSAVE_DATA
194#endif
195
196 PAGE_ALIGNED_DATA(PAGE_SIZE)
197
198 CACHE_HOT_DATA(L1_CACHE_BYTES)
199
200 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
201
202 DATA_DATA
203 CONSTRUCTORS
204 KEXEC_RELOCATE_KERNEL
205
206 /* rarely changed data like cpu maps */
207 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
208
209 /* End of data section */
210 _edata = .;
211 } :data
212
213 BUG_TABLE
214
215 ORC_UNWIND_TABLE
216
217 /* Init code and data - will be freed after init */
218 . = ALIGN(PAGE_SIZE);
219 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
220 __init_begin = .; /* paired with __init_end */
221 }
222
223 INIT_TEXT_SECTION(PAGE_SIZE)
224
225 /*
226 * Section for code used exclusively before alternatives are run. All
227 * references to such code must be patched out by alternatives, normally
228 * by using X86_FEATURE_ALWAYS CPU feature bit.
229 *
230 * See cpu_feature_enabled() for an example.
231 */
232 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
233 *(.altinstr_aux)
234 . = ALIGN(PAGE_SIZE);
235 __inittext_end = .;
236 }
237
238 INIT_DATA_SECTION(16)
239
240 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
241 __x86_cpu_dev_start = .;
242 *(.x86_cpu_dev.init)
243 __x86_cpu_dev_end = .;
244 }
245
246#ifdef CONFIG_X86_INTEL_MID
247 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
248 LOAD_OFFSET) {
249 __x86_intel_mid_dev_start = .;
250 *(.x86_intel_mid_dev.init)
251 __x86_intel_mid_dev_end = .;
252 }
253#endif
254
255#ifdef CONFIG_MITIGATION_RETPOLINE
256 /*
257 * List of instructions that call/jmp/jcc to retpoline thunks
258 * __x86_indirect_thunk_*(). These instructions can be patched along
259 * with alternatives, after which the section can be freed.
260 */
261 . = ALIGN(8);
262 .retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) {
263 __retpoline_sites = .;
264 *(.retpoline_sites)
265 __retpoline_sites_end = .;
266 }
267
268 . = ALIGN(8);
269 .return_sites : AT(ADDR(.return_sites) - LOAD_OFFSET) {
270 __return_sites = .;
271 *(.return_sites)
272 __return_sites_end = .;
273 }
274
275 . = ALIGN(8);
276 .call_sites : AT(ADDR(.call_sites) - LOAD_OFFSET) {
277 __call_sites = .;
278 *(.call_sites)
279 __call_sites_end = .;
280 }
281#endif
282
283#ifdef CONFIG_X86_KERNEL_IBT
284 . = ALIGN(8);
285 .ibt_endbr_seal : AT(ADDR(.ibt_endbr_seal) - LOAD_OFFSET) {
286 __ibt_endbr_seal = .;
287 *(.ibt_endbr_seal)
288 __ibt_endbr_seal_end = .;
289 }
290#endif
291
292#ifdef CONFIG_FINEIBT
293 . = ALIGN(8);
294 .cfi_sites : AT(ADDR(.cfi_sites) - LOAD_OFFSET) {
295 __cfi_sites = .;
296 *(.cfi_sites)
297 __cfi_sites_end = .;
298 }
299#endif
300
301 /*
302 * struct alt_inst entries. From the header (alternative.h):
303 * "Alternative instructions for different CPU types or capabilities"
304 * Think locking instructions on spinlocks.
305 */
306 . = ALIGN(8);
307 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
308 __alt_instructions = .;
309 *(.altinstructions)
310 __alt_instructions_end = .;
311 }
312
313 /*
314 * And here are the replacement instructions. The linker sticks
315 * them as binary blobs. The .altinstructions has enough data to
316 * get the address and the length of them to patch the kernel safely.
317 */
318 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
319 *(.altinstr_replacement)
320 }
321
322 . = ALIGN(8);
323 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
324 __apicdrivers = .;
325 *(.apicdrivers);
326 __apicdrivers_end = .;
327 }
328
329 . = ALIGN(8);
330 /*
331 * .exit.text is discarded at runtime, not link time, to deal with
332 * references from .altinstructions
333 */
334 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
335 EXIT_TEXT
336 }
337
338 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
339 EXIT_DATA
340 }
341
342 PERCPU_SECTION(L1_CACHE_BYTES)
343 ASSERT(__per_cpu_hot_end - __per_cpu_hot_start <= 64, "percpu cache hot data too large")
344
345 RUNTIME_CONST_VARIABLES
346 RUNTIME_CONST(ptr, USER_PTR_MAX)
347
348 . = ALIGN(PAGE_SIZE);
349
350 /* freed after init ends here */
351 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
352 __init_end = .;
353 }
354
355#ifdef CONFIG_X86_64
356 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
357 NOSAVE_DATA
358 }
359#endif
360
361 /* BSS */
362 . = ALIGN(PAGE_SIZE);
363 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
364 __bss_start = .;
365 *(.bss..page_aligned)
366 . = ALIGN(PAGE_SIZE);
367 *(BSS_MAIN)
368 BSS_DECRYPTED
369 . = ALIGN(PAGE_SIZE);
370 __bss_stop = .;
371 }
372
373 /*
374 * The memory occupied from _text to here, __end_of_kernel_reserve, is
375 * automatically reserved in setup_arch(). Anything after here must be
376 * explicitly reserved using memblock_reserve() or it will be discarded
377 * and treated as available memory.
378 */
379 __end_of_kernel_reserve = .;
380
381 . = ALIGN(PAGE_SIZE);
382 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
383 __brk_base = .;
384 . += 64 * 1024; /* 64k alignment slop space */
385 *(.bss..brk) /* areas brk users have reserved */
386 __brk_limit = .;
387 }
388
389 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
390 _end = .;
391 __pi__end = .;
392
393#ifdef CONFIG_AMD_MEM_ENCRYPT
394 /*
395 * Early scratch/workarea section: Lives outside of the kernel proper
396 * (_text - _end).
397 *
398 * Resides after _end because even though the .brk section is after
399 * __end_of_kernel_reserve, the .brk section is later reserved as a
400 * part of the kernel. Since it is located after __end_of_kernel_reserve
401 * it will be discarded and become part of the available memory. As
402 * such, it can only be used by very early boot code and must not be
403 * needed afterwards.
404 *
405 * Currently used by SME for performing in-place encryption of the
406 * kernel during boot. Resides on a 2MB boundary to simplify the
407 * pagetable setup used for SME in-place encryption.
408 */
409 . = ALIGN(HPAGE_SIZE);
410 .init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) {
411 __init_scratch_begin = .;
412 *(.init.scratch)
413 . = ALIGN(HPAGE_SIZE);
414 __init_scratch_end = .;
415 }
416#endif
417
418 STABS_DEBUG
419 DWARF_DEBUG
420 PROPELLER_DATA
421 MODINFO
422 ELF_DETAILS
423
424 DISCARDS
425
426 /*
427 * Make sure that the .got.plt is either completely empty or it
428 * contains only the lazy dispatch entries.
429 */
430 .got.plt (INFO) : { *(.got.plt) }
431 ASSERT(SIZEOF(.got.plt) == 0 ||
432#ifdef CONFIG_X86_64
433 SIZEOF(.got.plt) == 0x18,
434#else
435 SIZEOF(.got.plt) == 0xc,
436#endif
437 "Unexpected GOT/PLT entries detected!")
438
439 /*
440 * Sections that should stay zero sized, which is safer to
441 * explicitly check instead of blindly discarding.
442 */
443 .got : {
444 *(.got) *(.igot.*)
445 }
446 ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
447
448 .plt : {
449 *(.plt) *(.plt.*) *(.iplt)
450 }
451 ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")
452
453 .rel.dyn : {
454 *(.rel.*) *(.rel_*)
455 }
456 ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!")
457
458 .rela.dyn : {
459 *(.rela.*) *(.rela_*)
460 }
461 ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")
462}
463
464/*
465 * COMPILE_TEST kernels can be large - CONFIG_KASAN, for example, can cause
466 * this. Let's assume that nobody will be running a COMPILE_TEST kernel and
467 * let's assert that fuller build coverage is more valuable than being able to
468 * run a COMPILE_TEST kernel.
469 */
470#ifndef CONFIG_COMPILE_TEST
471/*
472 * The ASSERT() sync to . is intentional, for binutils 2.14 compatibility:
473 */
474. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
475 "kernel image bigger than KERNEL_IMAGE_SIZE");
476#endif
477
478/* needed for Clang - see arch/x86/entry/entry.S */
479PROVIDE(__ref_stack_chk_guard = __stack_chk_guard);
480
481#ifdef CONFIG_X86_64
482
483#ifdef CONFIG_MITIGATION_UNRET_ENTRY
484. = ASSERT((retbleed_return_thunk & 0x3f) == 0, "retbleed_return_thunk not cacheline-aligned");
485#endif
486
487#ifdef CONFIG_MITIGATION_SRSO
488. = ASSERT((srso_safe_ret & 0x3f) == 0, "srso_safe_ret not cacheline-aligned");
489/*
490 * GNU ld cannot do XOR until 2.41.
491 * https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f6f78318fca803c4907fb8d7f6ded8295f1947b1
492 *
493 * LLVM lld cannot do XOR until lld-17.
494 * https://github.com/llvm/llvm-project/commit/fae96104d4378166cbe5c875ef8ed808a356f3fb
495 *
496 * Instead do: (A | B) - (A & B) in order to compute the XOR
497 * of the two function addresses:
498 */
499. = ASSERT(((ABSOLUTE(srso_alias_untrain_ret) | srso_alias_safe_ret) -
500 (ABSOLUTE(srso_alias_untrain_ret) & srso_alias_safe_ret)) == ((1 << 2) | (1 << 8) | (1 << 14) | (1 << 20)),
501 "SRSO function pair won't alias");
502#endif
503
504#if defined(CONFIG_MITIGATION_ITS) && !defined(CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B)
505. = ASSERT(__x86_indirect_its_thunk_rax & 0x20, "__x86_indirect_thunk_rax not in second half of cacheline");
506. = ASSERT(((__x86_indirect_its_thunk_rcx - __x86_indirect_its_thunk_rax) % 64) == 0, "Indirect thunks are not cacheline apart");
507. = ASSERT(__x86_indirect_its_thunk_array == __x86_indirect_its_thunk_rax, "Gap in ITS thunk array");
508#endif
509
510#if defined(CONFIG_MITIGATION_ITS) && !defined(CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B)
511. = ASSERT(its_return_thunk & 0x20, "its_return_thunk not in second half of cacheline");
512#endif
513
514#endif /* CONFIG_X86_64 */
515
516/*
517 * The symbols below are referenced using relative relocations in the
518 * respective ELF notes. This produces build time constants that the
519 * linker will never mark as relocatable. (Using just ABSOLUTE() is not
520 * sufficient for that).
521 */
522#ifdef CONFIG_XEN_PV
523xen_elfnote_entry_value =
524 ABSOLUTE(xen_elfnote_entry) + ABSOLUTE(startup_xen);
525#endif
526#ifdef CONFIG_PVH
527xen_elfnote_phys32_entry_value =
528 ABSOLUTE(xen_elfnote_phys32_entry) + ABSOLUTE(pvh_start_xen - LOAD_OFFSET);
529#endif
530
531#include "../boot/startup/exports.h"