| 1 | |
| 2 | |
| 3 | * Driver for the on-board character LCD found on some ARM reference boards
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| 4 | * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
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| 5 | * https://en.wikipedia.org/wiki/HD44780_Character_LCD
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| 6 | * Currently it will just display the text "ARM Linux" and the linux version
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| 7 | *
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| 8 | * Author: Linus Walleij <[email protected]>
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| 9 |
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| 10 | #include <linux/completion.h>
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| 11 | #include <linux/container_of.h>
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| 12 | #include <linux/delay.h>
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| 13 | #include <linux/err.h>
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| 14 | #include <linux/init.h>
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| 15 | #include <linux/interrupt.h>
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| 16 | #include <linux/iopoll.h>
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| 17 | #include <linux/platform_device.h>
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| 18 | #include <linux/string.h>
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| 19 | #include <linux/types.h>
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| 20 | #include <linux/workqueue.h>
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| 21 | #include <generated/utsrelease.h>
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| 22 |
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| 23 | #define DRIVERNAME "arm-charlcd"
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| 24 | #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000))
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| 25 |
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| 26 |
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| 27 | #define CHAR_COM 0x00U
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| 28 | #define CHAR_DAT 0x04U
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| 29 | #define CHAR_RD 0x08U
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| 30 | #define CHAR_RAW 0x0CU
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| 31 | #define CHAR_MASK 0x10U
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| 32 | #define CHAR_STAT 0x14U
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| 33 |
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| 34 | #define CHAR_RAW_CLEAR 0x00000000U
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| 35 | #define CHAR_RAW_VALID 0x00000100U
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| 36 |
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| 37 |
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| 38 | #define HD_CLEAR 0x01U
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| 39 | #define HD_HOME 0x02U
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| 40 | #define HD_ENTRYMODE 0x04U
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| 41 | #define HD_ENTRYMODE_INCREMENT 0x02U
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| 42 | #define HD_ENTRYMODE_SHIFT 0x01U
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| 43 | #define HD_DISPCTRL 0x08U
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| 44 | #define HD_DISPCTRL_ON 0x04U
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| 45 | #define HD_DISPCTRL_CURSOR_ON 0x02U
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| 46 | #define HD_DISPCTRL_CURSOR_BLINK 0x01U
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| 47 | #define HD_CRSR_SHIFT 0x10U
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| 48 | #define HD_CRSR_SHIFT_DISPLAY 0x08U
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| 49 | #define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U
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| 50 | #define HD_FUNCSET 0x20U
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| 51 | #define HD_FUNCSET_8BIT 0x10U
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| 52 | #define HD_FUNCSET_2_LINES 0x08U
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| 53 | #define HD_FUNCSET_FONT_5X10 0x04U
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| 54 | #define HD_SET_CGRAM 0x40U
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| 55 | #define HD_SET_DDRAM 0x80U
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| 56 | #define HD_BUSY_FLAG 0x80U
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| 57 |
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| 58 | |
| 59 | * struct charlcd - Private data structure
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| 60 | * @dev: a pointer back to containing device
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| 61 | * @virtbase: the offset to the controller in virtual memory
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| 62 | * @irq: reserved interrupt number
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| 63 | * @complete: completion structure for the last LCD command
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| 64 | * @init_work: delayed work structure to initialize the display on boot
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| 65 |
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| 66 | struct charlcd {
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| 67 | struct device *dev;
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| 68 | void __iomem *virtbase;
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| 69 | int irq;
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| 70 | struct completion complete;
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| 71 | struct delayed_work init_work;
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| 72 | };
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| 73 |
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| 74 | static irqreturn_t charlcd_interrupt(int irq, void *data)
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| 75 | {
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| 76 | struct charlcd *lcd = data;
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| 77 | u8 status;
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| 78 |
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| 79 | status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
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| 80 |
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| 81 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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| 82 | if (status)
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| 83 | complete(&lcd->complete);
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| 84 | else
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| 85 | dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status);
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| 86 | return IRQ_HANDLED;
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| 87 | }
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| 88 |
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| 89 |
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| 90 | static void charlcd_wait_complete_irq(struct charlcd *lcd)
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| 91 | {
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| 92 | int ret;
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| 93 |
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| 94 | ret = wait_for_completion_interruptible_timeout(&lcd->complete,
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| 95 | CHARLCD_TIMEOUT);
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| 96 |
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| 97 | writel(0x00, lcd->virtbase + CHAR_MASK);
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| 98 |
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| 99 | if (ret < 0) {
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| 100 | dev_err(lcd->dev,
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| 101 | "wait_for_completion_interruptible_timeout() returned %d waiting for ready\n",
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| 102 | ret);
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| 103 | return;
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| 104 | }
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| 105 |
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| 106 | if (ret == 0) {
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| 107 | dev_err(lcd->dev, "charlcd controller timed out waiting for ready\n");
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| 108 | return;
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| 109 | }
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| 110 | }
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| 111 |
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| 112 | static u8 charlcd_4bit_read_char(struct charlcd *lcd)
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| 113 | {
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| 114 | u8 data;
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| 115 | u32 val;
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| 116 |
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| 117 |
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| 118 | if (lcd->irq >= 0)
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| 119 | charlcd_wait_complete_irq(lcd);
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| 120 | else {
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| 121 | udelay(100);
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| 122 | readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val,
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| 123 | val & CHAR_RAW_VALID, 100, 1000);
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| 124 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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| 125 | }
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| 126 | msleep(1);
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| 127 |
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| 128 |
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| 129 | data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
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| 130 |
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| 131 | |
| 132 | * The second read for the low bits does not trigger an IRQ
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| 133 | * so in this case we have to poll for the 4 lower bits
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| 134 |
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| 135 | udelay(100);
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| 136 | readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val,
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| 137 | val & CHAR_RAW_VALID, 100, 1000);
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| 138 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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| 139 | msleep(1);
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| 140 |
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| 141 |
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| 142 | data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
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| 143 |
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| 144 | return data;
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| 145 | }
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| 146 |
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| 147 | static bool charlcd_4bit_read_bf(struct charlcd *lcd)
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| 148 | {
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| 149 | if (lcd->irq >= 0) {
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| 150 | |
| 151 | * If we'll use IRQs to wait for the busyflag, clear any
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| 152 | * pending flag and enable IRQ
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| 153 |
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| 154 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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| 155 | init_completion(&lcd->complete);
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| 156 | writel(0x01, lcd->virtbase + CHAR_MASK);
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| 157 | }
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| 158 | readl(lcd->virtbase + CHAR_COM);
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| 159 |
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| 160 | return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG;
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| 161 | }
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| 162 |
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| 163 | static void charlcd_4bit_wait_busy(struct charlcd *lcd)
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| 164 | {
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| 165 | int retries = 50;
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| 166 |
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| 167 | udelay(100);
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| 168 | while (charlcd_4bit_read_bf(lcd) && retries)
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| 169 | retries--;
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| 170 | if (!retries)
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| 171 | dev_err(lcd->dev, "timeout waiting for busyflag\n");
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| 172 | }
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| 173 |
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| 174 | static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd)
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| 175 | {
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| 176 | u32 cmdlo = (cmd << 4) & 0xf0;
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| 177 | u32 cmdhi = (cmd & 0xf0);
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| 178 |
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| 179 | writel(cmdhi, lcd->virtbase + CHAR_COM);
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| 180 | udelay(10);
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| 181 | writel(cmdlo, lcd->virtbase + CHAR_COM);
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| 182 | charlcd_4bit_wait_busy(lcd);
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| 183 | }
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| 184 |
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| 185 | static void charlcd_4bit_char(struct charlcd *lcd, u8 ch)
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| 186 | {
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| 187 | u32 chlo = (ch << 4) & 0xf0;
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| 188 | u32 chhi = (ch & 0xf0);
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| 189 |
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| 190 | writel(chhi, lcd->virtbase + CHAR_DAT);
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| 191 | udelay(10);
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| 192 | writel(chlo, lcd->virtbase + CHAR_DAT);
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| 193 | charlcd_4bit_wait_busy(lcd);
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| 194 | }
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| 195 |
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| 196 | static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str)
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| 197 | {
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| 198 | u8 offset;
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| 199 | int i;
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| 200 |
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| 201 | |
| 202 | * We support line 0, 1
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| 203 | * Line 1 runs from 0x00..0x27
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| 204 | * Line 2 runs from 0x28..0x4f
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| 205 |
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| 206 | if (line == 0)
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| 207 | offset = 0;
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| 208 | else if (line == 1)
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| 209 | offset = 0x28;
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| 210 | else
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| 211 | return;
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| 212 |
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| 213 |
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| 214 | charlcd_4bit_command(lcd, HD_SET_DDRAM | offset);
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| 215 |
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| 216 |
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| 217 | for (i = 0; i < strlen(str) && i < 0x28; i++)
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| 218 | charlcd_4bit_char(lcd, str[i]);
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| 219 | }
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| 220 |
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| 221 | static void charlcd_4bit_init(struct charlcd *lcd)
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| 222 | {
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| 223 |
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| 224 | writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
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| 225 | msleep(5);
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| 226 | writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
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| 227 | udelay(100);
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| 228 | writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
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| 229 | udelay(100);
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| 230 |
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| 231 | writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
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| 232 | udelay(100);
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| 233 | |
| 234 | * 4bit mode, 2 lines, 5x8 font, after this the number of lines
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| 235 | * and the font cannot be changed until the next initialization sequence
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| 236 |
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| 237 | charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES);
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| 238 | charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
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| 239 | charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT);
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| 240 | charlcd_4bit_command(lcd, HD_CLEAR);
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| 241 | charlcd_4bit_command(lcd, HD_HOME);
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| 242 |
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| 243 | charlcd_4bit_print(lcd, 0, "ARM Linux");
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| 244 | charlcd_4bit_print(lcd, 1, UTS_RELEASE);
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| 245 | }
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| 246 |
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| 247 | static void charlcd_init_work(struct work_struct *work)
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| 248 | {
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| 249 | struct charlcd *lcd =
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| 250 | container_of(work, struct charlcd, init_work.work);
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| 251 |
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| 252 | charlcd_4bit_init(lcd);
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| 253 | }
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| 254 |
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| 255 | static int __init charlcd_probe(struct platform_device *pdev)
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| 256 | {
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| 257 | struct device *dev = &pdev->dev;
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| 258 | int ret;
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| 259 | struct charlcd *lcd;
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| 260 |
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| 261 | lcd = devm_kzalloc(dev, sizeof(*lcd), GFP_KERNEL);
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| 262 | if (!lcd)
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| 263 | return -ENOMEM;
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| 264 |
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| 265 | lcd->dev = &pdev->dev;
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| 266 |
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| 267 | lcd->virtbase = devm_platform_ioremap_resource(pdev, 0);
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| 268 | if (IS_ERR(lcd->virtbase))
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| 269 | return PTR_ERR(lcd->virtbase);
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| 270 |
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| 271 | lcd->irq = platform_get_irq(pdev, 0);
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| 272 |
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| 273 | if (lcd->irq >= 0) {
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| 274 | ret = devm_request_irq(dev, lcd->irq, charlcd_interrupt, 0, DRIVERNAME, lcd);
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| 275 | if (ret)
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| 276 | return ret;
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| 277 | }
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| 278 |
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| 279 | platform_set_drvdata(pdev, lcd);
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| 280 |
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| 281 | |
| 282 | * Initialize the display in a delayed work, because
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| 283 | * it is VERY slow and would slow down the boot of the system.
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| 284 |
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| 285 | INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work);
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| 286 | schedule_delayed_work(&lcd->init_work, 0);
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| 287 |
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| 288 | return 0;
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| 289 | }
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| 290 |
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| 291 | static int charlcd_suspend(struct device *dev)
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| 292 | {
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| 293 | struct charlcd *lcd = dev_get_drvdata(dev);
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| 294 |
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| 295 |
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| 296 | charlcd_4bit_command(lcd, HD_DISPCTRL);
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| 297 | return 0;
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| 298 | }
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| 299 |
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| 300 | static int charlcd_resume(struct device *dev)
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| 301 | {
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| 302 | struct charlcd *lcd = dev_get_drvdata(dev);
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| 303 |
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| 304 |
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| 305 | charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
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| 306 | return 0;
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| 307 | }
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| 308 |
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| 309 | static const struct dev_pm_ops charlcd_pm_ops = {
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| 310 | .suspend = charlcd_suspend,
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| 311 | .resume = charlcd_resume,
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| 312 | };
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| 313 |
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| 314 | static const struct of_device_id charlcd_match[] = {
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| 315 | { .compatible = "arm,versatile-lcd", },
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| 316 | {}
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| 317 | };
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| 318 |
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| 319 | static struct platform_driver charlcd_driver = {
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| 320 | .driver = {
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| 321 | .name = DRIVERNAME,
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| 322 | .pm = &charlcd_pm_ops,
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| 323 | .suppress_bind_attrs = true,
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| 324 | .of_match_table = charlcd_match,
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| 325 | },
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| 326 | };
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| 327 | builtin_platform_driver_probe(charlcd_driver, charlcd_probe);
|