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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel & MS High Precision Event Timer Implementation.
4 *
5 * Copyright (C) 2003 Intel Corporation
6 * Venki Pallipadi
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <[email protected]>
9 */
10
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/miscdevice.h>
15#include <linux/major.h>
16#include <linux/ioport.h>
17#include <linux/fcntl.h>
18#include <linux/init.h>
19#include <linux/io-64-nonatomic-lo-hi.h>
20#include <linux/poll.h>
21#include <linux/mm.h>
22#include <linux/proc_fs.h>
23#include <linux/spinlock.h>
24#include <linux/sysctl.h>
25#include <linux/wait.h>
26#include <linux/sched/signal.h>
27#include <linux/bcd.h>
28#include <linux/seq_file.h>
29#include <linux/bitops.h>
30#include <linux/compat.h>
31#include <linux/clocksource.h>
32#include <linux/uaccess.h>
33#include <linux/slab.h>
34#include <linux/io.h>
35#include <linux/acpi.h>
36#include <linux/hpet.h>
37#include <linux/platform_device.h>
38#include <asm/current.h>
39#include <asm/irq.h>
40#include <asm/div64.h>
41
42/*
43 * The High Precision Event Timer driver.
44 * This driver is closely modelled after the rtc.c driver.
45 * See HPET spec revision 1.
46 */
47#define HPET_USER_FREQ (64)
48#define HPET_DRIFT (500)
49
50#define HPET_RANGE_SIZE 1024 /* from HPET spec */
51
52
53/* WARNING -- don't get confused. These macros are never used
54 * to write the (single) counter, and rarely to read it.
55 * They're badly named; to fix, someday.
56 */
57#if BITS_PER_LONG == 64
58#define write_counter(V, MC) writeq(V, MC)
59#define read_counter(MC) readq(MC)
60#else
61#define write_counter(V, MC) writel(V, MC)
62#define read_counter(MC) readl(MC)
63#endif
64
65static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
66static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
67
68/* A lock for concurrent access by app and isr hpet activity. */
69static DEFINE_SPINLOCK(hpet_lock);
70
71#define HPET_DEV_NAME (7)
72
73struct hpet_dev {
74 struct hpets *hd_hpets;
75 struct hpet __iomem *hd_hpet;
76 struct hpet_timer __iomem *hd_timer;
77 unsigned long hd_ireqfreq;
78 unsigned long hd_irqdata;
79 wait_queue_head_t hd_waitqueue;
80 struct fasync_struct *hd_async_queue;
81 unsigned int hd_flags;
82 unsigned int hd_irq;
83 unsigned int hd_hdwirq;
84 char hd_name[HPET_DEV_NAME];
85};
86
87struct hpets {
88 struct hpets *hp_next;
89 struct hpet __iomem *hp_hpet;
90 unsigned long hp_hpet_phys;
91 unsigned long long hp_tick_freq;
92 unsigned long hp_delta;
93 unsigned int hp_ntimer;
94 unsigned int hp_which;
95 struct hpet_dev hp_dev[] __counted_by(hp_ntimer);
96};
97
98static struct hpets *hpets;
99
100#define HPET_OPEN 0x0001
101#define HPET_IE 0x0002 /* interrupt enabled */
102#define HPET_PERIODIC 0x0004
103#define HPET_SHARED_IRQ 0x0008
104
105static irqreturn_t hpet_interrupt(int irq, void *data)
106{
107 struct hpet_dev *devp;
108 unsigned long isr;
109
110 devp = data;
111 isr = 1 << (devp - devp->hd_hpets->hp_dev);
112
113 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
114 !(isr & readl(&devp->hd_hpet->hpet_isr)))
115 return IRQ_NONE;
116
117 spin_lock(&hpet_lock);
118 devp->hd_irqdata++;
119
120 /*
121 * For non-periodic timers, increment the accumulator.
122 * This has the effect of treating non-periodic like periodic.
123 */
124 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
125 unsigned long t, mc, base, k;
126 struct hpet __iomem *hpet = devp->hd_hpet;
127 struct hpets *hpetp = devp->hd_hpets;
128
129 t = devp->hd_ireqfreq;
130 read_counter(&devp->hd_timer->hpet_compare);
131 mc = read_counter(&hpet->hpet_mc);
132 /* The time for the next interrupt would logically be t + m,
133 * however, if we are very unlucky and the interrupt is delayed
134 * for longer than t then we will completely miss the next
135 * interrupt if we set t + m and an application will hang.
136 * Therefore we need to make a more complex computation assuming
137 * that there exists a k for which the following is true:
138 * k * t + base < mc + delta
139 * (k + 1) * t + base > mc + delta
140 * where t is the interval in hpet ticks for the given freq,
141 * base is the theoretical start value 0 < base < t,
142 * mc is the main counter value at the time of the interrupt,
143 * delta is the time it takes to write the a value to the
144 * comparator.
145 * k may then be computed as (mc - base + delta) / t .
146 */
147 base = mc % t;
148 k = (mc - base + hpetp->hp_delta) / t;
149 write_counter(t * (k + 1) + base,
150 &devp->hd_timer->hpet_compare);
151 }
152
153 if (devp->hd_flags & HPET_SHARED_IRQ)
154 writel(isr, &devp->hd_hpet->hpet_isr);
155 spin_unlock(&hpet_lock);
156
157 wake_up_interruptible(&devp->hd_waitqueue);
158
159 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
160
161 return IRQ_HANDLED;
162}
163
164static void hpet_timer_set_irq(struct hpet_dev *devp)
165{
166 const unsigned int nr_irqs = irq_get_nr_irqs();
167 unsigned long v;
168 int irq, gsi;
169 struct hpet_timer __iomem *timer;
170
171 spin_lock_irq(&hpet_lock);
172 if (devp->hd_hdwirq) {
173 spin_unlock_irq(&hpet_lock);
174 return;
175 }
176
177 timer = devp->hd_timer;
178
179 /* we prefer level triggered mode */
180 v = readl(&timer->hpet_config);
181 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
182 v |= Tn_INT_TYPE_CNF_MASK;
183 writel(v, &timer->hpet_config);
184 }
185 spin_unlock_irq(&hpet_lock);
186
187 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
188 Tn_INT_ROUTE_CAP_SHIFT;
189
190 /*
191 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
192 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
193 */
194 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
195 v &= ~0xf3df;
196 else
197 v &= ~0xffff;
198
199 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
200 if (irq >= nr_irqs) {
201 irq = HPET_MAX_IRQ;
202 break;
203 }
204
205 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
206 ACPI_ACTIVE_LOW);
207 if (gsi > 0)
208 break;
209
210 /* FIXME: Setup interrupt source table */
211 }
212
213 if (irq < HPET_MAX_IRQ) {
214 spin_lock_irq(&hpet_lock);
215 v = readl(&timer->hpet_config);
216 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
217 writel(v, &timer->hpet_config);
218 devp->hd_hdwirq = gsi;
219 spin_unlock_irq(&hpet_lock);
220 }
221 return;
222}
223
224static int hpet_open(struct inode *inode, struct file *file)
225{
226 struct hpet_dev *devp;
227 struct hpets *hpetp;
228 int i;
229
230 if (file->f_mode & FMODE_WRITE)
231 return -EINVAL;
232
233 mutex_lock(&hpet_mutex);
234 spin_lock_irq(&hpet_lock);
235
236 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
237 for (i = 0; i < hpetp->hp_ntimer; i++)
238 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) {
239 continue;
240 } else {
241 devp = &hpetp->hp_dev[i];
242 break;
243 }
244
245 if (!devp) {
246 spin_unlock_irq(&hpet_lock);
247 mutex_unlock(&hpet_mutex);
248 return -EBUSY;
249 }
250
251 file->private_data = devp;
252 devp->hd_irqdata = 0;
253 devp->hd_flags |= HPET_OPEN;
254 spin_unlock_irq(&hpet_lock);
255 mutex_unlock(&hpet_mutex);
256
257 hpet_timer_set_irq(devp);
258
259 return 0;
260}
261
262static ssize_t
263hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
264{
265 DECLARE_WAITQUEUE(wait, current);
266 unsigned long data;
267 ssize_t retval;
268 struct hpet_dev *devp;
269
270 devp = file->private_data;
271 if (!devp->hd_ireqfreq)
272 return -EIO;
273
274 if (in_compat_syscall()) {
275 if (count < sizeof(compat_ulong_t))
276 return -EINVAL;
277 } else {
278 if (count < sizeof(unsigned long))
279 return -EINVAL;
280 }
281
282 add_wait_queue(&devp->hd_waitqueue, &wait);
283
284 for ( ; ; ) {
285 set_current_state(TASK_INTERRUPTIBLE);
286
287 spin_lock_irq(&hpet_lock);
288 data = devp->hd_irqdata;
289 devp->hd_irqdata = 0;
290 spin_unlock_irq(&hpet_lock);
291
292 if (data) {
293 break;
294 } else if (file->f_flags & O_NONBLOCK) {
295 retval = -EAGAIN;
296 goto out;
297 } else if (signal_pending(current)) {
298 retval = -ERESTARTSYS;
299 goto out;
300 }
301 schedule();
302 }
303
304 if (in_compat_syscall()) {
305 retval = put_user(data, (compat_ulong_t __user *)buf);
306 if (!retval)
307 retval = sizeof(compat_ulong_t);
308 } else {
309 retval = put_user(data, (unsigned long __user *)buf);
310 if (!retval)
311 retval = sizeof(unsigned long);
312 }
313
314out:
315 __set_current_state(TASK_RUNNING);
316 remove_wait_queue(&devp->hd_waitqueue, &wait);
317
318 return retval;
319}
320
321static __poll_t hpet_poll(struct file *file, poll_table * wait)
322{
323 unsigned long v;
324 struct hpet_dev *devp;
325
326 devp = file->private_data;
327
328 if (!devp->hd_ireqfreq)
329 return 0;
330
331 poll_wait(file, &devp->hd_waitqueue, wait);
332
333 spin_lock_irq(&hpet_lock);
334 v = devp->hd_irqdata;
335 spin_unlock_irq(&hpet_lock);
336
337 if (v != 0)
338 return EPOLLIN | EPOLLRDNORM;
339
340 return 0;
341}
342
343#ifdef CONFIG_HPET_MMAP
344#ifdef CONFIG_HPET_MMAP_DEFAULT
345static int hpet_mmap_enabled = 1;
346#else
347static int hpet_mmap_enabled = 0;
348#endif
349
350static __init int hpet_mmap_enable(char *str)
351{
352 get_option(&str, &hpet_mmap_enabled);
353 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
354 return 1;
355}
356__setup("hpet_mmap=", hpet_mmap_enable);
357
358static int hpet_mmap_prepare(struct vm_area_desc *desc)
359{
360 struct file *file = desc->file;
361 struct hpet_dev *devp;
362 unsigned long addr;
363
364 if (!hpet_mmap_enabled)
365 return -EACCES;
366
367 devp = file->private_data;
368 addr = devp->hd_hpets->hp_hpet_phys;
369
370 if (addr & (PAGE_SIZE - 1))
371 return -ENOSYS;
372
373 desc->page_prot = pgprot_noncached(desc->page_prot);
374 mmap_action_simple_ioremap(desc, addr, PAGE_SIZE);
375 return 0;
376}
377#else
378static int hpet_mmap_prepare(struct vm_area_desc *desc)
379{
380 return -ENOSYS;
381}
382#endif
383
384static int hpet_fasync(int fd, struct file *file, int on)
385{
386 struct hpet_dev *devp;
387
388 devp = file->private_data;
389
390 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
391 return 0;
392 else
393 return -EIO;
394}
395
396static int hpet_release(struct inode *inode, struct file *file)
397{
398 struct hpet_dev *devp;
399 struct hpet_timer __iomem *timer;
400 int irq = 0;
401
402 devp = file->private_data;
403 timer = devp->hd_timer;
404
405 spin_lock_irq(&hpet_lock);
406
407 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
408 &timer->hpet_config);
409
410 irq = devp->hd_irq;
411 devp->hd_irq = 0;
412
413 devp->hd_ireqfreq = 0;
414
415 if (devp->hd_flags & HPET_PERIODIC
416 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
417 unsigned long v;
418
419 v = readq(&timer->hpet_config);
420 v ^= Tn_TYPE_CNF_MASK;
421 writeq(v, &timer->hpet_config);
422 }
423
424 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
425 spin_unlock_irq(&hpet_lock);
426
427 if (irq)
428 free_irq(irq, devp);
429
430 file->private_data = NULL;
431 return 0;
432}
433
434static int hpet_ioctl_ieon(struct hpet_dev *devp)
435{
436 struct hpet_timer __iomem *timer;
437 struct hpet __iomem *hpet;
438 struct hpets *hpetp;
439 int irq;
440 unsigned long g, v, t, m;
441 unsigned long flags, isr;
442
443 timer = devp->hd_timer;
444 hpet = devp->hd_hpet;
445 hpetp = devp->hd_hpets;
446
447 if (!devp->hd_ireqfreq)
448 return -EIO;
449
450 spin_lock_irq(&hpet_lock);
451
452 if (devp->hd_flags & HPET_IE) {
453 spin_unlock_irq(&hpet_lock);
454 return -EBUSY;
455 }
456
457 devp->hd_flags |= HPET_IE;
458
459 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
460 devp->hd_flags |= HPET_SHARED_IRQ;
461 spin_unlock_irq(&hpet_lock);
462
463 irq = devp->hd_hdwirq;
464
465 if (irq) {
466 unsigned long irq_flags;
467
468 if (devp->hd_flags & HPET_SHARED_IRQ) {
469 /*
470 * To prevent the interrupt handler from seeing an
471 * unwanted interrupt status bit, program the timer
472 * so that it will not fire in the near future ...
473 */
474 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
475 &timer->hpet_config);
476 write_counter(read_counter(&hpet->hpet_mc),
477 &timer->hpet_compare);
478 /* ... and clear any left-over status. */
479 isr = 1 << (devp - devp->hd_hpets->hp_dev);
480 writel(isr, &hpet->hpet_isr);
481 }
482
483 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
484 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
485 if (request_irq(irq, hpet_interrupt, irq_flags,
486 devp->hd_name, (void *)devp)) {
487 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
488 irq = 0;
489 }
490 }
491
492 if (irq == 0) {
493 spin_lock_irq(&hpet_lock);
494 devp->hd_flags ^= HPET_IE;
495 spin_unlock_irq(&hpet_lock);
496 return -EIO;
497 }
498
499 devp->hd_irq = irq;
500 t = devp->hd_ireqfreq;
501 v = readq(&timer->hpet_config);
502
503 /* 64-bit comparators are not yet supported through the ioctls,
504 * so force this into 32-bit mode if it supports both modes
505 */
506 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
507
508 if (devp->hd_flags & HPET_PERIODIC) {
509 g |= Tn_TYPE_CNF_MASK;
510 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
511 writeq(v, &timer->hpet_config);
512 local_irq_save(flags);
513
514 /*
515 * NOTE: First we modify the hidden accumulator
516 * register supported by periodic-capable comparators.
517 * We never want to modify the (single) counter; that
518 * would affect all the comparators. The value written
519 * is the counter value when the first interrupt is due.
520 */
521 m = read_counter(&hpet->hpet_mc);
522 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
523 /*
524 * Then we modify the comparator, indicating the period
525 * for subsequent interrupt.
526 */
527 write_counter(t, &timer->hpet_compare);
528 } else {
529 local_irq_save(flags);
530 m = read_counter(&hpet->hpet_mc);
531 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
532 }
533
534 if (devp->hd_flags & HPET_SHARED_IRQ) {
535 isr = 1 << (devp - devp->hd_hpets->hp_dev);
536 writel(isr, &hpet->hpet_isr);
537 }
538 writeq(g, &timer->hpet_config);
539 local_irq_restore(flags);
540
541 return 0;
542}
543
544/* converts Hz to number of timer ticks */
545static inline unsigned long hpet_time_div(struct hpets *hpets,
546 unsigned long dis)
547{
548 unsigned long long m;
549
550 m = hpets->hp_tick_freq + (dis >> 1);
551 return div64_ul(m, dis);
552}
553
554static int
555hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
556 struct hpet_info *info)
557{
558 struct hpet_timer __iomem *timer;
559 struct hpets *hpetp;
560 int err;
561 unsigned long v;
562
563 switch (cmd) {
564 case HPET_IE_OFF:
565 case HPET_INFO:
566 case HPET_EPI:
567 case HPET_DPI:
568 case HPET_IRQFREQ:
569 timer = devp->hd_timer;
570 hpetp = devp->hd_hpets;
571 break;
572 case HPET_IE_ON:
573 return hpet_ioctl_ieon(devp);
574 default:
575 return -EINVAL;
576 }
577
578 err = 0;
579
580 switch (cmd) {
581 case HPET_IE_OFF:
582 if ((devp->hd_flags & HPET_IE) == 0)
583 break;
584 v = readq(&timer->hpet_config);
585 v &= ~Tn_INT_ENB_CNF_MASK;
586 writeq(v, &timer->hpet_config);
587 if (devp->hd_irq) {
588 free_irq(devp->hd_irq, devp);
589 devp->hd_irq = 0;
590 }
591 devp->hd_flags ^= HPET_IE;
592 break;
593 case HPET_INFO:
594 {
595 memset(info, 0, sizeof(*info));
596 if (devp->hd_ireqfreq)
597 info->hi_ireqfreq =
598 hpet_time_div(hpetp, devp->hd_ireqfreq);
599 info->hi_flags =
600 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
601 info->hi_hpet = hpetp->hp_which;
602 info->hi_timer = devp - hpetp->hp_dev;
603 break;
604 }
605 case HPET_EPI:
606 v = readq(&timer->hpet_config);
607 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
608 err = -ENXIO;
609 break;
610 }
611 devp->hd_flags |= HPET_PERIODIC;
612 break;
613 case HPET_DPI:
614 v = readq(&timer->hpet_config);
615 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
616 err = -ENXIO;
617 break;
618 }
619 if (devp->hd_flags & HPET_PERIODIC &&
620 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
621 v = readq(&timer->hpet_config);
622 v ^= Tn_TYPE_CNF_MASK;
623 writeq(v, &timer->hpet_config);
624 }
625 devp->hd_flags &= ~HPET_PERIODIC;
626 break;
627 case HPET_IRQFREQ:
628 if ((arg > hpet_max_freq) &&
629 !capable(CAP_SYS_RESOURCE)) {
630 err = -EACCES;
631 break;
632 }
633
634 if (!arg) {
635 err = -EINVAL;
636 break;
637 }
638
639 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
640 }
641
642 return err;
643}
644
645static long
646hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
647{
648 struct hpet_info info;
649 int err;
650
651 mutex_lock(&hpet_mutex);
652 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
653 mutex_unlock(&hpet_mutex);
654
655 if ((cmd == HPET_INFO) && !err &&
656 (copy_to_user((void __user *)arg, &info, sizeof(info))))
657 err = -EFAULT;
658
659 return err;
660}
661
662#ifdef CONFIG_COMPAT
663struct compat_hpet_info {
664 compat_ulong_t hi_ireqfreq; /* Hz */
665 compat_ulong_t hi_flags; /* information */
666 unsigned short hi_hpet;
667 unsigned short hi_timer;
668};
669
670/* 32-bit types would lead to different command codes which should be
671 * translated into 64-bit ones before passed to hpet_ioctl_common
672 */
673#define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info)
674#define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t)
675
676static long
677hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
678{
679 struct hpet_info info;
680 int err;
681
682 if (cmd == COMPAT_HPET_INFO)
683 cmd = HPET_INFO;
684
685 if (cmd == COMPAT_HPET_IRQFREQ)
686 cmd = HPET_IRQFREQ;
687
688 mutex_lock(&hpet_mutex);
689 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
690 mutex_unlock(&hpet_mutex);
691
692 if ((cmd == HPET_INFO) && !err) {
693 struct compat_hpet_info __user *u = compat_ptr(arg);
694 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
695 put_user(info.hi_flags, &u->hi_flags) ||
696 put_user(info.hi_hpet, &u->hi_hpet) ||
697 put_user(info.hi_timer, &u->hi_timer))
698 err = -EFAULT;
699 }
700
701 return err;
702}
703#endif
704
705static const struct file_operations hpet_fops = {
706 .owner = THIS_MODULE,
707 .read = hpet_read,
708 .poll = hpet_poll,
709 .unlocked_ioctl = hpet_ioctl,
710#ifdef CONFIG_COMPAT
711 .compat_ioctl = hpet_compat_ioctl,
712#endif
713 .open = hpet_open,
714 .release = hpet_release,
715 .fasync = hpet_fasync,
716 .mmap_prepare = hpet_mmap_prepare,
717};
718
719static int hpet_is_known(struct hpet_data *hdp)
720{
721 struct hpets *hpetp;
722
723 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
724 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
725 return 1;
726
727 return 0;
728}
729
730static const struct ctl_table hpet_table[] = {
731 {
732 .procname = "max-user-freq",
733 .data = &hpet_max_freq,
734 .maxlen = sizeof(int),
735 .mode = 0644,
736 .proc_handler = proc_dointvec,
737 },
738};
739
740static struct ctl_table_header *sysctl_header;
741
742/*
743 * Adjustment for when arming the timer with
744 * initial conditions. That is, main counter
745 * ticks expired before interrupts are enabled.
746 */
747#define TICK_CALIBRATE (1000UL)
748
749static unsigned long __hpet_calibrate(struct hpets *hpetp)
750{
751 struct hpet_timer __iomem *timer = NULL;
752 unsigned long t, m, count, i, flags, start;
753 struct hpet_dev *devp;
754 int j;
755 struct hpet __iomem *hpet;
756
757 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
758 if ((devp->hd_flags & HPET_OPEN) == 0) {
759 timer = devp->hd_timer;
760 break;
761 }
762
763 if (!timer)
764 return 0;
765
766 hpet = hpetp->hp_hpet;
767 t = read_counter(&timer->hpet_compare);
768
769 i = 0;
770 count = hpet_time_div(hpetp, TICK_CALIBRATE);
771
772 local_irq_save(flags);
773
774 start = read_counter(&hpet->hpet_mc);
775
776 do {
777 m = read_counter(&hpet->hpet_mc);
778 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
779 } while (i++, (m - start) < count);
780
781 local_irq_restore(flags);
782
783 return (m - start) / i;
784}
785
786static unsigned long hpet_calibrate(struct hpets *hpetp)
787{
788 unsigned long ret = ~0UL;
789 unsigned long tmp;
790
791 /*
792 * Try to calibrate until return value becomes stable small value.
793 * If SMI interruption occurs in calibration loop, the return value
794 * will be big. This avoids its impact.
795 */
796 for ( ; ; ) {
797 tmp = __hpet_calibrate(hpetp);
798 if (ret <= tmp)
799 break;
800 ret = tmp;
801 }
802
803 return ret;
804}
805
806int hpet_alloc(struct hpet_data *hdp)
807{
808 u64 cap, mcfg;
809 struct hpet_dev *devp;
810 u32 i, ntimer;
811 struct hpets *hpetp;
812 struct hpet __iomem *hpet;
813 static struct hpets *last;
814 u32 period;
815 unsigned long long temp;
816 u32 remainder;
817
818 /*
819 * hpet_alloc can be called by platform dependent code.
820 * If platform dependent code has allocated the hpet that
821 * ACPI has also reported, then we catch it here.
822 */
823 if (hpet_is_known(hdp)) {
824 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
825 __func__);
826 return 0;
827 }
828
829 hpetp = kzalloc_flex(*hpetp, hp_dev, hdp->hd_nirqs);
830
831 if (!hpetp)
832 return -ENOMEM;
833
834 hpetp->hp_which = hpet_nhpet++;
835 hpetp->hp_hpet = hdp->hd_address;
836 hpetp->hp_hpet_phys = hdp->hd_phys_address;
837
838 hpetp->hp_ntimer = hdp->hd_nirqs;
839
840 for (i = 0; i < hdp->hd_nirqs; i++)
841 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
842
843 hpet = hpetp->hp_hpet;
844
845 cap = readq(&hpet->hpet_cap);
846
847 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
848
849 if (hpetp->hp_ntimer != ntimer) {
850 printk(KERN_WARNING "hpet: number irqs doesn't agree"
851 " with number of timers\n");
852 kfree(hpetp);
853 return -ENODEV;
854 }
855
856 if (last)
857 last->hp_next = hpetp;
858 else
859 hpets = hpetp;
860
861 last = hpetp;
862
863 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
864 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
865 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
866 temp += period >> 1; /* round */
867 do_div(temp, period);
868 hpetp->hp_tick_freq = temp; /* ticks per second */
869
870 printk(KERN_INFO "hpet%u: at MMIO 0x%lx, IRQ%s",
871 hpetp->hp_which, hdp->hd_phys_address,
872 str_plural(hpetp->hp_ntimer));
873 for (i = 0; i < hpetp->hp_ntimer; i++)
874 printk(KERN_CONT "%s %u", i > 0 ? "," : "", hdp->hd_irq[i]);
875 printk(KERN_CONT "\n");
876
877 temp = hpetp->hp_tick_freq;
878 remainder = do_div(temp, 1000000);
879 printk(KERN_INFO
880 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
881 hpetp->hp_which, hpetp->hp_ntimer,
882 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
883 (unsigned) temp, remainder);
884
885 mcfg = readq(&hpet->hpet_config);
886 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
887 write_counter(0L, &hpet->hpet_mc);
888 mcfg |= HPET_ENABLE_CNF_MASK;
889 writeq(mcfg, &hpet->hpet_config);
890 }
891
892 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
893 struct hpet_timer __iomem *timer;
894
895 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
896
897 devp->hd_hpets = hpetp;
898 devp->hd_hpet = hpet;
899 devp->hd_timer = timer;
900
901 /*
902 * If the timer was reserved by platform code,
903 * then make timer unavailable for opens.
904 */
905 if (hdp->hd_state & (1 << i)) {
906 devp->hd_flags = HPET_OPEN;
907 continue;
908 }
909
910 init_waitqueue_head(&devp->hd_waitqueue);
911 }
912
913 hpetp->hp_delta = hpet_calibrate(hpetp);
914
915 return 0;
916}
917
918static acpi_status hpet_resources(struct acpi_resource *res, void *data)
919{
920 struct hpet_data *hdp;
921 acpi_status status;
922 struct acpi_resource_address64 addr;
923
924 hdp = data;
925
926 status = acpi_resource_to_address64(res, &addr);
927
928 if (ACPI_SUCCESS(status)) {
929 hdp->hd_phys_address = addr.address.minimum;
930 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
931 if (!hdp->hd_address)
932 return AE_ERROR;
933
934 if (hpet_is_known(hdp)) {
935 iounmap(hdp->hd_address);
936 return AE_ALREADY_EXISTS;
937 }
938 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
939 struct acpi_resource_fixed_memory32 *fixmem32;
940
941 fixmem32 = &res->data.fixed_memory32;
942
943 hdp->hd_phys_address = fixmem32->address;
944 hdp->hd_address = ioremap(fixmem32->address,
945 HPET_RANGE_SIZE);
946 if (!hdp->hd_address)
947 return AE_ERROR;
948
949 if (hpet_is_known(hdp)) {
950 iounmap(hdp->hd_address);
951 return AE_ALREADY_EXISTS;
952 }
953 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
954 struct acpi_resource_extended_irq *irqp;
955 int i, irq;
956
957 irqp = &res->data.extended_irq;
958
959 for (i = 0; i < irqp->interrupt_count; i++) {
960 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
961 break;
962
963 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
964 irqp->triggering,
965 irqp->polarity);
966 if (irq < 0)
967 return AE_ERROR;
968
969 hdp->hd_irq[hdp->hd_nirqs] = irq;
970 hdp->hd_nirqs++;
971 }
972 }
973
974 return AE_OK;
975}
976
977static int hpet_acpi_probe(struct platform_device *pdev)
978{
979 struct acpi_device *device;
980 acpi_status result;
981 struct hpet_data data;
982
983 device = ACPI_COMPANION(&pdev->dev);
984 if (!device)
985 return -ENODEV;
986
987 memset(&data, 0, sizeof(data));
988
989 result =
990 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
991 hpet_resources, &data);
992
993 if (ACPI_FAILURE(result))
994 return -ENODEV;
995
996 if (!data.hd_address || !data.hd_nirqs) {
997 if (data.hd_address)
998 iounmap(data.hd_address);
999 printk("%s: no address or irqs in _CRS\n", __func__);
1000 return -ENODEV;
1001 }
1002
1003 return hpet_alloc(&data);
1004}
1005
1006static const struct acpi_device_id hpet_device_ids[] = {
1007 {"PNP0103", 0},
1008 {"", 0},
1009};
1010
1011static struct platform_driver hpet_acpi_driver = {
1012 .probe = hpet_acpi_probe,
1013 .driver = {
1014 .name = "hpet_acpi",
1015 .acpi_match_table = hpet_device_ids,
1016 },
1017};
1018
1019static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1020
1021static int __init hpet_init(void)
1022{
1023 int result;
1024
1025 result = misc_register(&hpet_misc);
1026 if (result < 0)
1027 return -ENODEV;
1028
1029 sysctl_header = register_sysctl("dev/hpet", hpet_table);
1030
1031 result = platform_driver_register(&hpet_acpi_driver);
1032 if (result < 0) {
1033 unregister_sysctl_table(sysctl_header);
1034 misc_deregister(&hpet_misc);
1035 return result;
1036 }
1037
1038 return 0;
1039}
1040device_initcall(hpet_init);
1041
1042/*
1043MODULE_AUTHOR("Bob Picco <[email protected]>");
1044MODULE_LICENSE("GPL");
1045*/