| 1 |
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| 2 | |
| 3 | * Copyright (C) 2022 Advanced Micro Devices, Inc.
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| 4 | *
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| 5 | * Author: Meng Li <[email protected]>
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| 6 |
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| 7 |
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| 8 | #ifndef _LINUX_AMD_PSTATE_H
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| 9 | #define _LINUX_AMD_PSTATE_H
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| 10 |
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| 11 | #include <linux/pm_qos.h>
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| 12 | #include <linux/platform_profile.h>
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| 13 |
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| 14 | #if IS_MODULE(CONFIG_X86_AMD_PSTATE_UT)
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| 15 | #define EXPORT_SYMBOL_FOR_PSTATE_UT(symbol) \
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| 16 | EXPORT_SYMBOL_FOR_MODULES(symbol, "amd-pstate-ut")
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| 17 | #else
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| 18 | #define EXPORT_SYMBOL_FOR_PSTATE_UT(symbol)
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| 19 | #endif
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| 20 |
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| 21 | |
| 22 | * AMD P-state INTERFACE *
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| 23 | ********************************************************************
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| 24 |
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| 25 | |
| 26 | * union perf_cached - A union to cache performance-related data.
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| 27 | * @highest_perf: the maximum performance an individual processor may reach,
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| 28 | * assuming ideal conditions
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| 29 | * For platforms that support the preferred core feature, the highest_perf value maybe
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| 30 | * configured to any value in the range 166-255 by the firmware (because the preferred
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| 31 | * core ranking is encoded in the highest_perf value). To maintain consistency across
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| 32 | * all platforms, we split the highest_perf and preferred core ranking values into
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| 33 | * cpudata->perf.highest_perf and cpudata->prefcore_ranking.
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| 34 | * @nominal_perf: the maximum sustained performance level of the processor,
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| 35 | * assuming ideal operating conditions
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| 36 | * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power
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| 37 | * savings are achieved
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| 38 | * @lowest_perf: the absolute lowest performance level of the processor
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| 39 | * @min_limit_perf: Cached value of the performance corresponding to policy->min
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| 40 | * @max_limit_perf: Cached value of the performance corresponding to policy->max
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| 41 | * @bios_min_perf: Cached perf value corresponding to the "Requested CPU Min Frequency" BIOS option
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| 42 | * @val: Raw 64-bit value for atomic access via READ_ONCE()/WRITE_ONCE()
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| 43 |
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| 44 | union perf_cached {
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| 45 | struct {
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| 46 | u8 highest_perf;
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| 47 | u8 nominal_perf;
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| 48 | u8 lowest_nonlinear_perf;
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| 49 | u8 lowest_perf;
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| 50 | u8 min_limit_perf;
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| 51 | u8 max_limit_perf;
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| 52 | u8 bios_min_perf;
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| 53 | };
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| 54 | u64 val;
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| 55 | };
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| 56 |
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| 57 | |
| 58 | * struct amd_aperf_mperf
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| 59 | * @aperf: actual performance frequency clock count
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| 60 | * @mperf: maximum performance frequency clock count
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| 61 | * @tsc: time stamp counter
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| 62 |
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| 63 | struct amd_aperf_mperf {
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| 64 | u64 aperf;
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| 65 | u64 mperf;
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| 66 | u64 tsc;
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| 67 | };
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| 68 |
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| 69 | |
| 70 | * struct amd_cpudata - private CPU data for AMD P-State
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| 71 | * @cpu: CPU number
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| 72 | * @req: constraint request to apply
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| 73 | * @cppc_req_cached: cached performance request hints
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| 74 | * @cppc_req2_cached: cached value of MSR_AMD_CPPC_REQ2
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| 75 | * @perf: cached performance-related data
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| 76 | * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher
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| 77 | * priority.
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| 78 | * @floor_perf_cnt: Cached value of the number of distinct floor
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| 79 | * performance levels supported
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| 80 | * @bios_floor_perf: Cached value of the boot-time floor performance level from
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| 81 | * MSR_AMD_CPPC_REQ2
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| 82 | * @min_limit_freq: Cached value of policy->min (in khz)
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| 83 | * @max_limit_freq: Cached value of policy->max (in khz)
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| 84 | * @nominal_freq: the frequency (in khz) that mapped to nominal_perf
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| 85 | * @max_freq: in ideal conditions the maximum frequency (in khz) possible frequency
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| 86 | * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf
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| 87 | * @floor_freq: Cached value of the user requested floor_freq
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| 88 | * @cur: Difference of Aperf/Mperf/tsc count between last and current sample
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| 89 | * @prev: Last Aperf/Mperf/tsc count value read from register
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| 90 | * @freq: current cpu frequency value (in khz)
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| 91 | * @boost_supported: check whether the Processor or SBIOS supports boost mode
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| 92 | * @hw_prefcore: check whether HW supports preferred core featue.
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| 93 | * Only when hw_prefcore and early prefcore param are true,
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| 94 | * AMD P-State driver supports preferred core featue.
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| 95 | * @policy: Cpufreq policy value
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| 96 | * @suspended: If CPU core if offlined
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| 97 | * @epp_default_ac: Default EPP value for AC power source
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| 98 | * @epp_default_dc: Default EPP value for DC power source
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| 99 | * @dynamic_epp: Whether dynamic EPP is enabled
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| 100 | * @raw_epp: Whether the last EPP write was a raw numeric value rather than a
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| 101 | * named preference
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| 102 | * @power_nb: Notifier block for power events
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| 103 | * @current_profile: Currently selected platform profile option
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| 104 | * @ppdev: Device registered with the platform profile handler
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| 105 | * @profile_name: Name under which @ppdev is registered
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| 106 | *
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| 107 | * The amd_cpudata is key private data for each CPU thread in AMD P-State, and
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| 108 | * represents all the attributes and goals that AMD P-State requests at runtime.
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| 109 |
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| 110 | struct amd_cpudata {
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| 111 | int cpu;
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| 112 |
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| 113 | struct freq_qos_request req[2];
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| 114 | u64 cppc_req_cached;
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| 115 | u64 cppc_req2_cached;
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| 116 |
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| 117 | union perf_cached perf;
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| 118 |
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| 119 | u8 prefcore_ranking;
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| 120 | u8 floor_perf_cnt;
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| 121 | u8 bios_floor_perf;
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| 122 | u32 min_limit_freq;
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| 123 | u32 max_limit_freq;
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| 124 | u32 nominal_freq;
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| 125 | u32 max_freq;
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| 126 | u32 lowest_nonlinear_freq;
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| 127 | u32 floor_freq;
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| 128 |
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| 129 | struct amd_aperf_mperf cur;
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| 130 | struct amd_aperf_mperf prev;
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| 131 |
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| 132 | u64 freq;
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| 133 | bool boost_supported;
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| 134 | bool hw_prefcore;
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| 135 |
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| 136 |
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| 137 | u32 policy;
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| 138 | bool suspended;
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| 139 | u8 epp_default_ac;
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| 140 | u8 epp_default_dc;
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| 141 | bool dynamic_epp;
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| 142 | bool raw_epp;
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| 143 | struct notifier_block power_nb;
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| 144 |
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| 145 |
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| 146 | enum platform_profile_option current_profile;
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| 147 | struct device *ppdev;
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| 148 | char *profile_name;
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| 149 | };
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| 150 |
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| 151 | |
| 152 | * enum amd_pstate_mode - driver working mode of amd pstate
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| 153 |
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| 154 | enum amd_pstate_mode {
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| 155 | AMD_PSTATE_UNDEFINED = 0,
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| 156 | AMD_PSTATE_DISABLE,
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| 157 | AMD_PSTATE_PASSIVE,
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| 158 | AMD_PSTATE_ACTIVE,
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| 159 | AMD_PSTATE_GUIDED,
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| 160 | AMD_PSTATE_MAX,
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| 161 | };
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| 162 | const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode);
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| 163 | int amd_pstate_get_status(void);
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| 164 | int amd_pstate_update_status(const char *buf, size_t size);
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| 165 | ssize_t store_energy_performance_preference(struct cpufreq_policy *policy,
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| 166 | const char *buf, size_t count);
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| 167 | ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char *buf);
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| 168 | void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy);
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| 169 | ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, const char *buf, size_t count);
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| 170 | ssize_t show_amd_pstate_floor_freq(struct cpufreq_policy *policy, char *buf);
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| 171 |
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| 172 | struct freq_attr;
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| 173 |
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| 174 | struct freq_attr **amd_pstate_get_current_attrs(void);
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| 175 |
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| 176 | #endif
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