| 1 | |
| 2 | |
| 3 | * Based on documentation provided by Dave Jones. Thanks!
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| 4 | *
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| 5 | * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
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| 6 |
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| 7 |
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| 8 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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| 9 |
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| 10 | #include <linux/kernel.h>
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| 11 | #include <linux/module.h>
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| 12 | #include <linux/init.h>
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| 13 | #include <linux/cpufreq.h>
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| 14 | #include <linux/ioport.h>
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| 15 | #include <linux/slab.h>
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| 16 | #include <linux/timex.h>
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| 17 | #include <linux/io.h>
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| 18 | #include <linux/delay.h>
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| 19 |
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| 20 | #include <asm/cpu_device_id.h>
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| 21 | #include <asm/msr.h>
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| 22 | #include <asm/tsc.h>
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| 23 |
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| 24 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 25 | #include <linux/acpi.h>
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| 26 | #include <acpi/processor.h>
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| 27 | #endif
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| 28 |
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| 29 | #define EPS_BRAND_C7M 0
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| 30 | #define EPS_BRAND_C7 1
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| 31 | #define EPS_BRAND_EDEN 2
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| 32 | #define EPS_BRAND_C3 3
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| 33 | #define EPS_BRAND_C7D 4
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| 34 |
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| 35 | struct eps_cpu_data {
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| 36 | u32 fsb;
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| 37 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 38 | u32 bios_limit;
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| 39 | #endif
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| 40 | struct cpufreq_frequency_table freq_table[];
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| 41 | };
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| 42 |
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| 43 | static struct eps_cpu_data *eps_cpu[NR_CPUS];
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| 44 |
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| 45 |
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| 46 | static int freq_failsafe_off;
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| 47 | static int voltage_failsafe_off;
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| 48 | static int set_max_voltage;
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| 49 |
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| 50 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 51 | static int ignore_acpi_limit;
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| 52 |
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| 53 | static struct acpi_processor_performance *eps_acpi_cpu_perf;
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| 54 |
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| 55 |
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| 56 | static int eps_acpi_init(void)
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| 57 | {
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| 58 | eps_acpi_cpu_perf = kzalloc_obj(*eps_acpi_cpu_perf);
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| 59 | if (!eps_acpi_cpu_perf)
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| 60 | return -ENOMEM;
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| 61 |
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| 62 | if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map,
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| 63 | GFP_KERNEL)) {
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| 64 | kfree(eps_acpi_cpu_perf);
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| 65 | eps_acpi_cpu_perf = NULL;
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| 66 | return -ENOMEM;
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| 67 | }
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| 68 |
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| 69 | if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) {
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| 70 | free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
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| 71 | kfree(eps_acpi_cpu_perf);
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| 72 | eps_acpi_cpu_perf = NULL;
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| 73 | return -EIO;
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| 74 | }
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| 75 | return 0;
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| 76 | }
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| 77 |
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| 78 | static int eps_acpi_exit(struct cpufreq_policy *policy)
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| 79 | {
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| 80 | if (eps_acpi_cpu_perf) {
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| 81 | acpi_processor_unregister_performance(0);
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| 82 | free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
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| 83 | kfree(eps_acpi_cpu_perf);
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| 84 | eps_acpi_cpu_perf = NULL;
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| 85 | }
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| 86 | return 0;
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| 87 | }
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| 88 | #endif
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| 89 |
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| 90 | static unsigned int eps_get(unsigned int cpu)
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| 91 | {
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| 92 | struct eps_cpu_data *centaur;
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| 93 | u64 val;
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| 94 |
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| 95 | if (cpu)
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| 96 | return 0;
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| 97 | centaur = eps_cpu[cpu];
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| 98 | if (centaur == NULL)
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| 99 | return 0;
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| 100 |
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| 101 |
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| 102 | rdmsrq(MSR_IA32_PERF_STATUS, val);
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| 103 | return centaur->fsb * ((val >> 8) & 0xff);
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| 104 | }
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| 105 |
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| 106 | static int eps_set_state(struct eps_cpu_data *centaur,
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| 107 | struct cpufreq_policy *policy,
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| 108 | u32 dest_state)
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| 109 | {
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| 110 | u64 val;
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| 111 | int i;
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| 112 |
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| 113 |
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| 114 | rdmsrq(MSR_IA32_PERF_STATUS, val);
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| 115 | i = 0;
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| 116 | while (val & ((1 << 16) | (1 << 17))) {
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| 117 | udelay(16);
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| 118 | rdmsrq(MSR_IA32_PERF_STATUS, val);
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| 119 | i++;
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| 120 | if (unlikely(i > 64)) {
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| 121 | return -ENODEV;
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| 122 | }
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| 123 | }
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| 124 |
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| 125 | wrmsrq(MSR_IA32_PERF_CTL, dest_state & 0xffff);
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| 126 |
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| 127 | i = 0;
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| 128 | do {
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| 129 | udelay(16);
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| 130 | rdmsrq(MSR_IA32_PERF_STATUS, val);
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| 131 | i++;
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| 132 | if (unlikely(i > 64)) {
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| 133 | return -ENODEV;
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| 134 | }
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| 135 | } while (val & ((1 << 16) | (1 << 17)));
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| 136 |
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| 137 | #ifdef DEBUG
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| 138 | {
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| 139 | u8 current_multiplier, current_voltage;
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| 140 |
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| 141 |
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| 142 | rdmsrq(MSR_IA32_PERF_STATUS, val);
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| 143 | current_voltage = val & 0xff;
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| 144 | pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
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| 145 | current_multiplier = (val >> 8) & 0xff;
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| 146 | pr_info("Current multiplier = %d\n", current_multiplier);
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| 147 | }
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| 148 | #endif
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| 149 | return 0;
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| 150 | }
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| 151 |
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| 152 | static int eps_target(struct cpufreq_policy *policy, unsigned int index)
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| 153 | {
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| 154 | struct eps_cpu_data *centaur;
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| 155 | unsigned int cpu = policy->cpu;
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| 156 | unsigned int dest_state;
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| 157 | int ret;
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| 158 |
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| 159 | if (unlikely(eps_cpu[cpu] == NULL))
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| 160 | return -ENODEV;
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| 161 | centaur = eps_cpu[cpu];
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| 162 |
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| 163 |
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| 164 | dest_state = centaur->freq_table[index].driver_data & 0xffff;
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| 165 | ret = eps_set_state(centaur, policy, dest_state);
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| 166 | if (ret)
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| 167 | pr_err("Timeout!\n");
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| 168 | return ret;
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| 169 | }
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| 170 |
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| 171 | static int eps_cpu_init(struct cpufreq_policy *policy)
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| 172 | {
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| 173 | unsigned int i;
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| 174 | u64 val;
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| 175 | u8 current_multiplier, current_voltage;
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| 176 | u8 max_multiplier, max_voltage;
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| 177 | u8 min_multiplier, min_voltage;
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| 178 | u8 brand = 0;
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| 179 | u32 fsb;
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| 180 | struct eps_cpu_data *centaur;
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| 181 | struct cpuinfo_x86 *c = &cpu_data(0);
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| 182 | struct cpufreq_frequency_table *f_table;
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| 183 | int k, step, voltage;
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| 184 | int states;
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| 185 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 186 | unsigned int limit;
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| 187 | #endif
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| 188 |
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| 189 | if (policy->cpu != 0)
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| 190 | return -ENODEV;
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| 191 |
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| 192 |
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| 193 | pr_info("Detected VIA ");
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| 194 |
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| 195 | switch (c->x86_model) {
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| 196 | case 10:
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| 197 | rdmsrq(0x1153, val);
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| 198 | brand = (((val >> 2) ^ val) >> 18) & 3;
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| 199 | pr_cont("Model A ");
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| 200 | break;
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| 201 | case 13:
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| 202 | rdmsrq(0x1154, val);
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| 203 | brand = (((val >> 4) ^ (val >> 2))) & 0x000000ff;
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| 204 | pr_cont("Model D ");
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| 205 | break;
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| 206 | }
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| 207 |
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| 208 | switch (brand) {
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| 209 | case EPS_BRAND_C7M:
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| 210 | pr_cont("C7-M\n");
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| 211 | break;
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| 212 | case EPS_BRAND_C7:
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| 213 | pr_cont("C7\n");
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| 214 | break;
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| 215 | case EPS_BRAND_EDEN:
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| 216 | pr_cont("Eden\n");
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| 217 | break;
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| 218 | case EPS_BRAND_C7D:
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| 219 | pr_cont("C7-D\n");
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| 220 | break;
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| 221 | case EPS_BRAND_C3:
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| 222 | pr_cont("C3\n");
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| 223 | return -ENODEV;
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| 224 | }
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| 225 |
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| 226 | rdmsrq(MSR_IA32_MISC_ENABLE, val);
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| 227 | if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
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| 228 | val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
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| 229 | wrmsrq(MSR_IA32_MISC_ENABLE, val);
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| 230 |
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| 231 | rdmsrq(MSR_IA32_MISC_ENABLE, val);
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| 232 | if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
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| 233 | pr_info("Can't enable Enhanced PowerSaver\n");
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| 234 | return -ENODEV;
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| 235 | }
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| 236 | }
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| 237 |
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| 238 |
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| 239 | rdmsrq(MSR_IA32_PERF_STATUS, val);
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| 240 | current_voltage = val & 0xff;
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| 241 | pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
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| 242 | current_multiplier = (val >> 8) & 0xff;
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| 243 | pr_info("Current multiplier = %d\n", current_multiplier);
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| 244 |
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| 245 |
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| 246 | max_voltage = (val >> 32) & 0xff;
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| 247 | pr_info("Highest voltage = %dmV\n", max_voltage * 16 + 700);
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| 248 | max_multiplier = (val >> 40) & 0xff;
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| 249 | pr_info("Highest multiplier = %d\n", max_multiplier);
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| 250 | min_voltage = (val >> 48) & 0xff;
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| 251 | pr_info("Lowest voltage = %dmV\n", min_voltage * 16 + 700);
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| 252 | min_multiplier = (val >> 56) & 0xff;
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| 253 | pr_info("Lowest multiplier = %d\n", min_multiplier);
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| 254 |
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| 255 |
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| 256 | if (current_multiplier == 0 || max_multiplier == 0
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| 257 | || min_multiplier == 0)
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| 258 | return -EINVAL;
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| 259 | if (current_multiplier > max_multiplier
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| 260 | || max_multiplier <= min_multiplier)
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| 261 | return -EINVAL;
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| 262 | if (current_voltage > 0x1f || max_voltage > 0x1f)
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| 263 | return -EINVAL;
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| 264 | if (max_voltage < min_voltage
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| 265 | || current_voltage < min_voltage
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| 266 | || current_voltage > max_voltage)
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| 267 | return -EINVAL;
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| 268 |
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| 269 |
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| 270 | if (!freq_failsafe_off && max_multiplier != current_multiplier) {
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| 271 | pr_info("Your processor is running at different frequency then its maximum. Aborting.\n");
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| 272 | pr_info("You can use freq_failsafe_off option to disable this check.\n");
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| 273 | return -EINVAL;
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| 274 | }
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| 275 | if (!voltage_failsafe_off && max_voltage != current_voltage) {
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| 276 | pr_info("Your processor is running at different voltage then its maximum. Aborting.\n");
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| 277 | pr_info("You can use voltage_failsafe_off option to disable this check.\n");
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| 278 | return -EINVAL;
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| 279 | }
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| 280 |
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| 281 |
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| 282 | fsb = cpu_khz / current_multiplier;
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| 283 |
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| 284 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 285 |
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| 286 | if (!ignore_acpi_limit && !eps_acpi_init()) {
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| 287 | if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) {
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| 288 | pr_info("ACPI limit %u.%uGHz\n",
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| 289 | limit/1000000,
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| 290 | (limit%1000000)/10000);
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| 291 | eps_acpi_exit(policy);
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| 292 |
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| 293 | if (limit && max_multiplier * fsb > limit) {
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| 294 | pr_info("Aborting\n");
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| 295 | return -EINVAL;
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| 296 | }
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| 297 | }
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| 298 | }
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| 299 | #endif
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| 300 |
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| 301 | |
| 302 | * by processor
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| 303 | if (brand == EPS_BRAND_C7M && set_max_voltage) {
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| 304 | u32 v;
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| 305 |
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| 306 |
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| 307 | v = (set_max_voltage - 700) / 16;
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| 308 |
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| 309 | if (v >= min_voltage && v <= max_voltage) {
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| 310 | pr_info("Setting %dmV as maximum\n", v * 16 + 700);
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| 311 | max_voltage = v;
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| 312 | }
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| 313 | }
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| 314 |
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| 315 |
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| 316 | if (brand == EPS_BRAND_C7M)
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| 317 | states = max_multiplier - min_multiplier + 1;
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| 318 | else
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| 319 | states = 2;
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| 320 |
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| 321 |
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| 322 | centaur = kzalloc_flex(*centaur, freq_table, states + 1);
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| 323 | if (!centaur)
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| 324 | return -ENOMEM;
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| 325 | eps_cpu[0] = centaur;
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| 326 |
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| 327 |
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| 328 | centaur->fsb = fsb;
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| 329 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 330 | centaur->bios_limit = limit;
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| 331 | #endif
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| 332 |
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| 333 |
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| 334 | f_table = ¢aur->freq_table[0];
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| 335 | if (brand != EPS_BRAND_C7M) {
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| 336 | f_table[0].frequency = fsb * min_multiplier;
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| 337 | f_table[0].driver_data = (min_multiplier << 8) | min_voltage;
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| 338 | f_table[1].frequency = fsb * max_multiplier;
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| 339 | f_table[1].driver_data = (max_multiplier << 8) | max_voltage;
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| 340 | f_table[2].frequency = CPUFREQ_TABLE_END;
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| 341 | } else {
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| 342 | k = 0;
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| 343 | step = ((max_voltage - min_voltage) * 256)
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| 344 | / (max_multiplier - min_multiplier);
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| 345 | for (i = min_multiplier; i <= max_multiplier; i++) {
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| 346 | voltage = (k * step) / 256 + min_voltage;
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| 347 | f_table[k].frequency = fsb * i;
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| 348 | f_table[k].driver_data = (i << 8) | voltage;
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| 349 | k++;
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| 350 | }
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| 351 | f_table[k].frequency = CPUFREQ_TABLE_END;
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| 352 | }
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| 353 |
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| 354 | policy->cpuinfo.transition_latency = 140000;
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| 355 | policy->freq_table = ¢aur->freq_table[0];
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| 356 |
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| 357 | return 0;
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| 358 | }
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| 359 |
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| 360 | static void eps_cpu_exit(struct cpufreq_policy *policy)
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| 361 | {
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| 362 | unsigned int cpu = policy->cpu;
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| 363 |
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| 364 |
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| 365 | kfree(eps_cpu[cpu]);
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| 366 | eps_cpu[cpu] = NULL;
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| 367 | }
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| 368 |
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| 369 | static struct cpufreq_driver eps_driver = {
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| 370 | .verify = cpufreq_generic_frequency_table_verify,
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| 371 | .target_index = eps_target,
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| 372 | .init = eps_cpu_init,
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| 373 | .exit = eps_cpu_exit,
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| 374 | .get = eps_get,
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| 375 | .name = "e_powersaver",
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| 376 | };
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| 377 |
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| 378 |
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| 379 | |
| 380 | * Enhanced SpeedStep/PowerSaver registers
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| 381 | static const struct x86_cpu_id eps_cpu_id[] = {
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| 382 | X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_EST, NULL),
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| 383 | {}
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| 384 | };
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| 385 | MODULE_DEVICE_TABLE(x86cpu, eps_cpu_id);
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| 386 |
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| 387 | static int __init eps_init(void)
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| 388 | {
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| 389 | if (!x86_match_cpu(eps_cpu_id) || boot_cpu_data.x86_model < 10)
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| 390 | return -ENODEV;
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| 391 | if (cpufreq_register_driver(&eps_driver))
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| 392 | return -EINVAL;
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| 393 | return 0;
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| 394 | }
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| 395 |
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| 396 | static void __exit eps_exit(void)
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| 397 | {
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| 398 | cpufreq_unregister_driver(&eps_driver);
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| 399 | }
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| 400 |
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| 401 | |
| 402 | * unloading module
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| 403 | module_param(freq_failsafe_off, int, 0644);
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| 404 | MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
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| 405 | module_param(voltage_failsafe_off, int, 0644);
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| 406 | MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check");
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| 407 | #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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| 408 | module_param(ignore_acpi_limit, int, 0644);
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| 409 | MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit");
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| 410 | #endif
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| 411 | module_param(set_max_voltage, int, 0644);
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| 412 | MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only");
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| 413 |
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| 414 | MODULE_AUTHOR("Rafal Bilski <[email protected]>");
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| 415 | MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
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| 416 | MODULE_LICENSE("GPL");
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| 417 |
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| 418 | module_init(eps_init);
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| 419 | module_exit(eps_exit);
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