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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * K3 SA2UL crypto accelerator driver
4 *
5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com
6 *
7 * Authors: Keerthy
8 * Vitaly Andrianov
9 * Tero Kristo
10 */
11
12#ifndef _K3_SA2UL_
13#define _K3_SA2UL_
14
15#include <crypto/aes.h>
16#include <crypto/sha1.h>
17#include <crypto/sha2.h>
18
19#define SA_ENGINE_STATUS 0x0008
20#define SA_ENGINE_ENABLE_CONTROL 0x1000
21
22struct sa_tfm_ctx;
23/*
24 * SA_ENGINE_ENABLE_CONTROL register bits
25 */
26#define SA_EEC_ENCSS_EN 0x00000001
27#define SA_EEC_AUTHSS_EN 0x00000002
28#define SA_EEC_TRNG_EN 0x00000008
29#define SA_EEC_PKA_EN 0x00000010
30#define SA_EEC_CTXCACH_EN 0x00000080
31#define SA_EEC_CPPI_PORT_IN_EN 0x00000200
32#define SA_EEC_CPPI_PORT_OUT_EN 0x00000800
33
34/*
35 * Encoding used to identify the typo of crypto operation
36 * performed on the packet when the packet is returned
37 * by SA
38 */
39#define SA_REQ_SUBTYPE_ENC 0x0001
40#define SA_REQ_SUBTYPE_DEC 0x0002
41#define SA_REQ_SUBTYPE_SHIFT 16
42#define SA_REQ_SUBTYPE_MASK 0xffff
43
44/* Number of 32 bit words in EPIB */
45#define SA_DMA_NUM_EPIB_WORDS 4
46
47/* Number of 32 bit words in PS data */
48#define SA_DMA_NUM_PS_WORDS 16
49#define NKEY_SZ 3
50#define MCI_SZ 27
51
52/*
53 * Maximum number of simultaeneous security contexts
54 * supported by the driver
55 */
56#define SA_MAX_NUM_CTX 512
57
58/*
59 * Assumption: CTX size is multiple of 32
60 */
61#define SA_CTX_SIZE_TO_DMA_SIZE(ctx_sz) \
62 ((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0)
63
64#define SA_CTX_ENC_KEY_OFFSET 32
65#define SA_CTX_ENC_AUX1_OFFSET 64
66#define SA_CTX_ENC_AUX2_OFFSET 96
67#define SA_CTX_ENC_AUX3_OFFSET 112
68#define SA_CTX_ENC_AUX4_OFFSET 128
69
70/* Next Engine Select code in CP_ACE */
71#define SA_ENG_ID_EM1 2 /* Enc/Dec engine with AES/DEC core */
72#define SA_ENG_ID_EM2 3 /* Encryption/Decryption enginefor pass 2 */
73#define SA_ENG_ID_AM1 4 /* Auth. engine with SHA1/MD5/SHA2 core */
74#define SA_ENG_ID_AM2 5 /* Authentication engine for pass 2 */
75#define SA_ENG_ID_OUTPORT2 20 /* Egress module 2 */
76
77/*
78 * Command Label Definitions
79 */
80#define SA_CMDL_OFFSET_NESC 0 /* Next Engine Select Code */
81#define SA_CMDL_OFFSET_LABEL_LEN 1 /* Engine Command Label Length */
82/* 16-bit Length of Data to be processed */
83#define SA_CMDL_OFFSET_DATA_LEN 2
84#define SA_CMDL_OFFSET_DATA_OFFSET 4 /* Stat Data Offset */
85#define SA_CMDL_OFFSET_OPTION_CTRL1 5 /* Option Control Byte 1 */
86#define SA_CMDL_OFFSET_OPTION_CTRL2 6 /* Option Control Byte 2 */
87#define SA_CMDL_OFFSET_OPTION_CTRL3 7 /* Option Control Byte 3 */
88#define SA_CMDL_OFFSET_OPTION_BYTE 8
89
90#define SA_CMDL_HEADER_SIZE_BYTES 8
91
92#define SA_CMDL_OPTION_BYTES_MAX_SIZE 72
93#define SA_CMDL_MAX_SIZE_BYTES (SA_CMDL_HEADER_SIZE_BYTES + \
94 SA_CMDL_OPTION_BYTES_MAX_SIZE)
95
96/* SWINFO word-0 flags */
97#define SA_SW_INFO_FLAG_EVICT 0x0001
98#define SA_SW_INFO_FLAG_TEAR 0x0002
99#define SA_SW_INFO_FLAG_NOPD 0x0004
100
101/*
102 * This type represents the various packet types to be processed
103 * by the PHP engine in SA.
104 * It is used to identify the corresponding PHP processing function.
105 */
106#define SA_CTX_PE_PKT_TYPE_3GPP_AIR 0 /* 3GPP Air Cipher */
107#define SA_CTX_PE_PKT_TYPE_SRTP 1 /* SRTP */
108#define SA_CTX_PE_PKT_TYPE_IPSEC_AH 2 /* IPSec Authentication Header */
109/* IPSec Encapsulating Security Payload */
110#define SA_CTX_PE_PKT_TYPE_IPSEC_ESP 3
111/* Indicates that it is in data mode, It may not be used by PHP */
112#define SA_CTX_PE_PKT_TYPE_NONE 4
113#define SA_CTX_ENC_TYPE1_SZ 64 /* Encryption SC with Key only */
114#define SA_CTX_ENC_TYPE2_SZ 96 /* Encryption SC with Key and Aux1 */
115
116#define SA_CTX_AUTH_TYPE1_SZ 64 /* Auth SC with Key only */
117#define SA_CTX_AUTH_TYPE2_SZ 96 /* Auth SC with Key and Aux1 */
118/* Size of security context for PHP engine */
119#define SA_CTX_PHP_PE_CTX_SZ 64
120
121#define SA_CTX_MAX_SZ (64 + SA_CTX_ENC_TYPE2_SZ + SA_CTX_AUTH_TYPE2_SZ)
122
123/*
124 * Encoding of F/E control in SCCTL
125 * Bit 0-1: Fetch PHP Bytes
126 * Bit 2-3: Fetch Encryption/Air Ciphering Bytes
127 * Bit 4-5: Fetch Authentication Bytes or Encr pass 2
128 * Bit 6-7: Evict PHP Bytes
129 *
130 * where 00 = 0 bytes
131 * 01 = 64 bytes
132 * 10 = 96 bytes
133 * 11 = 128 bytes
134 */
135#define SA_CTX_DMA_SIZE_0 0
136#define SA_CTX_DMA_SIZE_64 1
137#define SA_CTX_DMA_SIZE_96 2
138#define SA_CTX_DMA_SIZE_128 3
139
140/*
141 * Byte offset of the owner word in SCCTL
142 * in the security context
143 */
144#define SA_CTX_SCCTL_OWNER_OFFSET 0
145
146#define SA_CTX_ENC_KEY_OFFSET 32
147#define SA_CTX_ENC_AUX1_OFFSET 64
148#define SA_CTX_ENC_AUX2_OFFSET 96
149#define SA_CTX_ENC_AUX3_OFFSET 112
150#define SA_CTX_ENC_AUX4_OFFSET 128
151
152#define SA_SCCTL_FE_AUTH_ENC 0x65
153#define SA_SCCTL_FE_ENC 0x8D
154
155#define SA_ALIGN_MASK (sizeof(u32) - 1)
156#define SA_ALIGNED __aligned(32)
157
158#define SA_AUTH_SW_CTRL_MD5 1
159#define SA_AUTH_SW_CTRL_SHA1 2
160#define SA_AUTH_SW_CTRL_SHA224 3
161#define SA_AUTH_SW_CTRL_SHA256 4
162#define SA_AUTH_SW_CTRL_SHA384 5
163#define SA_AUTH_SW_CTRL_SHA512 6
164
165/* SA2UL can only handle maximum data size of 64KB */
166#define SA_MAX_DATA_SZ U16_MAX
167
168/*
169 * SA2UL can provide unpredictable results with packet sizes that fall
170 * the following range, so avoid using it.
171 */
172#define SA_UNSAFE_DATA_SZ_MIN 240
173#define SA_UNSAFE_DATA_SZ_MAX 255
174
175struct sa_match_data;
176
177/**
178 * struct sa_crypto_data - Crypto driver instance data
179 * @base: Base address of the register space
180 * @soc_data: Pointer to SoC specific data
181 * @pdev: Platform device pointer
182 * @sc_pool: security context pool
183 * @dev: Device pointer
184 * @scid_lock: secure context ID lock
185 * @sc_id_start: starting index for SC ID
186 * @sc_id_end: Ending index for SC ID
187 * @sc_id: Security Context ID
188 * @ctx_bm: Bitmap to keep track of Security context ID's
189 * @ctx: SA tfm context pointer
190 * @dma_rx1: Pointer to DMA rx channel for sizes < 256 Bytes
191 * @dma_rx2: Pointer to DMA rx channel for sizes > 256 Bytes
192 * @dma_tx: Pointer to DMA TX channel
193 */
194struct sa_crypto_data {
195 void __iomem *base;
196 const struct sa_match_data *match_data;
197 struct platform_device *pdev;
198 struct dma_pool *sc_pool;
199 struct device *dev;
200 spinlock_t scid_lock; /* lock for SC-ID allocation */
201 /* Security context data */
202 u16 sc_id_start;
203 u16 sc_id_end;
204 u16 sc_id;
205 unsigned long ctx_bm[DIV_ROUND_UP(SA_MAX_NUM_CTX,
206 BITS_PER_LONG)];
207 struct sa_tfm_ctx *ctx;
208 struct dma_chan *dma_rx1;
209 struct dma_chan *dma_rx2;
210 struct dma_chan *dma_tx;
211};
212
213/**
214 * struct sa_cmdl_param_info: Command label parameters info
215 * @index: Index of the parameter in the command label format
216 * @offset: the offset of the parameter
217 * @size: Size of the parameter
218 */
219struct sa_cmdl_param_info {
220 u16 index;
221 u16 offset;
222 u16 size;
223};
224
225/* Maximum length of Auxiliary data in 32bit words */
226#define SA_MAX_AUX_DATA_WORDS 8
227
228/**
229 * struct sa_cmdl_upd_info: Command label updation info
230 * @flags: flags in command label
231 * @submode: Encryption submodes
232 * @enc_size: Size of first pass encryption size
233 * @enc_size2: Size of second pass encryption size
234 * @enc_offset: Encryption payload offset in the packet
235 * @enc_iv: Encryption initialization vector for pass2
236 * @enc_iv2: Encryption initialization vector for pass2
237 * @aad: Associated data
238 * @payload: Payload info
239 * @auth_size: Authentication size for pass 1
240 * @auth_size2: Authentication size for pass 2
241 * @auth_offset: Authentication payload offset
242 * @auth_iv: Authentication initialization vector
243 * @aux_key_info: Authentication aux key information
244 * @aux_key: Aux key for authentication
245 */
246struct sa_cmdl_upd_info {
247 u16 flags;
248 u16 submode;
249 struct sa_cmdl_param_info enc_size;
250 struct sa_cmdl_param_info enc_size2;
251 struct sa_cmdl_param_info enc_offset;
252 struct sa_cmdl_param_info enc_iv;
253 struct sa_cmdl_param_info enc_iv2;
254 struct sa_cmdl_param_info aad;
255 struct sa_cmdl_param_info payload;
256 struct sa_cmdl_param_info auth_size;
257 struct sa_cmdl_param_info auth_size2;
258 struct sa_cmdl_param_info auth_offset;
259 struct sa_cmdl_param_info auth_iv;
260 struct sa_cmdl_param_info aux_key_info;
261 u32 aux_key[SA_MAX_AUX_DATA_WORDS];
262};
263
264/*
265 * Number of 32bit words appended after the command label
266 * in PSDATA to identify the crypto request context.
267 * word-0: Request type
268 * word-1: pointer to request
269 */
270#define SA_PSDATA_CTX_WORDS 4
271
272/* Maximum size of Command label in 32 words */
273#define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS)
274
275/**
276 * struct sa_ctx_info: SA context information
277 * @sc: Pointer to security context
278 * @sc_phys: Security context physical address that is passed on to SA2UL
279 * @sc_id: Security context ID
280 * @cmdl_size: Command label size
281 * @cmdl: Command label for a particular iteration
282 * @cmdl_upd_info: structure holding command label updation info
283 * @epib: Extended protocol information block words
284 */
285struct sa_ctx_info {
286 u8 *sc;
287 dma_addr_t sc_phys;
288 u16 sc_id;
289 u16 cmdl_size;
290 u32 cmdl[SA_MAX_CMDL_WORDS];
291 struct sa_cmdl_upd_info cmdl_upd_info;
292 /* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */
293 u32 epib[SA_DMA_NUM_EPIB_WORDS];
294};
295
296/**
297 * struct sa_tfm_ctx: TFM context structure
298 * @dev_data: struct sa_crypto_data pointer
299 * @enc: struct sa_ctx_info for encryption
300 * @dec: struct sa_ctx_info for decryption
301 * @keylen: encrption/decryption keylength
302 * @iv_idx: Initialization vector index
303 * @key: encryption key
304 * @fallback: SW fallback algorithm
305 */
306struct sa_tfm_ctx {
307 struct sa_crypto_data *dev_data;
308 struct sa_ctx_info enc;
309 struct sa_ctx_info dec;
310 struct sa_ctx_info auth;
311 int keylen;
312 int iv_idx;
313 u32 key[AES_KEYSIZE_256 / sizeof(u32)];
314 u8 authkey[SHA512_BLOCK_SIZE];
315 struct crypto_shash *shash;
316 /* for fallback */
317 union {
318 struct crypto_skcipher *skcipher;
319 struct crypto_ahash *ahash;
320 struct crypto_aead *aead;
321 } fallback;
322};
323
324/**
325 * struct sa_sha_req_ctx: Structure used for sha request
326 * @dev_data: struct sa_crypto_data pointer
327 * @cmdl: Complete command label with psdata and epib included
328 * @fallback_req: SW fallback request container
329 */
330struct sa_sha_req_ctx {
331 struct sa_crypto_data *dev_data;
332 u32 cmdl[SA_MAX_CMDL_WORDS + SA_PSDATA_CTX_WORDS];
333 struct ahash_request fallback_req;
334};
335
336enum sa_submode {
337 SA_MODE_GEN = 0,
338 SA_MODE_CCM,
339 SA_MODE_GCM,
340 SA_MODE_GMAC
341};
342
343/* Encryption algorithms */
344enum sa_ealg_id {
345 SA_EALG_ID_NONE = 0, /* No encryption */
346 SA_EALG_ID_NULL, /* NULL encryption */
347 SA_EALG_ID_AES_CTR, /* AES Counter mode */
348 SA_EALG_ID_AES_F8, /* AES F8 mode */
349 SA_EALG_ID_AES_CBC, /* AES CBC mode */
350 SA_EALG_ID_DES_CBC, /* DES CBC mode */
351 SA_EALG_ID_3DES_CBC, /* 3DES CBC mode */
352 SA_EALG_ID_CCM, /* Counter with CBC-MAC mode */
353 SA_EALG_ID_GCM, /* Galois Counter mode */
354 SA_EALG_ID_AES_ECB,
355 SA_EALG_ID_LAST
356};
357
358/* Authentication algorithms */
359enum sa_aalg_id {
360 SA_AALG_ID_NONE = 0, /* No Authentication */
361 SA_AALG_ID_NULL = SA_EALG_ID_LAST, /* NULL Authentication */
362 SA_AALG_ID_MD5, /* MD5 mode */
363 SA_AALG_ID_SHA1, /* SHA1 mode */
364 SA_AALG_ID_SHA2_224, /* 224-bit SHA2 mode */
365 SA_AALG_ID_SHA2_256, /* 256-bit SHA2 mode */
366 SA_AALG_ID_SHA2_512, /* 512-bit SHA2 mode */
367 SA_AALG_ID_HMAC_MD5, /* HMAC with MD5 mode */
368 SA_AALG_ID_HMAC_SHA1, /* HMAC with SHA1 mode */
369 SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */
370 SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */
371 SA_AALG_ID_GMAC, /* Galois Message Auth. Code mode */
372 SA_AALG_ID_CMAC, /* Cipher-based Mes. Auth. Code mode */
373 SA_AALG_ID_CBC_MAC, /* Cipher Block Chaining */
374 SA_AALG_ID_AES_XCBC /* AES Extended Cipher Block Chaining */
375};
376
377/*
378 * Mode control engine algorithms used to index the
379 * mode control instruction tables
380 */
381enum sa_eng_algo_id {
382 SA_ENG_ALGO_ECB = 0,
383 SA_ENG_ALGO_CBC,
384 SA_ENG_ALGO_CFB,
385 SA_ENG_ALGO_OFB,
386 SA_ENG_ALGO_CTR,
387 SA_ENG_ALGO_F8,
388 SA_ENG_ALGO_F8F9,
389 SA_ENG_ALGO_GCM,
390 SA_ENG_ALGO_GMAC,
391 SA_ENG_ALGO_CCM,
392 SA_ENG_ALGO_CMAC,
393 SA_ENG_ALGO_CBCMAC,
394 SA_NUM_ENG_ALGOS
395};
396
397/**
398 * struct sa_eng_info: Security accelerator engine info
399 * @eng_id: Engine ID
400 * @sc_size: security context size
401 */
402struct sa_eng_info {
403 u8 eng_id;
404 u16 sc_size;
405};
406
407#endif /* _K3_SA2UL_ */