| 1 | |
| 2 | |
| 3 | * dma-fence-array: aggregate fences to be waited together
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| 4 | *
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| 5 | * Copyright (C) 2016 Collabora Ltd
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| 6 | * Copyright (C) 2016 Advanced Micro Devices, Inc.
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| 7 | * Authors:
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| 8 | * Gustavo Padovan <[email protected]>
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| 9 | * Christian König <[email protected]>
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| 10 |
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| 11 |
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| 12 | #include <linux/export.h>
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| 13 | #include <linux/slab.h>
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| 14 | #include <linux/dma-fence-array.h>
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| 15 |
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| 16 | #define PENDING_ERROR 1
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| 17 |
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| 18 | static const char *dma_fence_array_get_driver_name(struct dma_fence *fence)
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| 19 | {
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| 20 | return "dma_fence_array";
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| 21 | }
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| 22 |
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| 23 | static const char *dma_fence_array_get_timeline_name(struct dma_fence *fence)
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| 24 | {
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| 25 | return "unbound";
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| 26 | }
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| 27 |
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| 28 | static void dma_fence_array_set_pending_error(struct dma_fence_array *array,
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| 29 | int error)
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| 30 | {
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| 31 | |
| 32 | * Propagate the first error reported by any of our fences, but only
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| 33 | * before we ourselves are signaled.
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| 34 |
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| 35 | if (error)
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| 36 | cmpxchg(&array->base.error, PENDING_ERROR, error);
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| 37 | }
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| 38 |
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| 39 | static void dma_fence_array_clear_pending_error(struct dma_fence_array *array)
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| 40 | {
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| 41 |
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| 42 | cmpxchg(&array->base.error, PENDING_ERROR, 0);
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| 43 | }
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| 44 |
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| 45 | static void irq_dma_fence_array_work(struct irq_work *wrk)
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| 46 | {
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| 47 | struct dma_fence_array *array = container_of(wrk, typeof(*array), work);
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| 48 |
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| 49 | dma_fence_array_clear_pending_error(array);
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| 50 |
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| 51 | dma_fence_signal(&array->base);
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| 52 | dma_fence_put(&array->base);
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| 53 | }
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| 54 |
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| 55 | static void dma_fence_array_cb_func(struct dma_fence *f,
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| 56 | struct dma_fence_cb *cb)
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| 57 | {
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| 58 | struct dma_fence_array_cb *array_cb =
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| 59 | container_of(cb, struct dma_fence_array_cb, cb);
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| 60 | struct dma_fence_array *array = array_cb->array;
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| 61 |
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| 62 | dma_fence_array_set_pending_error(array, f->error);
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| 63 |
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| 64 | if (atomic_dec_and_test(&array->num_pending))
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| 65 | irq_work_queue(&array->work);
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| 66 | else
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| 67 | dma_fence_put(&array->base);
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| 68 | }
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| 69 |
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| 70 | static bool dma_fence_array_enable_signaling(struct dma_fence *fence)
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| 71 | {
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| 72 | struct dma_fence_array *array = to_dma_fence_array(fence);
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| 73 | struct dma_fence_array_cb *cb = array->callbacks;
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| 74 | unsigned i;
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| 75 |
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| 76 | for (i = 0; i < array->num_fences; ++i) {
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| 77 | cb[i].array = array;
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| 78 | |
| 79 | * As we may report that the fence is signaled before all
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| 80 | * callbacks are complete, we need to take an additional
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| 81 | * reference count on the array so that we do not free it too
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| 82 | * early. The core fence handling will only hold the reference
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| 83 | * until we signal the array as complete (but that is now
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| 84 | * insufficient).
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| 85 |
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| 86 | dma_fence_get(&array->base);
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| 87 | if (dma_fence_add_callback(array->fences[i], &cb[i].cb,
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| 88 | dma_fence_array_cb_func)) {
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| 89 | int error = array->fences[i]->error;
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| 90 |
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| 91 | dma_fence_array_set_pending_error(array, error);
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| 92 | dma_fence_put(&array->base);
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| 93 | if (atomic_dec_and_test(&array->num_pending)) {
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| 94 | dma_fence_array_clear_pending_error(array);
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| 95 | return false;
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| 96 | }
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| 97 | }
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| 98 | }
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| 99 |
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| 100 | return true;
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| 101 | }
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| 102 |
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| 103 | static bool dma_fence_array_signaled(struct dma_fence *fence)
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| 104 | {
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| 105 | struct dma_fence_array *array = to_dma_fence_array(fence);
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| 106 | int num_pending;
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| 107 | unsigned int i;
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| 108 |
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| 109 | |
| 110 | * We need to read num_pending before checking the enable_signal bit
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| 111 | * to avoid racing with the enable_signaling() implementation, which
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| 112 | * might decrement the counter, and cause a partial check.
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| 113 | * atomic_read_acquire() pairs with atomic_dec_and_test() in
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| 114 | * dma_fence_array_enable_signaling()
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| 115 | *
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| 116 | * The !--num_pending check is here to account for the any_signaled case
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| 117 | * if we race with enable_signaling(), that means the !num_pending check
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| 118 | * in the is_signalling_enabled branch might be outdated (num_pending
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| 119 | * might have been decremented), but that's fine. The user will get the
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| 120 | * right value when testing again later.
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| 121 |
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| 122 | num_pending = atomic_read_acquire(&array->num_pending);
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| 123 | if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &array->base.flags)) {
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| 124 | if (num_pending <= 0)
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| 125 | goto signal;
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| 126 | return false;
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| 127 | }
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| 128 |
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| 129 | for (i = 0; i < array->num_fences; ++i) {
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| 130 | if (dma_fence_is_signaled(array->fences[i]) && !--num_pending)
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| 131 | goto signal;
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| 132 | }
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| 133 | return false;
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| 134 |
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| 135 | signal:
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| 136 | dma_fence_array_clear_pending_error(array);
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| 137 | return true;
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| 138 | }
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| 139 |
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| 140 | static void dma_fence_array_release(struct dma_fence *fence)
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| 141 | {
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| 142 | struct dma_fence_array *array = to_dma_fence_array(fence);
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| 143 | unsigned i;
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| 144 |
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| 145 | for (i = 0; i < array->num_fences; ++i)
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| 146 | dma_fence_put(array->fences[i]);
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| 147 |
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| 148 | kfree(array->fences);
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| 149 | dma_fence_free(fence);
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| 150 | }
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| 151 |
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| 152 | static void dma_fence_array_set_deadline(struct dma_fence *fence,
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| 153 | ktime_t deadline)
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| 154 | {
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| 155 | struct dma_fence_array *array = to_dma_fence_array(fence);
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| 156 | unsigned i;
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| 157 |
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| 158 | for (i = 0; i < array->num_fences; ++i)
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| 159 | dma_fence_set_deadline(array->fences[i], deadline);
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| 160 | }
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| 161 |
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| 162 | const struct dma_fence_ops dma_fence_array_ops = {
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| 163 | .get_driver_name = dma_fence_array_get_driver_name,
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| 164 | .get_timeline_name = dma_fence_array_get_timeline_name,
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| 165 | .enable_signaling = dma_fence_array_enable_signaling,
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| 166 | .signaled = dma_fence_array_signaled,
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| 167 | .release = dma_fence_array_release,
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| 168 | .set_deadline = dma_fence_array_set_deadline,
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| 169 | };
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| 170 | EXPORT_SYMBOL(dma_fence_array_ops);
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| 171 |
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| 172 | |
| 173 | * dma_fence_array_alloc - Allocate a custom fence array
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| 174 | * @num_fences: [in] number of fences to add in the array
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| 175 | *
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| 176 | * Return dma fence array on success, NULL on failure
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| 177 |
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| 178 | struct dma_fence_array *dma_fence_array_alloc(int num_fences)
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| 179 | {
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| 180 | struct dma_fence_array *array;
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| 181 |
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| 182 | return kzalloc_flex(*array, callbacks, num_fences);
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| 183 | }
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| 184 | EXPORT_SYMBOL(dma_fence_array_alloc);
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| 185 |
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| 186 | |
| 187 | * dma_fence_array_init - Init a custom fence array
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| 188 | * @array: [in] dma fence array to arm
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| 189 | * @num_fences: [in] number of fences to add in the array
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| 190 | * @fences: [in] array containing the fences
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| 191 | * @context: [in] fence context to use
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| 192 | * @seqno: [in] sequence number to use
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| 193 | *
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| 194 | * Implementation of @dma_fence_array_create without allocation. Useful to init
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| 195 | * a preallocated dma fence array in the path of reclaim or dma fence signaling.
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| 196 |
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| 197 | void dma_fence_array_init(struct dma_fence_array *array,
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| 198 | int num_fences, struct dma_fence **fences,
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| 199 | u64 context, unsigned seqno)
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| 200 | {
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| 201 | static struct lock_class_key dma_fence_array_lock_key;
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| 202 |
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| 203 | WARN_ON(!num_fences || !fences);
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| 204 |
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| 205 | array->num_fences = num_fences;
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| 206 |
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| 207 | dma_fence_init(&array->base, &dma_fence_array_ops, NULL, context,
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| 208 | seqno);
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| 209 | init_irq_work(&array->work, irq_dma_fence_array_work);
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| 210 |
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| 211 | |
| 212 | * dma_fence_array_enable_signaling() is invoked while holding
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| 213 | * array->base.inline_lock and may call dma_fence_add_callback()
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| 214 | * on the underlying fences, which takes their inline_lock.
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| 215 | *
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| 216 | * Since both locks share the same lockdep class, this legitimate
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| 217 | * nesting confuses lockdep and triggers a recursive locking
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| 218 | * warning. Assign a separate lockdep class to the array lock
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| 219 | * to model this hierarchy correctly.
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| 220 |
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| 221 | lockdep_set_class(&array->base.inline_lock, &dma_fence_array_lock_key);
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| 222 |
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| 223 | atomic_set(&array->num_pending, num_fences);
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| 224 | array->fences = fences;
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| 225 |
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| 226 | array->base.error = PENDING_ERROR;
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| 227 |
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| 228 | |
| 229 | * dma_fence_array objects should never contain any other fence
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| 230 | * containers or otherwise we run into recursion and potential kernel
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| 231 | * stack overflow on operations on the dma_fence_array.
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| 232 | *
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| 233 | * The correct way of handling this is to flatten out the array by the
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| 234 | * caller instead.
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| 235 | *
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| 236 | * Enforce this here by checking that we don't create a dma_fence_array
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| 237 | * with any container inside.
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| 238 |
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| 239 | while (num_fences--)
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| 240 | WARN_ON(dma_fence_is_container(fences[num_fences]));
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| 241 | }
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| 242 | EXPORT_SYMBOL(dma_fence_array_init);
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| 243 |
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| 244 | |
| 245 | * dma_fence_array_create - Create a custom fence array
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| 246 | * @num_fences: [in] number of fences to add in the array
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| 247 | * @fences: [in] array containing the fences
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| 248 | * @context: [in] fence context to use
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| 249 | * @seqno: [in] sequence number to use
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| 250 | *
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| 251 | * Allocate a dma_fence_array object and initialize the base fence with
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| 252 | * dma_fence_init().
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| 253 | * In case of error it returns NULL.
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| 254 | *
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| 255 | * The caller should allocate the fences array with num_fences size
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| 256 | * and fill it with the fences it wants to add to the object. Ownership of this
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| 257 | * array is taken and dma_fence_put() is used on each fence on release.
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| 258 | *
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| 259 | * If @signal_on_any is true the fence array signals if any fence in the array
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| 260 | * signals, otherwise it signals when all fences in the array signal.
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| 261 |
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| 262 | struct dma_fence_array *dma_fence_array_create(int num_fences,
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| 263 | struct dma_fence **fences,
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| 264 | u64 context, unsigned seqno)
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| 265 | {
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| 266 | struct dma_fence_array *array;
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| 267 |
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| 268 | array = dma_fence_array_alloc(num_fences);
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| 269 | if (!array)
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| 270 | return NULL;
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| 271 |
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| 272 | dma_fence_array_init(array, num_fences, fences, context, seqno);
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| 273 |
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| 274 | return array;
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| 275 | }
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| 276 | EXPORT_SYMBOL(dma_fence_array_create);
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| 277 |
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| 278 | |
| 279 | * dma_fence_match_context - Check if all fences are from the given context
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| 280 | * @fence: [in] fence or fence array
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| 281 | * @context: [in] fence context to check all fences against
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| 282 | *
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| 283 | * Checks the provided fence or, for a fence array, all fences in the array
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| 284 | * against the given context. Returns false if any fence is from a different
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| 285 | * context.
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| 286 |
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| 287 | bool dma_fence_match_context(struct dma_fence *fence, u64 context)
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| 288 | {
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| 289 | struct dma_fence_array *array = to_dma_fence_array(fence);
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| 290 | unsigned i;
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| 291 |
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| 292 | if (!dma_fence_is_array(fence))
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| 293 | return fence->context == context;
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| 294 |
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| 295 | for (i = 0; i < array->num_fences; i++) {
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| 296 | if (array->fences[i]->context != context)
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| 297 | return false;
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| 298 | }
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| 299 |
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| 300 | return true;
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| 301 | }
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| 302 | EXPORT_SYMBOL(dma_fence_match_context);
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| 303 |
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| 304 | struct dma_fence *dma_fence_array_first(struct dma_fence *head)
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| 305 | {
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| 306 | struct dma_fence_array *array;
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| 307 |
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| 308 | if (!head)
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| 309 | return NULL;
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| 310 |
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| 311 | array = to_dma_fence_array(head);
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| 312 | if (!array)
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| 313 | return head;
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| 314 |
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| 315 | if (!array->num_fences)
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| 316 | return NULL;
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| 317 |
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| 318 | return array->fences[0];
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| 319 | }
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| 320 | EXPORT_SYMBOL(dma_fence_array_first);
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| 321 |
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| 322 | struct dma_fence *dma_fence_array_next(struct dma_fence *head,
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| 323 | unsigned int index)
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| 324 | {
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| 325 | struct dma_fence_array *array = to_dma_fence_array(head);
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| 326 |
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| 327 | if (!array || index >= array->num_fences)
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| 328 | return NULL;
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| 329 |
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| 330 | return array->fences[index];
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| 331 | }
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| 332 | EXPORT_SYMBOL(dma_fence_array_next);
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