| 1 |
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| 2 | #ifndef _EDAC_MCE_AMD_H
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| 3 | #define _EDAC_MCE_AMD_H
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| 4 |
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| 5 | #include <linux/notifier.h>
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| 6 |
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| 7 | #include <asm/mce.h>
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| 8 |
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| 9 | #define EC(x) ((x) & 0xffff)
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| 10 |
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| 11 | #define LOW_SYNDROME(x) (((x) >> 15) & 0xff)
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| 12 | #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff)
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| 13 |
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| 14 | #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010)
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| 15 | #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100)
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| 16 | #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800)
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| 17 | #define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400)
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| 18 |
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| 19 | #define TT(x) (((x) >> 2) & 0x3)
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| 20 | #define TT_MSG(x) tt_msgs[TT(x)]
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| 21 | #define II(x) (((x) >> 2) & 0x3)
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| 22 | #define II_MSG(x) ii_msgs[II(x)]
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| 23 | #define LL(x) ((x) & 0x3)
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| 24 | #define LL_MSG(x) ll_msgs[LL(x)]
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| 25 | #define TO(x) (((x) >> 8) & 0x1)
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| 26 | #define TO_MSG(x) to_msgs[TO(x)]
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| 27 | #define PP(x) (((x) >> 9) & 0x3)
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| 28 | #define PP_MSG(x) pp_msgs[PP(x)]
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| 29 | #define UU(x) (((x) >> 8) & 0x3)
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| 30 | #define UU_MSG(x) uu_msgs[UU(x)]
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| 31 |
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| 32 | #define R4(x) (((x) >> 4) & 0xf)
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| 33 | #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
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| 34 |
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| 35 | extern const char * const pp_msgs[];
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| 36 |
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| 37 | enum tt_ids {
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| 38 | TT_INSTR = 0,
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| 39 | TT_DATA,
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| 40 | TT_GEN,
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| 41 | TT_RESV,
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| 42 | };
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| 43 |
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| 44 | enum ll_ids {
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| 45 | LL_RESV = 0,
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| 46 | LL_L1,
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| 47 | LL_L2,
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| 48 | LL_LG,
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| 49 | };
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| 50 |
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| 51 | enum ii_ids {
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| 52 | II_MEM = 0,
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| 53 | II_RESV,
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| 54 | II_IO,
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| 55 | II_GEN,
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| 56 | };
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| 57 |
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| 58 | enum rrrr_ids {
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| 59 | R4_GEN = 0,
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| 60 | R4_RD,
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| 61 | R4_WR,
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| 62 | R4_DRD,
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| 63 | R4_DWR,
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| 64 | R4_IRD,
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| 65 | R4_PREF,
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| 66 | R4_EVICT,
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| 67 | R4_SNOOP,
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| 68 | };
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| 69 |
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| 70 | |
| 71 | * per-family decoder ops
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| 72 |
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| 73 | struct amd_decoder_ops {
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| 74 | bool (*mc0_mce)(u16, u8);
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| 75 | bool (*mc1_mce)(u16, u8);
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| 76 | bool (*mc2_mce)(u16, u8);
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| 77 | };
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| 78 |
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| 79 | void amd_register_ecc_decoder(void (*f)(int, struct mce *));
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| 80 | void amd_unregister_ecc_decoder(void (*f)(int, struct mce *));
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| 81 |
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| 82 | #endif
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