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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23/* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
24
25#ifndef AMDGPU_AMDKFD_H_INCLUDED
26#define AMDGPU_AMDKFD_H_INCLUDED
27
28#include <linux/list.h>
29#include <linux/types.h>
30#include <linux/mm.h>
31#include <linux/kthread.h>
32#include <linux/workqueue.h>
33#include <linux/mmu_notifier.h>
34#include <linux/memremap.h>
35#include <kgd_kfd_interface.h>
36#include <drm/drm_client.h>
37#include "amdgpu_sync.h"
38#include "amdgpu_vm.h"
39#include "amdgpu_xcp.h"
40#include "kfd_topology.h"
41#include "amdgpu_ptl.h"
42
43extern uint64_t amdgpu_amdkfd_total_mem_size;
44
45enum TLB_FLUSH_TYPE {
46 TLB_FLUSH_LEGACY = 0,
47 TLB_FLUSH_LIGHTWEIGHT,
48 TLB_FLUSH_HEAVYWEIGHT
49};
50
51struct amdgpu_device;
52struct kfd_process_device;
53struct amdgpu_reset_context;
54
55enum kfd_mem_attachment_type {
56 KFD_MEM_ATT_SHARED, /* Share kgd_mem->bo or another attachment's */
57 KFD_MEM_ATT_USERPTR, /* SG bo to DMA map pages from a userptr bo */
58 KFD_MEM_ATT_DMABUF, /* DMAbuf to DMA map TTM BOs */
59 KFD_MEM_ATT_SG /* Tag to DMA map SG BOs */
60};
61
62struct kfd_mem_attachment {
63 struct list_head list;
64 enum kfd_mem_attachment_type type;
65 bool is_mapped;
66 struct amdgpu_bo_va *bo_va;
67 struct amdgpu_device *adev;
68 uint64_t va;
69 uint64_t pte_flags;
70};
71
72struct kgd_mem {
73 struct mutex lock;
74 struct amdgpu_bo *bo;
75 struct dma_buf *dmabuf;
76 struct amdgpu_hmm_range *range;
77 struct list_head attachments;
78 /* protected by amdkfd_process_info.lock */
79 struct list_head validate_list;
80 uint32_t domain;
81 unsigned int mapped_to_gpu_memory;
82 uint64_t va;
83
84 uint32_t alloc_flags;
85
86 uint32_t invalid;
87 struct amdkfd_process_info *process_info;
88
89 struct amdgpu_sync sync;
90
91 uint32_t gem_handle;
92 bool aql_queue;
93 bool is_imported;
94};
95
96/* KFD Memory Eviction */
97struct amdgpu_amdkfd_fence {
98 struct dma_fence base;
99 struct mm_struct *mm;
100 spinlock_t lock;
101 char timeline_name[TASK_COMM_LEN];
102 uint16_t context_id;
103};
104
105struct amdgpu_kfd_dev {
106 struct kfd_dev *dev;
107 int64_t vram_used[MAX_XCP];
108 uint64_t vram_used_aligned[MAX_XCP];
109 bool init_complete;
110 struct work_struct reset_work;
111
112 /* Client for KFD BO GEM handle allocations */
113 struct drm_client_dev client;
114
115 /* HMM page migration MEMORY_DEVICE_PRIVATE mapping
116 * Must be last --ends in a flexible-array member.
117 */
118 struct dev_pagemap pgmap;
119};
120
121enum kgd_engine_type {
122 KGD_ENGINE_PFP = 1,
123 KGD_ENGINE_ME,
124 KGD_ENGINE_CE,
125 KGD_ENGINE_MEC1,
126 KGD_ENGINE_MEC2,
127 KGD_ENGINE_RLC,
128 KGD_ENGINE_SDMA1,
129 KGD_ENGINE_SDMA2,
130 KGD_ENGINE_MAX
131};
132
133
134struct amdkfd_process_info {
135 /* List head of all VMs that belong to a KFD process */
136 struct list_head vm_list_head;
137 /* List head for all KFD BOs that belong to a KFD process. */
138 struct list_head kfd_bo_list;
139 /* List of userptr BOs that are valid or invalid */
140 struct list_head userptr_valid_list;
141 struct list_head userptr_inval_list;
142 /* Lock to protect kfd_bo_list */
143 struct mutex lock;
144
145 /* Number of VMs */
146 unsigned int n_vms;
147 /* Eviction Fence */
148 struct amdgpu_amdkfd_fence *eviction_fence;
149
150 /* MMU-notifier related fields */
151 struct mutex notifier_lock;
152 uint32_t evicted_bos;
153 /* kfd context id */
154 u16 context_id;
155 struct delayed_work restore_userptr_work;
156 struct pid *pid;
157 bool block_mmu_notifications;
158};
159
160int amdgpu_amdkfd_init(void);
161void amdgpu_amdkfd_fini(void);
162void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev);
163
164void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc);
165int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc);
166void amdgpu_amdkfd_suspend_process(struct amdgpu_device *adev);
167int amdgpu_amdkfd_resume_process(struct amdgpu_device *adev);
168void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
169 const void *ih_ring_entry);
170void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
171void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
172void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);
173int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev);
174void amdgpu_amdkfd_unlock_kfd(struct amdgpu_device *adev);
175int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
176 enum kgd_engine_type engine,
177 uint32_t vmid, uint64_t gpu_addr,
178 uint32_t *ib_cmd, uint32_t ib_len);
179void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);
180bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);
181
182bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
183
184int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev,
185 struct amdgpu_reset_context *reset_context);
186
187int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
188
189void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
190
191int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
192 int queue_bit);
193
194struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
195 struct mm_struct *mm,
196 u16 context_id);
197
198int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev);
199#if defined(CONFIG_DEBUG_FS)
200int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
201#endif
202#if IS_ENABLED(CONFIG_HSA_AMD)
203bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
204struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
205void amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo *bo);
206int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
207 unsigned long cur_seq, struct kgd_mem *mem);
208int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
209 uint32_t domain,
210 struct dma_fence *fence);
211int amdgpu_amdkfd_set_sigbus_delay(struct task_struct *task, u32 ms);
212#else
213static inline
214bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
215{
216 return false;
217}
218
219static inline
220struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
221{
222 return NULL;
223}
224
225static inline
226void amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo *bo)
227{
228}
229
230static inline
231int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
232 unsigned long cur_seq, struct kgd_mem *mem)
233{
234 return 0;
235}
236static inline
237int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
238 uint32_t domain,
239 struct dma_fence *fence)
240{
241 return 0;
242}
243static inline
244int amdgpu_amdkfd_set_sigbus_delay(struct task_struct *task, u32 ms)
245{
246 return -EOPNOTSUPP;
247}
248#endif
249/* Shared API */
250int amdgpu_amdkfd_alloc_kernel_mem(struct amdgpu_device *adev, size_t size,
251 u32 domain, void **mem_obj, uint64_t *gpu_addr,
252 void **cpu_ptr, bool mqd_gfx9);
253void amdgpu_amdkfd_free_kernel_mem(struct amdgpu_device *adev, void **mem_obj);
254int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
255 void **mem_obj);
256void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);
257int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
258int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
259uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,
260 enum kgd_engine_type type);
261void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
262 struct kfd_local_mem_info *mem_info,
263 struct amdgpu_xcp *xcp);
264uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev);
265
266uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev);
267int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,
268 struct amdgpu_device **dmabuf_adev,
269 uint64_t *bo_size, void **metadata_buffer,
270 size_t buffer_size, uint32_t *metadata_size,
271 uint32_t *flags, int8_t *xcp_id);
272int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min);
273int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,
274 uint32_t *payload);
275int amdgpu_amdkfd_unmap_hiq(struct amdgpu_device *adev, u32 doorbell_off,
276 u32 inst);
277int amdgpu_amdkfd_start_sched(struct amdgpu_device *adev, uint32_t node_id);
278int amdgpu_amdkfd_stop_sched(struct amdgpu_device *adev, uint32_t node_id);
279int amdgpu_amdkfd_config_sq_perfmon(struct amdgpu_device *adev, uint32_t xcp_id,
280 bool core_override_enable, bool reg_override_enable, bool perfmon_override_enable);
281bool amdgpu_amdkfd_compute_active(struct amdgpu_device *adev, uint32_t node_id);
282int amdgpu_amdkfd_reset_mes_queue(struct amdgpu_device *adev,
283 uint32_t node_id,
284 int queue_type,
285 int pipe, int queue,
286 unsigned int db);
287
288/* Read user wptr from a specified user address space with page fault
289 * disabled. The memory must be pinned and mapped to the hardware when
290 * this is called in hqd_load functions, so it should never fault in
291 * the first place. This resolves a circular lock dependency involving
292 * four locks, including the DQM lock and mmap_lock.
293 */
294#define read_user_wptr(mmptr, wptr, dst) \
295 ({ \
296 bool valid = false; \
297 if ((mmptr) && (wptr)) { \
298 pagefault_disable(); \
299 if ((mmptr) == current->mm) { \
300 valid = !get_user((dst), (wptr)); \
301 } else if (current->flags & PF_KTHREAD) { \
302 kthread_use_mm(mmptr); \
303 valid = !get_user((dst), (wptr)); \
304 kthread_unuse_mm(mmptr); \
305 } \
306 pagefault_enable(); \
307 } \
308 valid; \
309 })
310
311/* GPUVM API */
312#define drm_priv_to_vm(drm_priv) \
313 (&((struct amdgpu_fpriv *) \
314 ((struct drm_file *)(drm_priv))->driver_priv)->vm)
315
316int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
317 struct amdgpu_vm *avm,
318 void **process_info,
319 struct dma_fence **ef);
320uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *drm_priv);
321size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev,
322 uint8_t xcp_id);
323int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
324 struct amdgpu_device *adev, uint64_t va, uint64_t size,
325 void *drm_priv, struct kgd_mem **mem,
326 uint64_t *offset, uint32_t flags, bool criu_resume);
327int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
328 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,
329 uint64_t *size);
330int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct amdgpu_device *adev,
331 struct kgd_mem *mem, void *drm_priv);
332int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
333 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
334int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
335int amdgpu_amdkfd_gpuvm_sync_memory(
336 struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
337int amdgpu_amdkfd_gpuvm_map_bo_to_kernel(struct kgd_mem *mem, void **kptr,
338 u64 *size, u32 domain);
339void amdgpu_amdkfd_gpuvm_unmap_bo_from_kernel(struct kgd_mem *mem);
340
341int amdgpu_amdkfd_map_gtt_bo_to_gart(struct amdgpu_bo *bo, struct amdgpu_bo **bo_gart);
342
343int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
344 struct dma_fence __rcu **ef);
345int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,
346 struct kfd_vm_fault_info *info);
347int amdgpu_amdkfd_gpuvm_import_dmabuf_fd(struct amdgpu_device *adev, int fd,
348 uint64_t va, void *drm_priv,
349 struct kgd_mem **mem, uint64_t *size,
350 uint64_t *mmap_offset);
351int amdgpu_amdkfd_gpuvm_export_dmabuf(struct kgd_mem *mem,
352 struct dma_buf **dmabuf);
353void amdgpu_amdkfd_debug_mem_fence(struct amdgpu_device *adev);
354int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,
355 struct tile_config *config);
356void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,
357 enum amdgpu_ras_block block, uint32_t reset);
358
359void amdgpu_amdkfd_ras_pasid_poison_consumption_handler(struct amdgpu_device *adev,
360 enum amdgpu_ras_block block, uint16_t pasid,
361 pasid_notify pasid_fn, void *data, uint32_t reset);
362
363bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);
364bool amdgpu_amdkfd_bo_mapped_to_dev(void *drm_priv, struct kgd_mem *mem);
365void amdgpu_amdkfd_block_mmu_notifications(void *p);
366int amdgpu_amdkfd_criu_resume(void *p);
367int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
368 uint64_t size, u32 alloc_flag, int8_t xcp_id);
369void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
370 uint64_t size, u32 alloc_flag, int8_t xcp_id);
371void amdgpu_amdkfd_clear_kfd_mapping(struct amdgpu_device *adev);
372
373u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device *adev, int xcp_id);
374
375#define KFD_XCP_MEM_ID(adev, xcp_id) \
376 ((adev)->xcp_mgr && (xcp_id) >= 0 ?\
377 (adev)->xcp_mgr->xcp[(xcp_id)].mem_id : -1)
378
379#define KFD_XCP_MEMORY_SIZE(adev, xcp_id) amdgpu_amdkfd_xcp_memory_size((adev), (xcp_id))
380
381
382#if IS_ENABLED(CONFIG_HSA_AMD)
383void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
384void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
385 struct amdgpu_vm *vm);
386
387/**
388 * @amdgpu_amdkfd_release_notify() - Notify KFD when GEM object is released
389 *
390 * Allows KFD to release its resources associated with the GEM object.
391 */
392void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo);
393void amdgpu_amdkfd_reserve_system_mem(uint64_t size);
394#else
395static inline
396void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
397{
398}
399
400static inline
401void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
402 struct amdgpu_vm *vm)
403{
404}
405
406static inline
407void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo)
408{
409}
410#endif
411
412#if IS_ENABLED(CONFIG_HSA_AMD_SVM)
413int kgd2kfd_init_zone_device(struct amdgpu_device *adev);
414#else
415static inline
416int kgd2kfd_init_zone_device(struct amdgpu_device *adev)
417{
418 return 0;
419}
420#endif
421
422/* KGD2KFD callbacks */
423int kgd2kfd_quiesce_mm(struct mm_struct *mm, uint32_t trigger);
424int kgd2kfd_resume_mm(struct mm_struct *mm);
425int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
426 u16 context_id, struct dma_fence *fence);
427#if IS_ENABLED(CONFIG_HSA_AMD)
428int kgd2kfd_init(void);
429void kgd2kfd_exit(void);
430struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf);
431bool kgd2kfd_device_init(struct kfd_dev *kfd,
432 const struct kgd2kfd_shared_resources *gpu_resources);
433void kgd2kfd_device_exit(struct kfd_dev *kfd);
434void kgd2kfd_suspend(struct kfd_dev *kfd, bool suspend_proc);
435int kgd2kfd_resume(struct kfd_dev *kfd, bool resume_proc);
436void kgd2kfd_suspend_process(struct kfd_dev *kfd);
437int kgd2kfd_resume_process(struct kfd_dev *kfd);
438int kgd2kfd_pre_reset(struct kfd_dev *kfd,
439 struct amdgpu_reset_context *reset_context);
440int kgd2kfd_post_reset(struct kfd_dev *kfd);
441void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
442void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
443void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask);
444int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd);
445void kgd2kfd_unlock_kfd(struct kfd_dev *kfd);
446int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id);
447int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd);
448int amdgpu_amdkfd_start_sched_all(struct amdgpu_device *adev);
449int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id);
450int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd);
451int amdgpu_amdkfd_stop_sched_all(struct amdgpu_device *adev);
452bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id);
453bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
454 bool retry_fault);
455void kgd2kfd_lock_kfd(void);
456void kgd2kfd_teardown_processes(struct amdgpu_device *adev);
457int kgd2kfd_reset_mes_queue(struct kfd_dev *kfd, uint32_t node_id,
458 int queue_type, int pipe, int queue,
459 unsigned int db);
460
461#else
462static inline int kgd2kfd_init(void)
463{
464 return -ENOENT;
465}
466
467static inline void kgd2kfd_exit(void)
468{
469}
470
471static inline
472struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
473{
474 return NULL;
475}
476
477static inline
478bool kgd2kfd_device_init(struct kfd_dev *kfd,
479 const struct kgd2kfd_shared_resources *gpu_resources)
480{
481 return false;
482}
483
484static inline void kgd2kfd_device_exit(struct kfd_dev *kfd)
485{
486}
487
488static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool suspend_proc)
489{
490}
491
492static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool resume_proc)
493{
494 return 0;
495}
496
497static inline void kgd2kfd_suspend_process(struct kfd_dev *kfd)
498{
499}
500
501static inline int kgd2kfd_resume_process(struct kfd_dev *kfd)
502{
503 return 0;
504}
505
506static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd,
507 struct amdgpu_reset_context *reset_context)
508{
509 return 0;
510}
511
512static inline int kgd2kfd_post_reset(struct kfd_dev *kfd)
513{
514 return 0;
515}
516
517static inline
518void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
519{
520}
521
522static inline
523void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
524{
525}
526
527static inline
528void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask)
529{
530}
531
532static inline int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd)
533{
534 return 0;
535}
536
537static inline void kgd2kfd_unlock_kfd(struct kfd_dev *kfd)
538{
539}
540
541static inline int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id)
542{
543 return 0;
544}
545
546static inline int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd)
547{
548 return 0;
549}
550
551static inline int amdgpu_amdkfd_start_sched_all(struct amdgpu_device *adev)
552{
553 return 0;
554}
555
556static inline int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id)
557{
558 return 0;
559}
560
561static inline int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd)
562{
563 return 0;
564}
565
566static inline int amdgpu_amdkfd_stop_sched_all(struct amdgpu_device *adev)
567{
568 return 0;
569}
570
571static inline bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id)
572{
573 return false;
574}
575
576static inline bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
577 bool retry_fault)
578{
579 return false;
580}
581
582static inline void kgd2kfd_lock_kfd(void)
583{
584}
585
586static inline void kgd2kfd_teardown_processes(struct amdgpu_device *adev)
587{
588}
589
590static inline int kgd2kfd_reset_mes_queue(struct kfd_dev *kfd, uint32_t node_id,
591 int queue_type, int pipe, int queue,
592 unsigned int db)
593{
594 return 0;
595}
596
597#endif
598#endif /* AMDGPU_AMDKFD_H_INCLUDED */