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| 2 | * Copyright 2018 Advanced Micro Devices, Inc.
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| 3 | *
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 5 | * copy of this software and associated documentation files (the "Software"),
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| 6 | * to deal in the Software without restriction, including without limitation
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the
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| 9 | * Software is furnished to do so, subject to the following conditions:
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| 10 | *
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| 11 | * The above copyright notice and this permission notice shall be included in
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| 12 | * all copies or substantial portions of the Software.
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| 13 | *
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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| 20 | * OTHER DEALINGS IN THE SOFTWARE.
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| 21 | *
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| 22 |
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| 23 | #ifndef __AMDGPU_BO_LIST_H__
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| 24 | #define __AMDGPU_BO_LIST_H__
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| 25 |
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| 26 | #include <drm/amdgpu_drm.h>
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| 27 |
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| 28 | struct hmm_range;
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| 29 |
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| 30 | struct drm_file;
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| 31 |
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| 32 | struct amdgpu_device;
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| 33 | struct amdgpu_bo;
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| 34 | struct amdgpu_bo_va;
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| 35 | struct amdgpu_fpriv;
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| 36 |
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| 37 | struct amdgpu_bo_list_entry {
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| 38 | struct amdgpu_bo *bo;
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| 39 | struct amdgpu_bo_va *bo_va;
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| 40 | uint32_t priority;
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| 41 | struct amdgpu_hmm_range *range;
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| 42 | bool user_invalidated;
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| 43 | };
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| 44 |
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| 45 | struct amdgpu_bo_list {
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| 46 | struct kref refcount;
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| 47 | struct amdgpu_bo *gds_obj;
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| 48 | struct amdgpu_bo *gws_obj;
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| 49 | struct amdgpu_bo *oa_obj;
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| 50 | unsigned first_userptr;
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| 51 | unsigned num_entries;
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| 52 |
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| 53 | struct amdgpu_bo_list_entry entries[] __counted_by(num_entries);
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| 54 | };
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| 55 |
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| 56 | struct amdgpu_bo_list *amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, u32 id);
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| 57 | void amdgpu_bo_list_put(struct amdgpu_bo_list *list);
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| 58 | struct drm_amdgpu_bo_list_entry *
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| 59 | amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in);
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| 60 |
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| 61 | struct amdgpu_bo_list *
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| 62 | amdgpu_bo_list_create(struct amdgpu_device *adev,
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| 63 | struct drm_file *filp,
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| 64 | struct drm_amdgpu_bo_list_entry *info,
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| 65 | size_t num_entries);
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| 66 |
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| 67 | #define amdgpu_bo_list_for_each_entry(e, list) \
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| 68 | for (e = list->entries; \
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| 69 | e != &list->entries[list->num_entries]; \
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| 70 | ++e)
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| 71 |
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| 72 | #define amdgpu_bo_list_for_each_userptr_entry(e, list) \
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| 73 | for (e = &list->entries[list->first_userptr]; \
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| 74 | e != &list->entries[list->num_entries]; \
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| 75 | ++e)
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| 76 |
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| 77 | #endif
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