| 1 | |
| 2 | * Copyright (C) 2019 Advanced Micro Devices, Inc.
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| 3 | *
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 5 | * copy of this software and associated documentation files (the "Software"),
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| 6 | * to deal in the Software without restriction, including without limitation
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the
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| 9 | * Software is furnished to do so, subject to the following conditions:
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| 10 | *
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| 11 | * The above copyright notice and this permission notice shall be included
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| 12 | * in all copies or substantial portions of the Software.
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| 13 | *
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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| 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 17 | * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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| 18 | * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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| 19 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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| 20 |
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| 21 | #ifndef __AMDGPU_MMHUB_H__
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| 22 | #define __AMDGPU_MMHUB_H__
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| 23 |
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| 24 | struct amdgpu_mmhub_ras {
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| 25 | struct amdgpu_ras_block_object ras_block;
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| 26 | };
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| 27 |
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| 28 | struct amdgpu_mmhub_funcs {
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| 29 | u64 (*get_fb_location)(struct amdgpu_device *adev);
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| 30 | u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
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| 31 | void (*init)(struct amdgpu_device *adev);
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| 32 | int (*gart_enable)(struct amdgpu_device *adev);
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| 33 | void (*set_fault_enable_default)(struct amdgpu_device *adev,
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| 34 | bool value);
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| 35 | void (*gart_disable)(struct amdgpu_device *adev);
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| 36 | int (*set_clockgating)(struct amdgpu_device *adev,
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| 37 | enum amd_clockgating_state state);
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| 38 | void (*get_clockgating)(struct amdgpu_device *adev, u64 *flags);
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| 39 | void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
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| 40 | uint64_t page_table_base);
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| 41 | void (*update_power_gating)(struct amdgpu_device *adev,
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| 42 | bool enable);
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| 43 | int (*get_xgmi_info)(struct amdgpu_device *adev);
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| 44 | };
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| 45 |
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| 46 | struct amdgpu_mmhub_client_ids {
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| 47 | const char * const (*names)[2];
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| 48 | unsigned int size;
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| 49 | };
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| 50 |
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| 51 | struct amdgpu_mmhub {
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| 52 | struct ras_common_if *ras_if;
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| 53 | const struct amdgpu_mmhub_funcs *funcs;
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| 54 | struct amdgpu_mmhub_ras *ras;
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| 55 | struct amdgpu_mmhub_client_ids client_ids;
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| 56 | };
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| 57 |
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| 58 | static inline void
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| 59 | amdgpu_mmhub_init_client_info(struct amdgpu_mmhub *mmhub,
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| 60 | const char * const (*names)[2],
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| 61 | unsigned int size)
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| 62 | {
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| 63 | mmhub->client_ids.names = names;
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| 64 | mmhub->client_ids.size = size;
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| 65 | }
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| 66 |
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| 67 | static inline const char *
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| 68 | amdgpu_mmhub_client_name(struct amdgpu_mmhub *mmhub,
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| 69 | u32 cid, bool is_write)
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| 70 | {
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| 71 | if (cid < mmhub->client_ids.size)
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| 72 | return mmhub->client_ids.names[cid][is_write];
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| 73 |
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| 74 | return NULL;
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| 75 | }
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| 76 |
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| 77 | int amdgpu_mmhub_ras_sw_init(struct amdgpu_device *adev);
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| 78 |
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| 79 | #endif
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| 80 |
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