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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright 2022 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26
27#ifndef __AMDGPU_DM_CRTC_H__
28#define __AMDGPU_DM_CRTC_H__
29
30void amdgpu_dm_crtc_set_static_screen_optimze(
31 struct amdgpu_display_manager *dm,
32 struct dc_stream_state *stream,
33 bool sso_enable, bool allow_sr_entry);
34
35void amdgpu_dm_crtc_handle_vblank(struct amdgpu_crtc *acrtc);
36
37bool amdgpu_dm_crtc_modeset_required(struct drm_crtc_state *crtc_state,
38 struct dc_stream_state *new_stream,
39 struct dc_stream_state *old_stream);
40
41int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable);
42
43bool amdgpu_dm_crtc_vrr_active_irq(struct amdgpu_crtc *acrtc);
44
45#if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST)
46bool amdgpu_dm_crtc_helper_mode_fixup(struct drm_crtc *crtc,
47 const struct drm_display_mode *mode,
48 struct drm_display_mode *adjusted_mode);
49void amdgpu_dm_crtc_destroy_state(struct drm_crtc *crtc,
50 struct drm_crtc_state *state);
51struct drm_crtc_state *amdgpu_dm_crtc_duplicate_state(struct drm_crtc *crtc);
52void amdgpu_dm_crtc_reset_state(struct drm_crtc *crtc);
53int amdgpu_dm_crtc_count_crtc_active_planes(struct drm_crtc_state *new_crtc_state);
54void amdgpu_dm_crtc_update_crtc_active_planes(struct drm_crtc *crtc,
55 struct drm_crtc_state *new_crtc_state);
56void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work);
57void amdgpu_dm_idle_worker(struct work_struct *work);
58#endif
59
60bool amdgpu_dm_crtc_vrr_active(const struct dm_crtc_state *dm_state);
61
62int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crtc);
63
64void amdgpu_dm_crtc_disable_vblank(struct drm_crtc *crtc);
65
66int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
67 struct drm_plane *plane,
68 uint32_t link_index);
69
70#endif
71