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| 2 | |
| 3 | * Copyright 2026 Advanced Micro Devices, Inc.
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| 4 | *
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| 5 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 6 | * copy of this software and associated documentation files (the "Software"),
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| 7 | * to deal in the Software without restriction, including without limitation
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| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 9 | * and/or sell copies of the Software, and to permit persons to whom the
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| 10 | * Software is furnished to do so, subject to the following conditions:
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| 11 | *
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| 12 | * The above copyright notice and this permission notice shall be included in
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| 13 | * all copies or substantial portions of the Software.
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| 14 | *
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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| 21 | * OTHER DEALINGS IN THE SOFTWARE.
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| 22 | *
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| 23 | * Authors: AMD
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| 24 | *
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| 25 |
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| 26 |
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| 27 | #ifndef AMDGPU_DM_AMDGPU_DM_DMUB_H_
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| 28 | #define AMDGPU_DM_AMDGPU_DM_DMUB_H_
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| 29 |
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| 30 | #include "amdgpu.h"
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| 31 |
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| 32 | void dm_dmub_aux_setconfig_callback(struct amdgpu_device *adev,
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| 33 | struct dmub_notification *notify);
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| 34 | void dm_dmub_aux_fused_io_callback(struct amdgpu_device *adev,
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| 35 | struct dmub_notification *notify);
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| 36 | bool dm_register_dmub_notify_callback(struct amdgpu_device *adev,
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| 37 | enum dmub_notification_type type,
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| 38 | dmub_notify_interrupt_callback_t callback,
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| 39 | bool dmub_int_thread_offload);
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| 40 | int dm_dmub_hw_init(struct amdgpu_device *adev);
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| 41 | void dm_dmub_hw_resume(struct amdgpu_device *adev);
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| 42 | enum dmub_ips_disable_type dm_get_default_ips_mode(struct amdgpu_device *adev);
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| 43 | int dm_dmub_sw_init(struct amdgpu_device *adev);
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| 44 | int dm_init_microcode(struct amdgpu_device *adev);
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| 45 |
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| 46 | #define FIRMWARE_RENOIR_DMUB "amdgpu/renoir_dmcub.bin"
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| 47 | #define FIRMWARE_SIENNA_CICHLID_DMUB "amdgpu/sienna_cichlid_dmcub.bin"
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| 48 | #define FIRMWARE_NAVY_FLOUNDER_DMUB "amdgpu/navy_flounder_dmcub.bin"
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| 49 | #define FIRMWARE_GREEN_SARDINE_DMUB "amdgpu/green_sardine_dmcub.bin"
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| 50 | #define FIRMWARE_VANGOGH_DMUB "amdgpu/vangogh_dmcub.bin"
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| 51 | #define FIRMWARE_DIMGREY_CAVEFISH_DMUB "amdgpu/dimgrey_cavefish_dmcub.bin"
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| 52 | #define FIRMWARE_BEIGE_GOBY_DMUB "amdgpu/beige_goby_dmcub.bin"
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| 53 | #define FIRMWARE_YELLOW_CARP_DMUB "amdgpu/yellow_carp_dmcub.bin"
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| 54 | #define FIRMWARE_DCN_314_DMUB "amdgpu/dcn_3_1_4_dmcub.bin"
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| 55 | #define FIRMWARE_DCN_315_DMUB "amdgpu/dcn_3_1_5_dmcub.bin"
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| 56 | #define FIRMWARE_DCN316_DMUB "amdgpu/dcn_3_1_6_dmcub.bin"
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| 57 | #define FIRMWARE_DCN_V3_2_0_DMCUB "amdgpu/dcn_3_2_0_dmcub.bin"
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| 58 | #define FIRMWARE_DCN_V3_2_1_DMCUB "amdgpu/dcn_3_2_1_dmcub.bin"
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| 59 | #define FIRMWARE_DCN_35_DMUB "amdgpu/dcn_3_5_dmcub.bin"
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| 60 | #define FIRMWARE_DCN_351_DMUB "amdgpu/dcn_3_5_1_dmcub.bin"
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| 61 | #define FIRMWARE_DCN_36_DMUB "amdgpu/dcn_3_6_dmcub.bin"
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| 62 | #define FIRMWARE_DCN_401_DMUB "amdgpu/dcn_4_0_1_dmcub.bin"
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| 63 | #define FIRMWARE_DCN_42_DMUB "amdgpu/dcn_4_2_dmcub.bin"
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| 64 | #define FIRMWARE_DCN_42B_DMUB "amdgpu/dcn_4_2_1_dmcub.bin"
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| 65 | #define FIRMWARE_DCN_60_DMUB "amdgpu/dcn_6_0_0_dmcub.bin"
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| 66 | #define FIRMWARE_RAVEN_DMCU "amdgpu/raven_dmcu.bin"
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| 67 | #define FIRMWARE_NAVI12_DMCU "amdgpu/navi12_dmcu.bin"
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| 68 |
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| 69 | #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST)
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| 70 | struct dc_context;
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| 71 | struct dmub_cmd_fused_request;
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| 72 |
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| 73 | void *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *adev);
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| 74 | void abort_fused_io(struct dc_context *ctx,
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| 75 | const struct dmub_cmd_fused_request *request);
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| 76 | #endif
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| 77 |
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| 78 | #endif
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