| 1 |
|
| 2 | |
| 3 | * Copyright 2026 Advanced Micro Devices, Inc.
|
| 4 | *
|
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a
|
| 6 | * copy of this software and associated documentation files (the "Software"),
|
| 7 | * to deal in the Software without restriction, including without limitation
|
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
| 9 | * and/or sell copies of the Software, and to permit persons to whom the
|
| 10 | * Software is furnished to do so, subject to the following conditions:
|
| 11 | *
|
| 12 | * The above copyright notice and this permission notice shall be included in
|
| 13 | * all copies or substantial portions of the Software.
|
| 14 | *
|
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
| 18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
| 19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
| 20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
| 21 | * OTHER DEALINGS IN THE SOFTWARE.
|
| 22 | *
|
| 23 | * Authors: AMD
|
| 24 | *
|
| 25 |
|
| 26 |
|
| 27 | #ifndef __AMDGPU_DM_FREESYNC_H__
|
| 28 | #define __AMDGPU_DM_FREESYNC_H__
|
| 29 |
|
| 30 | #include <linux/types.h>
|
| 31 |
|
| 32 | struct amdgpu_display_manager;
|
| 33 | struct dm_crtc_state;
|
| 34 | struct dm_connector_state;
|
| 35 | struct dc_stream_state;
|
| 36 | struct dc_plane_state;
|
| 37 | struct drm_crtc_state;
|
| 38 |
|
| 39 | bool amdgpu_dm_is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,
|
| 40 | struct dm_crtc_state *new_state);
|
| 41 |
|
| 42 | bool amdgpu_dm_is_timing_unchanged_for_freesync(struct drm_crtc_state *old_crtc_state,
|
| 43 | struct drm_crtc_state *new_crtc_state);
|
| 44 |
|
| 45 | void amdgpu_dm_set_freesync_fixed_config(struct dm_crtc_state *dm_new_crtc_state);
|
| 46 |
|
| 47 | void amdgpu_dm_reset_freesync_config_for_crtc(struct dm_crtc_state *new_crtc_state);
|
| 48 |
|
| 49 | void amdgpu_dm_get_freesync_config_for_crtc(struct dm_crtc_state *new_crtc_state,
|
| 50 | struct dm_connector_state *new_con_state);
|
| 51 |
|
| 52 | void amdgpu_dm_update_freesync_state_on_stream(struct amdgpu_display_manager *dm,
|
| 53 | struct dm_crtc_state *new_crtc_state,
|
| 54 | struct dc_stream_state *new_stream,
|
| 55 | struct dc_plane_state *surface,
|
| 56 | u32 flip_timestamp_in_us);
|
| 57 |
|
| 58 | void amdgpu_dm_update_stream_irq_parameters(struct amdgpu_display_manager *dm,
|
| 59 | struct dm_crtc_state *new_crtc_state);
|
| 60 |
|
| 61 | void amdgpu_dm_handle_vrr_transition(struct amdgpu_display_manager *dm,
|
| 62 | struct dm_crtc_state *old_state,
|
| 63 | struct dm_crtc_state *new_state);
|
| 64 |
|
| 65 | #endif
|