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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright 2019 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26
27#include "amdgpu_dm_hdcp.h"
28#include "amdgpu.h"
29#include "amdgpu_dm.h"
30#include "dc_fused_io.h"
31#include "dm_helpers.h"
32#include <drm/display/drm_hdcp_helper.h>
33#include "hdcp_psp.h"
34
35/*
36 * If the SRM version being loaded is less than or equal to the
37 * currently loaded SRM, psp will return 0xFFFF as the version
38 */
39#define PSP_SRM_VERSION_MAX 0xFFFF
40
41STATIC_IFN_KUNIT bool lp_write_i2c(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
42{
43 struct dc_link *link = handle;
44 struct i2c_payload i2c_payloads[] = {{true, address, size, (void *)data} };
45 struct i2c_command cmd = {i2c_payloads, 1, I2C_COMMAND_ENGINE_HW,
46 link->dc->caps.i2c_speed_in_khz};
47
48 return dm_helpers_submit_i2c(link->ctx, link, &cmd);
49}
50EXPORT_IF_KUNIT(lp_write_i2c);
51
52STATIC_IFN_KUNIT bool lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *data, uint32_t size)
53{
54 struct dc_link *link = handle;
55
56 struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset},
57 {false, address, size, data} };
58 struct i2c_command cmd = {i2c_payloads, 2, I2C_COMMAND_ENGINE_HW,
59 link->dc->caps.i2c_speed_in_khz};
60
61 return dm_helpers_submit_i2c(link->ctx, link, &cmd);
62}
63EXPORT_IF_KUNIT(lp_read_i2c);
64
65STATIC_IFN_KUNIT bool lp_write_dpcd(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
66{
67 struct dc_link *link = handle;
68
69 return dm_helpers_dp_write_dpcd(link->ctx, link, address, data, size);
70}
71EXPORT_IF_KUNIT(lp_write_dpcd);
72
73STATIC_IFN_KUNIT bool lp_read_dpcd(void *handle, uint32_t address, uint8_t *data, uint32_t size)
74{
75 struct dc_link *link = handle;
76
77 return dm_helpers_dp_read_dpcd(link->ctx, link, address, data, size);
78}
79EXPORT_IF_KUNIT(lp_read_dpcd);
80
81STATIC_IFN_KUNIT bool lp_atomic_write_poll_read_i2c(
82 void *handle,
83 const struct mod_hdcp_atomic_op_i2c *write,
84 const struct mod_hdcp_atomic_op_i2c *poll,
85 struct mod_hdcp_atomic_op_i2c *read,
86 uint32_t poll_timeout_us,
87 uint8_t poll_mask_msb
88)
89{
90 struct dc_link *link = handle;
91
92 return dm_atomic_write_poll_read_i2c(link, write, poll, read, poll_timeout_us, poll_mask_msb);
93}
94EXPORT_IF_KUNIT(lp_atomic_write_poll_read_i2c);
95
96STATIC_IFN_KUNIT bool lp_atomic_write_poll_read_aux(
97 void *handle,
98 const struct mod_hdcp_atomic_op_aux *write,
99 const struct mod_hdcp_atomic_op_aux *poll,
100 struct mod_hdcp_atomic_op_aux *read,
101 uint32_t poll_timeout_us,
102 uint8_t poll_mask_msb
103)
104{
105 struct dc_link *link = handle;
106
107 return dm_atomic_write_poll_read_aux(link, write, poll, read, poll_timeout_us, poll_mask_msb);
108}
109EXPORT_IF_KUNIT(lp_atomic_write_poll_read_aux);
110
111STATIC_IFN_KUNIT
112uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint32_t *srm_size)
113{
114 struct ta_hdcp_shared_memory *hdcp_cmd;
115
116 if (!psp->hdcp_context.context.initialized) {
117 DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
118 return NULL;
119 }
120
121 hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.context.mem_context.shared_buf;
122 memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
123
124 hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_GET_SRM;
125 psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
126
127 if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS)
128 return NULL;
129
130 *srm_version = hdcp_cmd->out_msg.hdcp_get_srm.srm_version;
131 *srm_size = hdcp_cmd->out_msg.hdcp_get_srm.srm_buf_size;
132
133 return hdcp_cmd->out_msg.hdcp_get_srm.srm_buf;
134}
135EXPORT_IF_KUNIT(psp_get_srm);
136
137STATIC_IFN_KUNIT
138int psp_set_srm(struct psp_context *psp,
139 u8 *srm, uint32_t srm_size, uint32_t *srm_version)
140{
141 struct ta_hdcp_shared_memory *hdcp_cmd;
142
143 if (!psp->hdcp_context.context.initialized) {
144 DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
145 return -EINVAL;
146 }
147
148 hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.context.mem_context.shared_buf;
149 memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
150
151 memcpy(hdcp_cmd->in_msg.hdcp_set_srm.srm_buf, srm, srm_size);
152 hdcp_cmd->in_msg.hdcp_set_srm.srm_buf_size = srm_size;
153 hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_SET_SRM;
154
155 psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
156
157 if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS ||
158 hdcp_cmd->out_msg.hdcp_set_srm.valid_signature != 1 ||
159 hdcp_cmd->out_msg.hdcp_set_srm.srm_version == PSP_SRM_VERSION_MAX)
160 return -EINVAL;
161
162 *srm_version = hdcp_cmd->out_msg.hdcp_set_srm.srm_version;
163 return 0;
164}
165EXPORT_IF_KUNIT(psp_set_srm);
166
167STATIC_IFN_KUNIT
168void process_output(struct hdcp_workqueue *hdcp_work)
169{
170 struct mod_hdcp_output output = hdcp_work->output;
171
172 if (output.callback_stop)
173 cancel_delayed_work(&hdcp_work->callback_dwork);
174
175 if (output.callback_needed)
176 schedule_delayed_work(&hdcp_work->callback_dwork,
177 msecs_to_jiffies(output.callback_delay));
178
179 if (output.watchdog_timer_stop)
180 cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
181
182 if (output.watchdog_timer_needed)
183 schedule_delayed_work(&hdcp_work->watchdog_timer_dwork,
184 msecs_to_jiffies(output.watchdog_timer_delay));
185
186 schedule_delayed_work(&hdcp_work->property_validate_dwork, msecs_to_jiffies(0));
187}
188EXPORT_IF_KUNIT(process_output);
189
190STATIC_IFN_KUNIT
191bool hdcp_get_content_protection_from_status(
192 unsigned int hdcp_content_type,
193 enum mod_hdcp_encryption_status encryption_status,
194 unsigned int *content_protection)
195{
196 if (encryption_status == MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
197 *content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED;
198 return true;
199 }
200
201 if (hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE0 &&
202 encryption_status <= MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON) {
203 *content_protection = DRM_MODE_CONTENT_PROTECTION_ENABLED;
204 return true;
205 }
206
207 if (hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE1 &&
208 encryption_status == MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON) {
209 *content_protection = DRM_MODE_CONTENT_PROTECTION_ENABLED;
210 return true;
211 }
212
213 return false;
214}
215EXPORT_IF_KUNIT(hdcp_get_content_protection_from_status);
216
217STATIC_IFN_KUNIT
218void hdcp_get_link_display_adjustments(
219 bool enable_encryption,
220 u8 content_type,
221 bool fused_io_supported,
222 bool hdcp_lc_force_fw_enable,
223 bool hdcp_lc_enable_sw_fallback,
224 struct mod_hdcp_link_adjustment *link_adjust,
225 struct mod_hdcp_display_adjustment *display_adjust)
226{
227 memset(link_adjust, 0, sizeof(*link_adjust));
228 memset(display_adjust, 0, sizeof(*display_adjust));
229
230 if (!enable_encryption) {
231 display_adjust->disable =
232 MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
233 return;
234 }
235
236 display_adjust->disable = MOD_HDCP_DISPLAY_NOT_DISABLE;
237 link_adjust->auth_delay = 2;
238 link_adjust->retry_limit = MAX_NUM_OF_ATTEMPTS;
239
240 if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
241 link_adjust->hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
242 } else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
243 link_adjust->hdcp1.disable = 1;
244 link_adjust->hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
245 }
246
247 link_adjust->hdcp2.use_fw_locality_check =
248 fused_io_supported || hdcp_lc_force_fw_enable;
249 link_adjust->hdcp2.use_sw_locality_fallback =
250 hdcp_lc_enable_sw_fallback;
251}
252EXPORT_IF_KUNIT(hdcp_get_link_display_adjustments);
253
254STATIC_IFN_KUNIT
255void link_lock(struct hdcp_workqueue *work, bool lock)
256{
257 int i = 0;
258
259 for (i = 0; i < work->max_link; i++) {
260 if (lock)
261 mutex_lock(&work[i].mutex);
262 else
263 mutex_unlock(&work[i].mutex);
264 }
265}
266EXPORT_IF_KUNIT(link_lock);
267
268STATIC_IFN_KUNIT
269void hdcp_update_display_encryption_control(struct hdcp_workqueue *hdcp_work,
270 struct hdcp_workqueue *hdcp_w,
271 unsigned int conn_index,
272 bool enable_encryption)
273{
274 if (enable_encryption) {
275 /* Explicitly set the saved SRM as sysfs call will be after we already enabled hdcp
276 * (s3 resume case)
277 */
278 if (hdcp_work->srm_size > 0)
279 psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm,
280 hdcp_work->srm_size,
281 &hdcp_work->srm_version);
282
283 schedule_delayed_work(&hdcp_w->property_validate_dwork,
284 msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
285 } else {
286 hdcp_w->encryption_status[conn_index] = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
287 cancel_delayed_work(&hdcp_w->property_validate_dwork);
288 }
289}
290EXPORT_IF_KUNIT(hdcp_update_display_encryption_control);
291
292void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
293 unsigned int link_index,
294 struct amdgpu_dm_connector *aconnector,
295 u8 content_type,
296 bool enable_encryption)
297{
298 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
299 struct mod_hdcp_link_adjustment link_adjust;
300 struct mod_hdcp_display_adjustment display_adjust;
301 unsigned int conn_index = aconnector->base.index;
302 const struct dc *dc = aconnector->dc_link->dc;
303
304 guard(mutex)(&hdcp_w->mutex);
305 drm_connector_get(&aconnector->base);
306 if (hdcp_w->aconnector[conn_index])
307 drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
308 hdcp_w->aconnector[conn_index] = aconnector;
309
310 hdcp_get_link_display_adjustments(enable_encryption, content_type,
311 dc->caps.fused_io_supported,
312 dc->debug.hdcp_lc_force_fw_enable,
313 dc->debug.hdcp_lc_enable_sw_fallback,
314 &link_adjust, &display_adjust);
315 hdcp_update_display_encryption_control(hdcp_work, hdcp_w, conn_index,
316 enable_encryption);
317
318 mod_hdcp_update_display(&hdcp_w->hdcp, conn_index, &link_adjust, &display_adjust, &hdcp_w->output);
319
320 process_output(hdcp_w);
321}
322EXPORT_IF_KUNIT(hdcp_update_display);
323
324STATIC_IFN_KUNIT
325void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
326 unsigned int link_index,
327 struct amdgpu_dm_connector *aconnector)
328{
329 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
330 struct drm_connector_state *conn_state = aconnector->base.state;
331 unsigned int conn_index = aconnector->base.index;
332
333 guard(mutex)(&hdcp_w->mutex);
334
335 /* the removal of display will invoke auth reset -> hdcp destroy and
336 * we'd expect the Content Protection (CP) property changed back to
337 * DESIRED if at the time ENABLED. CP property change should occur
338 * before the element removed from linked list.
339 */
340 if (conn_state && conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
341 conn_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED;
342
343 DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP 2 -> 1, type %u, DPMS %u\n",
344 aconnector->base.index, conn_state->hdcp_content_type,
345 aconnector->base.dpms);
346 }
347
348 mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
349 if (hdcp_w->aconnector[conn_index]) {
350 drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
351 hdcp_w->aconnector[conn_index] = NULL;
352 }
353 process_output(hdcp_w);
354}
355EXPORT_IF_KUNIT(hdcp_remove_display);
356
357void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
358{
359 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
360 unsigned int conn_index;
361
362 guard(mutex)(&hdcp_w->mutex);
363
364 mod_hdcp_reset_connection(&hdcp_w->hdcp, &hdcp_w->output);
365
366 cancel_delayed_work(&hdcp_w->property_validate_dwork);
367
368 for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_COUNT; conn_index++) {
369 hdcp_w->encryption_status[conn_index] =
370 MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
371 if (hdcp_w->aconnector[conn_index]) {
372 drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
373 hdcp_w->aconnector[conn_index] = NULL;
374 }
375 }
376
377 process_output(hdcp_w);
378}
379EXPORT_IF_KUNIT(hdcp_reset_display);
380
381void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
382{
383 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
384
385 schedule_work(&hdcp_w->cpirq_work);
386}
387EXPORT_IF_KUNIT(hdcp_handle_cpirq);
388
389STATIC_IFN_KUNIT
390void event_callback(struct work_struct *work)
391{
392 struct hdcp_workqueue *hdcp_work;
393
394 hdcp_work = container_of(to_delayed_work(work), struct hdcp_workqueue,
395 callback_dwork);
396
397 guard(mutex)(&hdcp_work->mutex);
398
399 cancel_delayed_work(&hdcp_work->callback_dwork);
400
401 mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CALLBACK,
402 &hdcp_work->output);
403
404 process_output(hdcp_work);
405}
406EXPORT_IF_KUNIT(event_callback);
407
408STATIC_IFN_KUNIT
409void event_property_update(struct work_struct *work)
410{
411 struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue,
412 property_update_work);
413 struct amdgpu_dm_connector *aconnector = NULL;
414 struct drm_device *dev;
415 unsigned int content_protection;
416 long ret;
417 unsigned int conn_index;
418 struct drm_connector *connector;
419 struct drm_connector_state *conn_state;
420
421 for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_COUNT; conn_index++) {
422 aconnector = hdcp_work->aconnector[conn_index];
423
424 if (!aconnector)
425 continue;
426
427 connector = &aconnector->base;
428
429 /* check if display connected */
430 if (connector->status != connector_status_connected)
431 continue;
432
433 conn_state = aconnector->base.state;
434
435 if (!conn_state)
436 continue;
437
438 dev = connector->dev;
439
440 if (!dev)
441 continue;
442
443 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
444 guard(mutex)(&hdcp_work->mutex);
445
446 if (conn_state->commit) {
447 ret = wait_for_completion_interruptible_timeout(&conn_state->commit->hw_done,
448 10 * HZ);
449 if (ret == 0) {
450 DRM_ERROR("HDCP state unknown! Setting it to DESIRED\n");
451 hdcp_work->encryption_status[conn_index] =
452 MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
453 }
454 }
455 if (hdcp_get_content_protection_from_status(conn_state->hdcp_content_type,
456 hdcp_work->encryption_status[conn_index],
457 &content_protection)) {
458 if (content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED)
459 DRM_DEBUG_DRIVER("[HDCP_DM] DRM_MODE_CONTENT_PROTECTION_ENABLED\n");
460 else
461 DRM_DEBUG_DRIVER("[HDCP_DM] DRM_MODE_CONTENT_PROTECTION_DESIRED\n");
462
463 drm_hdcp_update_content_protection(connector, content_protection);
464 }
465 drm_modeset_unlock(&dev->mode_config.connection_mutex);
466 }
467}
468EXPORT_IF_KUNIT(event_property_update);
469
470STATIC_IFN_KUNIT
471void event_property_validate(struct work_struct *work)
472{
473 struct hdcp_workqueue *hdcp_work =
474 container_of(to_delayed_work(work), struct hdcp_workqueue, property_validate_dwork);
475 struct mod_hdcp_display_query query;
476 struct amdgpu_dm_connector *aconnector;
477 unsigned int conn_index;
478
479 guard(mutex)(&hdcp_work->mutex);
480
481 for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_COUNT;
482 conn_index++) {
483 aconnector = hdcp_work->aconnector[conn_index];
484
485 if (!aconnector)
486 continue;
487
488 /* check if display connected */
489 if (aconnector->base.status != connector_status_connected)
490 continue;
491
492 if (!aconnector->base.state)
493 continue;
494
495 query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
496 mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index,
497 &query);
498
499 DRM_DEBUG_DRIVER("[HDCP_DM] disp %d, connector->CP %u, (query, work): (%d, %d)\n",
500 aconnector->base.index,
501 aconnector->base.state->content_protection,
502 query.encryption_status,
503 hdcp_work->encryption_status[conn_index]);
504
505 if (query.encryption_status !=
506 hdcp_work->encryption_status[conn_index]) {
507 DRM_DEBUG_DRIVER("[HDCP_DM] encryption_status change from %x to %x\n",
508 hdcp_work->encryption_status[conn_index],
509 query.encryption_status);
510
511 hdcp_work->encryption_status[conn_index] =
512 query.encryption_status;
513
514 DRM_DEBUG_DRIVER("[HDCP_DM] trigger property_update_work\n");
515
516 schedule_work(&hdcp_work->property_update_work);
517 }
518 }
519}
520EXPORT_IF_KUNIT(event_property_validate);
521
522STATIC_IFN_KUNIT
523void event_watchdog_timer(struct work_struct *work)
524{
525 struct hdcp_workqueue *hdcp_work;
526
527 hdcp_work = container_of(to_delayed_work(work),
528 struct hdcp_workqueue,
529 watchdog_timer_dwork);
530
531 guard(mutex)(&hdcp_work->mutex);
532
533 cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
534
535 mod_hdcp_process_event(&hdcp_work->hdcp,
536 MOD_HDCP_EVENT_WATCHDOG_TIMEOUT,
537 &hdcp_work->output);
538
539 process_output(hdcp_work);
540}
541EXPORT_IF_KUNIT(event_watchdog_timer);
542
543STATIC_IFN_KUNIT
544void event_cpirq(struct work_struct *work)
545{
546 struct hdcp_workqueue *hdcp_work;
547
548 hdcp_work = container_of(work, struct hdcp_workqueue, cpirq_work);
549
550 guard(mutex)(&hdcp_work->mutex);
551
552 mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CPIRQ, &hdcp_work->output);
553
554 process_output(hdcp_work);
555}
556EXPORT_IF_KUNIT(event_cpirq);
557
558void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *hdcp_work)
559{
560 int i = 0;
561
562 for (i = 0; i < hdcp_work->max_link; i++) {
563 cancel_delayed_work_sync(&hdcp_work[i].callback_dwork);
564 cancel_delayed_work_sync(&hdcp_work[i].watchdog_timer_dwork);
565 cancel_delayed_work_sync(&hdcp_work[i].property_validate_dwork);
566 }
567
568 sysfs_remove_bin_file(kobj, &hdcp_work[0].attr);
569 kfree(hdcp_work->srm);
570 kfree(hdcp_work->srm_temp);
571 kfree(hdcp_work);
572}
573EXPORT_IF_KUNIT(hdcp_destroy);
574
575STATIC_IFN_KUNIT
576bool enable_assr(void *handle, struct dc_link *link)
577{
578 struct hdcp_workqueue *hdcp_work = handle;
579 struct mod_hdcp hdcp = hdcp_work->hdcp;
580 struct psp_context *psp = hdcp.config.psp.handle;
581 struct ta_dtm_shared_memory *dtm_cmd;
582
583 if (!psp->dtm_context.context.initialized) {
584 drm_info(adev_to_drm(psp->adev),
585 "Failed to enable ASSR, DTM TA is not initialized.");
586 return false;
587 }
588
589 dtm_cmd = (struct ta_dtm_shared_memory *)psp->dtm_context.context.mem_context.shared_buf;
590
591 guard(mutex)(&psp->dtm_context.mutex);
592 memset(dtm_cmd, 0, sizeof(struct ta_dtm_shared_memory));
593
594 dtm_cmd->cmd_id = TA_DTM_COMMAND__TOPOLOGY_ASSR_ENABLE;
595 dtm_cmd->dtm_in_message.topology_assr_enable.display_topology_dig_be_index =
596 link->link_enc_hw_inst;
597 dtm_cmd->dtm_status = TA_DTM_STATUS__GENERIC_FAILURE;
598
599 psp_dtm_invoke(psp, dtm_cmd->cmd_id);
600
601 if (dtm_cmd->dtm_status != TA_DTM_STATUS__SUCCESS) {
602 drm_info(adev_to_drm(psp->adev),
603 "Failed to enable ASSR");
604 return false;
605 }
606
607 return true;
608}
609EXPORT_IF_KUNIT(enable_assr);
610
611STATIC_IFN_KUNIT
612void update_config(void *handle, struct cp_psp_stream_config *config)
613{
614 struct hdcp_workqueue *hdcp_work = handle;
615 struct amdgpu_dm_connector *aconnector;
616 const struct dc *dc;
617 int link_index;
618 unsigned int conn_index;
619 struct mod_hdcp_display *display;
620 struct mod_hdcp_link *link;
621 struct hdcp_workqueue *hdcp_w;
622 struct dc_sink *sink = NULL;
623 bool link_is_hdcp14 = false;
624
625 aconnector = config->dm_stream_ctx;
626 if (!aconnector || !aconnector->dc_link)
627 return;
628
629 link_index = aconnector->dc_link->link_index;
630 display = &hdcp_work[link_index].display;
631 link = &hdcp_work[link_index].link;
632 hdcp_w = &hdcp_work[link_index];
633
634 conn_index = aconnector->base.index;
635 dc = aconnector->dc_link->dc;
636
637 if (config->dpms_off) {
638 hdcp_remove_display(hdcp_work, link_index, aconnector);
639 return;
640 }
641
642 memset(display, 0, sizeof(*display));
643 memset(link, 0, sizeof(*link));
644
645 display->index = aconnector->base.index;
646 display->state = MOD_HDCP_DISPLAY_ACTIVE;
647
648 if (aconnector->dc_sink)
649 sink = aconnector->dc_sink;
650 else if (aconnector->dc_em_sink)
651 sink = aconnector->dc_em_sink;
652
653 if (sink)
654 link->mode = mod_hdcp_signal_type_to_operation_mode(sink->sink_signal);
655
656 display->controller = CONTROLLER_ID_D0 + config->otg_inst;
657 display->dig_fe = config->dig_fe;
658 link->dig_be = config->dig_be;
659 link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1;
660 display->stream_enc_idx = config->stream_enc_idx;
661 link->link_enc_idx = config->link_enc_idx;
662 link->dio_output_id = config->dio_output_idx;
663 link->phy_idx = config->phy_idx;
664
665 if (sink)
666 link_is_hdcp14 = dc_link_is_hdcp14(aconnector->dc_link, sink->sink_signal);
667 link->hdcp_supported_informational = link_is_hdcp14;
668 link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
669 link->dp.assr_enabled = config->assr_enabled;
670 link->dp.mst_enabled = config->mst_enabled;
671 link->dp.dp2_enabled = config->dp2_enabled;
672 link->dp.usb4_enabled = config->usb4_enabled;
673 if (sink && sink->sink_signal == SIGNAL_TYPE_HDMI_FRL)
674 link->hdmi.frl_enabled = config->frl_enabled;
675 display->adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
676 link->adjust.auth_delay = 2;
677 link->adjust.retry_limit = MAX_NUM_OF_ATTEMPTS;
678 link->adjust.hdcp1.disable = 0;
679 link->adjust.hdcp2.use_fw_locality_check = (dc->caps.fused_io_supported || dc->debug.hdcp_lc_force_fw_enable);
680 link->adjust.hdcp2.use_sw_locality_fallback = dc->debug.hdcp_lc_enable_sw_fallback;
681 hdcp_w->encryption_status[display->index] = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
682
683 DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP %d, type %d\n", aconnector->base.index,
684 (!!aconnector->base.state) ?
685 aconnector->base.state->content_protection : -1,
686 (!!aconnector->base.state) ?
687 aconnector->base.state->hdcp_content_type : -1);
688
689 guard(mutex)(&hdcp_w->mutex);
690
691 mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
692 drm_connector_get(&aconnector->base);
693 if (hdcp_w->aconnector[conn_index])
694 drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
695 hdcp_w->aconnector[conn_index] = aconnector;
696 process_output(hdcp_w);
697}
698EXPORT_IF_KUNIT(update_config);
699
700/**
701 * DOC: Add sysfs interface for set/get srm
702 *
703 * NOTE: From the usermodes prospective you only need to call write *ONCE*, the kernel
704 * will automatically call once or twice depending on the size
705 *
706 * call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no matter what the size is
707 *
708 * The kernel can only send PAGE_SIZE at once and since MAX_SRM_FILE(5120) > PAGE_SIZE(4096),
709 * srm_data_write can be called multiple times.
710 *
711 * sysfs interface doesn't tell us the size we will get so we are sending partial SRMs to psp and on
712 * the last call we will send the full SRM. PSP will fail on every call before the last.
713 *
714 * This means we don't know if the SRM is good until the last call. And because of this
715 * limitation we cannot throw errors early as it will stop the kernel from writing to sysfs
716 *
717 * Example 1:
718 * Good SRM size = 5096
719 * first call to write 4096 -> PSP fails
720 * Second call to write 1000 -> PSP Pass -> SRM is set
721 *
722 * Example 2:
723 * Bad SRM size = 4096
724 * first call to write 4096 -> PSP fails (This is the same as above, but we don't know if this
725 * is the last call)
726 *
727 * Solution?:
728 * 1: Parse the SRM? -> It is signed so we don't know the EOF
729 * 2: We can have another sysfs that passes the size before calling set. -> simpler solution
730 * below
731 *
732 * Easy Solution:
733 * Always call get after Set to verify if set was successful.
734 * +----------------------+
735 * | Why it works: |
736 * +----------------------+
737 * PSP will only update its srm if its older than the one we are trying to load.
738 * Always do set first than get.
739 * -if we try to "1. SET" a older version PSP will reject it and we can "2. GET" the newer
740 * version and save it
741 *
742 * -if we try to "1. SET" a newer version PSP will accept it and we can "2. GET" the
743 * same(newer) version back and save it
744 *
745 * -if we try to "1. SET" a newer version and PSP rejects it. That means the format is
746 * incorrect/corrupted and we should correct our SRM by getting it from PSP
747 */
748STATIC_IFN_KUNIT ssize_t srm_data_write(struct file *filp, struct kobject *kobj,
749 const struct bin_attribute *bin_attr, char *buffer,
750 loff_t pos, size_t count)
751{
752 struct hdcp_workqueue *work;
753 u32 srm_version = 0;
754
755 work = container_of(bin_attr, struct hdcp_workqueue, attr);
756 link_lock(work, true);
757
758 memcpy(work->srm_temp + pos, buffer, count);
759
760 if (!psp_set_srm(work->hdcp.config.psp.handle, work->srm_temp, pos + count, &srm_version)) {
761 DRM_DEBUG_DRIVER("HDCP SRM SET version 0x%X", srm_version);
762 memcpy(work->srm, work->srm_temp, pos + count);
763 work->srm_size = pos + count;
764 work->srm_version = srm_version;
765 }
766
767 link_lock(work, false);
768
769 return count;
770}
771EXPORT_IF_KUNIT(srm_data_write);
772
773STATIC_IFN_KUNIT ssize_t srm_data_read(struct file *filp, struct kobject *kobj,
774 const struct bin_attribute *bin_attr, char *buffer,
775 loff_t pos, size_t count)
776{
777 struct hdcp_workqueue *work;
778 u8 *srm = NULL;
779 u32 srm_version;
780 u32 srm_size;
781 size_t ret = count;
782
783 work = container_of(bin_attr, struct hdcp_workqueue, attr);
784
785 link_lock(work, true);
786
787 srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size);
788
789 if (!srm) {
790 ret = -EINVAL;
791 goto ret;
792 }
793
794 if (pos >= srm_size)
795 ret = 0;
796
797 if (srm_size - pos < count) {
798 memcpy(buffer, srm + pos, srm_size - pos);
799 ret = srm_size - pos;
800 goto ret;
801 }
802
803 memcpy(buffer, srm + pos, count);
804
805ret:
806 link_lock(work, false);
807 return ret;
808}
809EXPORT_IF_KUNIT(srm_data_read);
810
811/* From the hdcp spec (5.Renewability) SRM needs to be stored in a non-volatile memory.
812 *
813 * For example,
814 * if Application "A" sets the SRM (ver 2) and we reboot/suspend and later when Application "B"
815 * needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM should be persistent
816 * across boot/reboots/suspend/resume/shutdown
817 *
818 * Currently when the system goes down (suspend/shutdown) the SRM is cleared from PSP. For HDCP
819 * we need to make the SRM persistent.
820 *
821 * -PSP owns the checking of SRM but doesn't have the ability to store it in a non-volatile memory.
822 * -The kernel cannot write to the file systems.
823 * -So we need usermode to do this for us, which is why an interface for usermode is needed
824 *
825 *
826 *
827 * Usermode can read/write to/from PSP using the sysfs interface
828 * For example:
829 * to save SRM from PSP to storage : cat /sys/class/drm/card0/device/hdcp_srm > srmfile
830 * to load from storage to PSP: cat srmfile > /sys/class/drm/card0/device/hdcp_srm
831 */
832static const struct bin_attribute data_attr = {
833 .attr = {.name = "hdcp_srm", .mode = 0664},
834 .size = PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, /* Limit SRM size */
835 .write = srm_data_write,
836 .read = srm_data_read,
837};
838
839struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev,
840 struct cp_psp *cp_psp, struct dc *dc)
841{
842 int max_caps = dc->caps.max_links;
843 struct hdcp_workqueue *hdcp_work;
844 int i = 0;
845
846 hdcp_work = kzalloc_objs(*hdcp_work, max_caps);
847 if (ZERO_OR_NULL_PTR(hdcp_work))
848 return NULL;
849
850 hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE,
851 sizeof(*hdcp_work->srm), GFP_KERNEL);
852
853 if (!hdcp_work->srm)
854 goto fail_alloc_context;
855
856 hdcp_work->srm_temp = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE,
857 sizeof(*hdcp_work->srm_temp), GFP_KERNEL);
858
859 if (!hdcp_work->srm_temp)
860 goto fail_alloc_context;
861
862 hdcp_work->max_link = max_caps;
863
864 for (i = 0; i < max_caps; i++) {
865 mutex_init(&hdcp_work[i].mutex);
866
867 INIT_WORK(&hdcp_work[i].cpirq_work, event_cpirq);
868 INIT_WORK(&hdcp_work[i].property_update_work, event_property_update);
869 INIT_DELAYED_WORK(&hdcp_work[i].callback_dwork, event_callback);
870 INIT_DELAYED_WORK(&hdcp_work[i].watchdog_timer_dwork, event_watchdog_timer);
871 INIT_DELAYED_WORK(&hdcp_work[i].property_validate_dwork, event_property_validate);
872
873 struct mod_hdcp_config *config = &hdcp_work[i].hdcp.config;
874 struct mod_hdcp_ddc_funcs *ddc_funcs = &config->ddc.funcs;
875
876 config->psp.handle = &adev->psp;
877 if (dc->ctx->dce_version == DCN_VERSION_3_1 ||
878 dc->ctx->dce_version == DCN_VERSION_3_14 ||
879 dc->ctx->dce_version == DCN_VERSION_3_15 ||
880 dc->ctx->dce_version == DCN_VERSION_3_16 ||
881 dc->ctx->dce_version == DCN_VERSION_3_2 ||
882 dc->ctx->dce_version == DCN_VERSION_3_21 ||
883 dc->ctx->dce_version == DCN_VERSION_3_5 ||
884 dc->ctx->dce_version == DCN_VERSION_3_51 ||
885 dc->ctx->dce_version == DCN_VERSION_3_6 ||
886 dc->ctx->dce_version == DCN_VERSION_4_01)
887 config->psp.caps.dtm_v3_supported = 1;
888
889 config->ddc.handle = dc_get_link_at_index(dc, i);
890
891 ddc_funcs->write_i2c = lp_write_i2c;
892 ddc_funcs->read_i2c = lp_read_i2c;
893 ddc_funcs->write_dpcd = lp_write_dpcd;
894 ddc_funcs->read_dpcd = lp_read_dpcd;
895 ddc_funcs->atomic_write_poll_read_i2c = lp_atomic_write_poll_read_i2c;
896 ddc_funcs->atomic_write_poll_read_aux = lp_atomic_write_poll_read_aux;
897
898 memset(hdcp_work[i].aconnector, 0,
899 sizeof(struct amdgpu_dm_connector *) *
900 AMDGPU_DM_MAX_DISPLAY_COUNT);
901 memset(hdcp_work[i].encryption_status, 0,
902 sizeof(enum mod_hdcp_encryption_status) *
903 AMDGPU_DM_MAX_DISPLAY_COUNT);
904 }
905
906 cp_psp->funcs.update_stream_config = update_config;
907 cp_psp->funcs.enable_assr = enable_assr;
908 cp_psp->handle = hdcp_work;
909
910 /* File created at /sys/class/drm/card0/device/hdcp_srm*/
911 hdcp_work[0].attr = data_attr;
912 sysfs_bin_attr_init(&hdcp_work[0].attr);
913
914 if (sysfs_create_bin_file(&adev->dev->kobj, &hdcp_work[0].attr))
915 drm_warn(adev_to_drm(adev), "Failed to create device file hdcp_srm\n");
916
917 return hdcp_work;
918
919fail_alloc_context:
920 kfree(hdcp_work->srm);
921 kfree(hdcp_work->srm_temp);
922 kfree(hdcp_work);
923
924 return NULL;
925}
926EXPORT_IF_KUNIT(hdcp_create_workqueue);
927