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| 2 | |
| 3 | * Copyright 2026 Advanced Micro Devices, Inc.
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| 5 |
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| 6 | #ifndef __AMDGPU_DM_HELPERS_H__
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| 7 | #define __AMDGPU_DM_HELPERS_H__
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| 8 |
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| 9 | #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST)
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| 10 | #include <drm/drm_edid.h>
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| 11 |
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| 12 | struct amdgpu_dm_connector;
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| 13 | struct dc_link;
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| 14 | struct dc_context;
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| 15 | struct dc_stream_state;
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| 16 | struct dc_edid_caps;
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| 17 | struct dc_dp_mst_stream_allocation_table;
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| 18 | struct drm_dp_aux;
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| 19 | struct drm_dp_mst_atomic_payload;
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| 20 | struct drm_dp_mst_topology_mgr;
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| 21 | struct drm_dp_mst_topology_state;
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| 22 |
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| 23 |
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| 24 | u32 edid_extract_panel_id(struct edid *edid);
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| 25 | void apply_edid_quirks(struct dc_link *link, struct edid *edid,
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| 26 | struct dc_edid_caps *edid_caps);
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| 27 | uint8_t get_max_frl_rate(uint8_t max_lanes, uint8_t max_rate_per_lane);
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| 28 | uint8_t get_dsc_max_slices(uint8_t max_slices, int clk_per_slice);
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| 29 | bool dm_is_freesync_pcon_whitelist(const uint32_t branch_dev_id);
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| 30 | extern const uint32_t dm_freesync_pcon_whitelist[];
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| 31 | uint32_t dm_freesync_pcon_whitelist_count(void);
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| 32 | void fill_dc_mst_payload_table_from_drm(struct dc_link *link,
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| 33 | bool enable,
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| 34 | struct drm_dp_mst_atomic_payload *target_payload,
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| 35 | struct dc_dp_mst_stream_allocation_table *table);
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| 36 | void dm_helpers_construct_old_payload(struct drm_dp_mst_topology_mgr *mgr,
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| 37 | struct drm_dp_mst_topology_state *mst_state,
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| 38 | struct drm_dp_mst_atomic_payload *new_payload,
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| 39 | struct drm_dp_mst_atomic_payload *old_payload);
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| 40 | bool dm_helpers_dp_write_dsc_enable(struct dc_context *ctx,
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| 41 | const struct dc_stream_state *stream,
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| 42 | bool enable);
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| 43 | uint dm_helpers_get_dc_debug_mask(void);
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| 44 | void dm_helpers_set_dc_debug_mask(uint debug_mask);
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| 45 | int dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsigned int block, size_t len);
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| 46 | const struct drm_edid *dm_helpers_read_acpi_edid(struct amdgpu_dm_connector *aconnector);
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| 47 | const struct drm_edid *dm_helpers_read_vbios_hardcoded_edid(struct dc_link *link,
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| 48 | struct amdgpu_dm_connector *aconnector);
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| 49 | bool execute_synaptics_rc_command(struct drm_dp_aux *aux,
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| 50 | bool is_write_cmd,
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| 51 | unsigned char cmd,
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| 52 | unsigned int length,
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| 53 | unsigned int offset,
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| 54 | unsigned char *data);
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| 55 | void apply_synaptics_fifo_reset_wa(struct drm_dp_aux *aux);
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| 56 | uint8_t write_dsc_enable_synaptics_non_virtual_dpcd_mst(struct drm_dp_aux *aux,
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| 57 | const struct dc_stream_state *stream,
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| 58 | bool enable);
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| 59 | #endif
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| 60 |
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| 61 | #endif
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