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| 2 | * Copyright 2008 Advanced Micro Devices, Inc.
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| 3 | *
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 5 | * copy of this software and associated documentation files (the "Software"),
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| 6 | * to deal in the Software without restriction, including without limitation
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the
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| 9 | * Software is furnished to do so, subject to the following conditions:
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| 10 | *
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| 11 | * The above copyright notice and this permission notice shall be included in
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| 12 | * all copies or substantial portions of the Software.
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| 13 | *
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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| 20 | * OTHER DEALINGS IN THE SOFTWARE.
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| 21 | *
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| 22 | * Author: Stanislaw Skowronek
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| 23 |
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| 24 |
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| 25 | #ifndef ATOM_NAMES_H
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| 26 | #define ATOM_NAMES_H
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| 27 |
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| 28 | #include "atom.h"
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| 29 |
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| 30 | #ifdef ATOM_DEBUG
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| 31 |
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| 32 | #define ATOM_OP_NAMES_CNT 123
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| 33 | static char *atom_op_names[ATOM_OP_NAMES_CNT] = {
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| 34 | "RESERVED", "MOVE_REG", "MOVE_PS", "MOVE_WS", "MOVE_FB", "MOVE_PLL",
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| 35 | "MOVE_MC", "AND_REG", "AND_PS", "AND_WS", "AND_FB", "AND_PLL", "AND_MC",
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| 36 | "OR_REG", "OR_PS", "OR_WS", "OR_FB", "OR_PLL", "OR_MC", "SHIFT_LEFT_REG",
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| 37 | "SHIFT_LEFT_PS", "SHIFT_LEFT_WS", "SHIFT_LEFT_FB", "SHIFT_LEFT_PLL",
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| 38 | "SHIFT_LEFT_MC", "SHIFT_RIGHT_REG", "SHIFT_RIGHT_PS", "SHIFT_RIGHT_WS",
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| 39 | "SHIFT_RIGHT_FB", "SHIFT_RIGHT_PLL", "SHIFT_RIGHT_MC", "MUL_REG",
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| 40 | "MUL_PS", "MUL_WS", "MUL_FB", "MUL_PLL", "MUL_MC", "DIV_REG", "DIV_PS",
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| 41 | "DIV_WS", "DIV_FB", "DIV_PLL", "DIV_MC", "ADD_REG", "ADD_PS", "ADD_WS",
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| 42 | "ADD_FB", "ADD_PLL", "ADD_MC", "SUB_REG", "SUB_PS", "SUB_WS", "SUB_FB",
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| 43 | "SUB_PLL", "SUB_MC", "SET_ATI_PORT", "SET_PCI_PORT", "SET_SYS_IO_PORT",
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| 44 | "SET_REG_BLOCK", "SET_FB_BASE", "COMPARE_REG", "COMPARE_PS",
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| 45 | "COMPARE_WS", "COMPARE_FB", "COMPARE_PLL", "COMPARE_MC", "SWITCH",
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| 46 | "JUMP", "JUMP_EQUAL", "JUMP_BELOW", "JUMP_ABOVE", "JUMP_BELOW_OR_EQUAL",
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| 47 | "JUMP_ABOVE_OR_EQUAL", "JUMP_NOT_EQUAL", "TEST_REG", "TEST_PS", "TEST_WS",
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| 48 | "TEST_FB", "TEST_PLL", "TEST_MC", "DELAY_MILLISEC", "DELAY_MICROSEC",
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| 49 | "CALL_TABLE", "REPEAT", "CLEAR_REG", "CLEAR_PS", "CLEAR_WS", "CLEAR_FB",
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| 50 | "CLEAR_PLL", "CLEAR_MC", "NOP", "EOT", "MASK_REG", "MASK_PS", "MASK_WS",
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| 51 | "MASK_FB", "MASK_PLL", "MASK_MC", "POST_CARD", "BEEP", "SAVE_REG",
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| 52 | "RESTORE_REG", "SET_DATA_BLOCK", "XOR_REG", "XOR_PS", "XOR_WS", "XOR_FB",
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| 53 | "XOR_PLL", "XOR_MC", "SHL_REG", "SHL_PS", "SHL_WS", "SHL_FB", "SHL_PLL",
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| 54 | "SHL_MC", "SHR_REG", "SHR_PS", "SHR_WS", "SHR_FB", "SHR_PLL", "SHR_MC",
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| 55 | "DEBUG", "CTB_DS",
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| 56 | };
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| 57 |
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| 58 | #define ATOM_TABLE_NAMES_CNT 74
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| 59 | static char *atom_table_names[ATOM_TABLE_NAMES_CNT] = {
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| 60 | "ASIC_Init", "GetDisplaySurfaceSize", "ASIC_RegistersInit",
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| 61 | "VRAM_BlockVenderDetection", "SetClocksRatio", "MemoryControllerInit",
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| 62 | "GPIO_PinInit", "MemoryParamAdjust", "DVOEncoderControl",
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| 63 | "GPIOPinControl", "SetEngineClock", "SetMemoryClock", "SetPixelClock",
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| 64 | "DynamicClockGating", "ResetMemoryDLL", "ResetMemoryDevice",
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| 65 | "MemoryPLLInit", "EnableMemorySelfRefresh", "AdjustMemoryController",
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| 66 | "EnableASIC_StaticPwrMgt", "ASIC_StaticPwrMgtStatusChange",
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| 67 | "DAC_LoadDetection", "TMDS2EncoderControl", "LCD1OutputControl",
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| 68 | "DAC1EncoderControl", "DAC2EncoderControl", "DVOOutputControl",
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| 69 | "CV1OutputControl", "SetCRTC_DPM_State", "TVEncoderControl",
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| 70 | "TMDS1EncoderControl", "LVDSEncoderControl", "TV1OutputControl",
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| 71 | "EnableScaler", "BlankCRTC", "EnableCRTC", "GetPixelClock",
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| 72 | "EnableVGA_Render", "EnableVGA_Access", "SetCRTC_Timing",
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| 73 | "SetCRTC_OverScan", "SetCRTC_Replication", "SelectCRTC_Source",
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| 74 | "EnableGraphSurfaces", "UpdateCRTC_DoubleBufferRegisters",
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| 75 | "LUT_AutoFill", "EnableHW_IconCursor", "GetMemoryClock",
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| 76 | "GetEngineClock", "SetCRTC_UsingDTDTiming", "TVBootUpStdPinDetection",
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| 77 | "DFP2OutputControl", "VRAM_BlockDetectionByStrap", "MemoryCleanUp",
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| 78 | "ReadEDIDFromHWAssistedI2C", "WriteOneByteToHWAssistedI2C",
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| 79 | "ReadHWAssistedI2CStatus", "SpeedFanControl", "PowerConnectorDetection",
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| 80 | "MC_Synchronization", "ComputeMemoryEnginePLL", "MemoryRefreshConversion",
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| 81 | "VRAM_GetCurrentInfoBlock", "DynamicMemorySettings", "MemoryTraining",
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| 82 | "EnableLVDS_SS", "DFP1OutputControl", "SetVoltage", "CRT1OutputControl",
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| 83 | "CRT2OutputControl", "SetupHWAssistedI2CStatus", "ClockSource",
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| 84 | "MemoryDeviceInit", "EnableYUV",
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| 85 | };
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| 86 |
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| 87 | #define ATOM_IO_NAMES_CNT 5
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| 88 | static char *atom_io_names[ATOM_IO_NAMES_CNT] = {
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| 89 | "MM", "PLL", "MC", "PCIE", "PCIE PORT",
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| 90 | };
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| 91 |
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| 92 | #else
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| 93 |
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| 94 | #define ATOM_OP_NAMES_CNT 0
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| 95 | #define ATOM_TABLE_NAMES_CNT 0
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| 96 | #define ATOM_IO_NAMES_CNT 0
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| 97 |
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| 98 | #endif
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| 99 |
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| 100 | #endif
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