| 1 | |
| 2 | |
| 3 | *
|
| 4 | * Copyright (C) 2010 Nokia Corporation. All rights reserved.
|
| 5 | * Copyright (C) 2014 Sebastian Reichel <[email protected]>
|
| 6 | *
|
| 7 | * Contact: Carlos Chinea <[email protected]>
|
| 8 |
|
| 9 |
|
| 10 | #include <linux/compiler.h>
|
| 11 | #include <linux/err.h>
|
| 12 | #include <linux/ioport.h>
|
| 13 | #include <linux/io.h>
|
| 14 | #include <linux/clk.h>
|
| 15 | #include <linux/device.h>
|
| 16 | #include <linux/platform_device.h>
|
| 17 | #include <linux/dma-mapping.h>
|
| 18 | #include <linux/dmaengine.h>
|
| 19 | #include <linux/delay.h>
|
| 20 | #include <linux/hsi/ssi_protocol.h>
|
| 21 | #include <linux/seq_file.h>
|
| 22 | #include <linux/scatterlist.h>
|
| 23 | #include <linux/interrupt.h>
|
| 24 | #include <linux/spinlock.h>
|
| 25 | #include <linux/debugfs.h>
|
| 26 | #include <linux/pinctrl/consumer.h>
|
| 27 | #include <linux/pm_runtime.h>
|
| 28 | #include <linux/of.h>
|
| 29 | #include <linux/of_platform.h>
|
| 30 | #include <linux/hsi/hsi.h>
|
| 31 | #include <linux/idr.h>
|
| 32 |
|
| 33 | #include "omap_ssi_regs.h"
|
| 34 | #include "omap_ssi.h"
|
| 35 |
|
| 36 |
|
| 37 | static DEFINE_IDA(platform_omap_ssi_ida);
|
| 38 |
|
| 39 | #ifdef CONFIG_DEBUG_FS
|
| 40 | static int ssi_regs_show(struct seq_file *m, void *p __maybe_unused)
|
| 41 | {
|
| 42 | struct hsi_controller *ssi = m->private;
|
| 43 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 44 | void __iomem *sys = omap_ssi->sys;
|
| 45 |
|
| 46 | pm_runtime_get_sync(ssi->device.parent);
|
| 47 | seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG));
|
| 48 | seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG));
|
| 49 | seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG));
|
| 50 | pm_runtime_put(ssi->device.parent);
|
| 51 |
|
| 52 | return 0;
|
| 53 | }
|
| 54 |
|
| 55 | static int ssi_gdd_regs_show(struct seq_file *m, void *p __maybe_unused)
|
| 56 | {
|
| 57 | struct hsi_controller *ssi = m->private;
|
| 58 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 59 | void __iomem *gdd = omap_ssi->gdd;
|
| 60 | void __iomem *sys = omap_ssi->sys;
|
| 61 | int lch;
|
| 62 |
|
| 63 | pm_runtime_get_sync(ssi->device.parent);
|
| 64 |
|
| 65 | seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n",
|
| 66 | readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG));
|
| 67 | seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n",
|
| 68 | readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG));
|
| 69 | seq_printf(m, "HW_ID\t\t: 0x%08x\n",
|
| 70 | readl(gdd + SSI_GDD_HW_ID_REG));
|
| 71 | seq_printf(m, "PPORT_ID\t: 0x%08x\n",
|
| 72 | readl(gdd + SSI_GDD_PPORT_ID_REG));
|
| 73 | seq_printf(m, "MPORT_ID\t: 0x%08x\n",
|
| 74 | readl(gdd + SSI_GDD_MPORT_ID_REG));
|
| 75 | seq_printf(m, "TEST\t\t: 0x%08x\n",
|
| 76 | readl(gdd + SSI_GDD_TEST_REG));
|
| 77 | seq_printf(m, "GCR\t\t: 0x%08x\n",
|
| 78 | readl(gdd + SSI_GDD_GCR_REG));
|
| 79 |
|
| 80 | for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
|
| 81 | seq_printf(m, "\nGDD LCH %d\n=========\n", lch);
|
| 82 | seq_printf(m, "CSDP\t\t: 0x%04x\n",
|
| 83 | readw(gdd + SSI_GDD_CSDP_REG(lch)));
|
| 84 | seq_printf(m, "CCR\t\t: 0x%04x\n",
|
| 85 | readw(gdd + SSI_GDD_CCR_REG(lch)));
|
| 86 | seq_printf(m, "CICR\t\t: 0x%04x\n",
|
| 87 | readw(gdd + SSI_GDD_CICR_REG(lch)));
|
| 88 | seq_printf(m, "CSR\t\t: 0x%04x\n",
|
| 89 | readw(gdd + SSI_GDD_CSR_REG(lch)));
|
| 90 | seq_printf(m, "CSSA\t\t: 0x%08x\n",
|
| 91 | readl(gdd + SSI_GDD_CSSA_REG(lch)));
|
| 92 | seq_printf(m, "CDSA\t\t: 0x%08x\n",
|
| 93 | readl(gdd + SSI_GDD_CDSA_REG(lch)));
|
| 94 | seq_printf(m, "CEN\t\t: 0x%04x\n",
|
| 95 | readw(gdd + SSI_GDD_CEN_REG(lch)));
|
| 96 | seq_printf(m, "CSAC\t\t: 0x%04x\n",
|
| 97 | readw(gdd + SSI_GDD_CSAC_REG(lch)));
|
| 98 | seq_printf(m, "CDAC\t\t: 0x%04x\n",
|
| 99 | readw(gdd + SSI_GDD_CDAC_REG(lch)));
|
| 100 | seq_printf(m, "CLNK_CTRL\t: 0x%04x\n",
|
| 101 | readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch)));
|
| 102 | }
|
| 103 |
|
| 104 | pm_runtime_put(ssi->device.parent);
|
| 105 |
|
| 106 | return 0;
|
| 107 | }
|
| 108 |
|
| 109 | DEFINE_SHOW_ATTRIBUTE(ssi_regs);
|
| 110 | DEFINE_SHOW_ATTRIBUTE(ssi_gdd_regs);
|
| 111 |
|
| 112 | static int ssi_debug_add_ctrl(struct hsi_controller *ssi)
|
| 113 | {
|
| 114 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 115 | struct dentry *dir;
|
| 116 |
|
| 117 |
|
| 118 | omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL);
|
| 119 | debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi, &ssi_regs_fops);
|
| 120 |
|
| 121 |
|
| 122 | dir = debugfs_create_dir("gdd", omap_ssi->dir);
|
| 123 | debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops);
|
| 124 |
|
| 125 | return 0;
|
| 126 | }
|
| 127 |
|
| 128 | static void ssi_debug_remove_ctrl(struct hsi_controller *ssi)
|
| 129 | {
|
| 130 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 131 |
|
| 132 | debugfs_remove_recursive(omap_ssi->dir);
|
| 133 | }
|
| 134 | #endif
|
| 135 |
|
| 136 | |
| 137 | * FIXME: Horrible HACK needed until we remove the useless wakeline test
|
| 138 | * in the CMT. To be removed !!!!
|
| 139 |
|
| 140 | void ssi_waketest(struct hsi_client *cl, unsigned int enable)
|
| 141 | {
|
| 142 | struct hsi_port *port = hsi_get_port(cl);
|
| 143 | struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
|
| 144 | struct hsi_controller *ssi = to_hsi_controller(port->device.parent);
|
| 145 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 146 |
|
| 147 | omap_port->wktest = !!enable;
|
| 148 | if (omap_port->wktest) {
|
| 149 | pm_runtime_get_sync(ssi->device.parent);
|
| 150 | writel_relaxed(SSI_WAKE(0),
|
| 151 | omap_ssi->sys + SSI_SET_WAKE_REG(port->num));
|
| 152 | } else {
|
| 153 | writel_relaxed(SSI_WAKE(0),
|
| 154 | omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num));
|
| 155 | pm_runtime_put(ssi->device.parent);
|
| 156 | }
|
| 157 | }
|
| 158 | EXPORT_SYMBOL_GPL(ssi_waketest);
|
| 159 |
|
| 160 | static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch)
|
| 161 | {
|
| 162 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 163 | struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg;
|
| 164 | struct hsi_port *port = to_hsi_port(msg->cl->device.parent);
|
| 165 | struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
|
| 166 | unsigned int dir;
|
| 167 | u32 csr;
|
| 168 | u32 val;
|
| 169 |
|
| 170 | spin_lock(&omap_ssi->lock);
|
| 171 |
|
| 172 | val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
|
| 173 | val &= ~SSI_GDD_LCH(lch);
|
| 174 | writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
|
| 175 |
|
| 176 | if (msg->ttype == HSI_MSG_READ) {
|
| 177 | dir = DMA_FROM_DEVICE;
|
| 178 | val = SSI_DATAAVAILABLE(msg->channel);
|
| 179 | pm_runtime_put(omap_port->pdev);
|
| 180 | } else {
|
| 181 | dir = DMA_TO_DEVICE;
|
| 182 | val = SSI_DATAACCEPT(msg->channel);
|
| 183 |
|
| 184 | }
|
| 185 | dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir);
|
| 186 | csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch));
|
| 187 | omap_ssi->gdd_trn[lch].msg = NULL;
|
| 188 | dev_dbg(&port->device, "DMA completed ch %d ttype %d\n",
|
| 189 | msg->channel, msg->ttype);
|
| 190 | spin_unlock(&omap_ssi->lock);
|
| 191 | if (csr & SSI_CSR_TOUR) {
|
| 192 | msg->status = HSI_STATUS_ERROR;
|
| 193 | msg->actual_len = 0;
|
| 194 | spin_lock(&omap_port->lock);
|
| 195 | list_del(&msg->link);
|
| 196 | spin_unlock(&omap_port->lock);
|
| 197 |
|
| 198 | list_add_tail(&msg->link, &omap_port->errqueue);
|
| 199 | schedule_delayed_work(&omap_port->errqueue_work, 0);
|
| 200 | return;
|
| 201 | }
|
| 202 | spin_lock(&omap_port->lock);
|
| 203 | val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
|
| 204 | writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
|
| 205 | spin_unlock(&omap_port->lock);
|
| 206 |
|
| 207 | msg->status = HSI_STATUS_COMPLETED;
|
| 208 | msg->actual_len = sg_dma_len(msg->sgt.sgl);
|
| 209 | }
|
| 210 |
|
| 211 | static void ssi_gdd_tasklet(unsigned long dev)
|
| 212 | {
|
| 213 | struct hsi_controller *ssi = (struct hsi_controller *)dev;
|
| 214 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 215 | void __iomem *sys = omap_ssi->sys;
|
| 216 | unsigned int lch;
|
| 217 | u32 status_reg;
|
| 218 |
|
| 219 | pm_runtime_get(ssi->device.parent);
|
| 220 |
|
| 221 | if (!pm_runtime_active(ssi->device.parent)) {
|
| 222 | dev_warn(ssi->device.parent, "ssi_gdd_tasklet called without runtime PM!\n");
|
| 223 | pm_runtime_put(ssi->device.parent);
|
| 224 | return;
|
| 225 | }
|
| 226 |
|
| 227 | status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
|
| 228 | for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
|
| 229 | if (status_reg & SSI_GDD_LCH(lch))
|
| 230 | ssi_gdd_complete(ssi, lch);
|
| 231 | }
|
| 232 | writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG);
|
| 233 | status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
|
| 234 |
|
| 235 | pm_runtime_put(ssi->device.parent);
|
| 236 |
|
| 237 | if (status_reg)
|
| 238 | tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
|
| 239 | else
|
| 240 | enable_irq(omap_ssi->gdd_irq);
|
| 241 |
|
| 242 | }
|
| 243 |
|
| 244 | static irqreturn_t ssi_gdd_isr(int irq, void *ssi)
|
| 245 | {
|
| 246 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 247 |
|
| 248 | tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
|
| 249 | disable_irq_nosync(irq);
|
| 250 |
|
| 251 | return IRQ_HANDLED;
|
| 252 | }
|
| 253 |
|
| 254 | static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi)
|
| 255 | {
|
| 256 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 257 | unsigned long rate = clk_get_rate(omap_ssi->fck);
|
| 258 | return rate;
|
| 259 | }
|
| 260 |
|
| 261 | static int ssi_clk_event(struct notifier_block *nb, unsigned long event,
|
| 262 | void *data)
|
| 263 | {
|
| 264 | struct omap_ssi_controller *omap_ssi = container_of(nb,
|
| 265 | struct omap_ssi_controller, fck_nb);
|
| 266 | struct hsi_controller *ssi = to_hsi_controller(omap_ssi->dev);
|
| 267 | struct clk_notifier_data *clk_data = data;
|
| 268 | struct omap_ssi_port *omap_port;
|
| 269 | int i;
|
| 270 |
|
| 271 | switch (event) {
|
| 272 | case PRE_RATE_CHANGE:
|
| 273 | dev_dbg(&ssi->device, "pre rate change\n");
|
| 274 |
|
| 275 | for (i = 0; i < ssi->num_ports; i++) {
|
| 276 | omap_port = omap_ssi->port[i];
|
| 277 |
|
| 278 | if (!omap_port)
|
| 279 | continue;
|
| 280 |
|
| 281 |
|
| 282 | disable_irq(omap_port->wake_irq);
|
| 283 |
|
| 284 |
|
| 285 | pinctrl_pm_select_idle_state(omap_port->pdev);
|
| 286 | udelay(1);
|
| 287 | }
|
| 288 |
|
| 289 | break;
|
| 290 | case ABORT_RATE_CHANGE:
|
| 291 | dev_dbg(&ssi->device, "abort rate change\n");
|
| 292 | fallthrough;
|
| 293 | case POST_RATE_CHANGE:
|
| 294 | dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n",
|
| 295 | clk_data->old_rate, clk_data->new_rate);
|
| 296 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(clk_data->new_rate, 1000);
|
| 297 |
|
| 298 | for (i = 0; i < ssi->num_ports; i++) {
|
| 299 | omap_port = omap_ssi->port[i];
|
| 300 |
|
| 301 | if (!omap_port)
|
| 302 | continue;
|
| 303 |
|
| 304 | omap_ssi_port_update_fclk(ssi, omap_port);
|
| 305 |
|
| 306 |
|
| 307 | pinctrl_pm_select_default_state(omap_port->pdev);
|
| 308 | enable_irq(omap_port->wake_irq);
|
| 309 | }
|
| 310 |
|
| 311 | break;
|
| 312 | default:
|
| 313 | break;
|
| 314 | }
|
| 315 |
|
| 316 | return NOTIFY_DONE;
|
| 317 | }
|
| 318 |
|
| 319 | static int ssi_get_iomem(struct platform_device *pd,
|
| 320 | const char *name, void __iomem **pbase, dma_addr_t *phy)
|
| 321 | {
|
| 322 | struct resource *mem;
|
| 323 | void __iomem *base;
|
| 324 | struct hsi_controller *ssi = platform_get_drvdata(pd);
|
| 325 |
|
| 326 | mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name);
|
| 327 | base = devm_ioremap_resource(&ssi->device, mem);
|
| 328 | if (IS_ERR(base))
|
| 329 | return PTR_ERR(base);
|
| 330 |
|
| 331 | *pbase = base;
|
| 332 |
|
| 333 | if (phy)
|
| 334 | *phy = mem->start;
|
| 335 |
|
| 336 | return 0;
|
| 337 | }
|
| 338 |
|
| 339 | static int ssi_add_controller(struct hsi_controller *ssi,
|
| 340 | struct platform_device *pd)
|
| 341 | {
|
| 342 | struct omap_ssi_controller *omap_ssi;
|
| 343 | int err;
|
| 344 |
|
| 345 | omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL);
|
| 346 | if (!omap_ssi)
|
| 347 | return -ENOMEM;
|
| 348 |
|
| 349 | err = ida_alloc(&platform_omap_ssi_ida, GFP_KERNEL);
|
| 350 | if (err < 0)
|
| 351 | return err;
|
| 352 | ssi->id = err;
|
| 353 |
|
| 354 | ssi->owner = THIS_MODULE;
|
| 355 | ssi->device.parent = &pd->dev;
|
| 356 | dev_set_name(&ssi->device, "ssi%d", ssi->id);
|
| 357 | hsi_controller_set_drvdata(ssi, omap_ssi);
|
| 358 | omap_ssi->dev = &ssi->device;
|
| 359 | err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL);
|
| 360 | if (err < 0)
|
| 361 | goto out_err;
|
| 362 | err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL);
|
| 363 | if (err < 0)
|
| 364 | goto out_err;
|
| 365 | err = platform_get_irq_byname(pd, "gdd_mpu");
|
| 366 | if (err < 0)
|
| 367 | goto out_err;
|
| 368 | omap_ssi->gdd_irq = err;
|
| 369 | tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet,
|
| 370 | (unsigned long)ssi);
|
| 371 | err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr,
|
| 372 | 0, "gdd_mpu", ssi);
|
| 373 | if (err < 0)
|
| 374 | goto out_err;
|
| 375 |
|
| 376 | omap_ssi->port = devm_kcalloc(&ssi->device, ssi->num_ports,
|
| 377 | sizeof(*omap_ssi->port), GFP_KERNEL);
|
| 378 | if (!omap_ssi->port) {
|
| 379 | err = -ENOMEM;
|
| 380 | goto out_err;
|
| 381 | }
|
| 382 |
|
| 383 | omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck");
|
| 384 | if (IS_ERR(omap_ssi->fck)) {
|
| 385 | dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n",
|
| 386 | PTR_ERR(omap_ssi->fck));
|
| 387 | err = -ENODEV;
|
| 388 | goto out_err;
|
| 389 | }
|
| 390 |
|
| 391 | omap_ssi->fck_nb.notifier_call = ssi_clk_event;
|
| 392 | omap_ssi->fck_nb.priority = INT_MAX;
|
| 393 | clk_notifier_register(omap_ssi->fck, &omap_ssi->fck_nb);
|
| 394 |
|
| 395 |
|
| 396 | omap_ssi->get_loss = NULL;
|
| 397 |
|
| 398 | omap_ssi->max_speed = UINT_MAX;
|
| 399 | spin_lock_init(&omap_ssi->lock);
|
| 400 | err = hsi_register_controller(ssi);
|
| 401 |
|
| 402 | if (err < 0)
|
| 403 | goto out_err;
|
| 404 |
|
| 405 | return 0;
|
| 406 |
|
| 407 | out_err:
|
| 408 | ida_free(&platform_omap_ssi_ida, ssi->id);
|
| 409 | return err;
|
| 410 | }
|
| 411 |
|
| 412 | static int ssi_hw_init(struct hsi_controller *ssi)
|
| 413 | {
|
| 414 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 415 | int err;
|
| 416 |
|
| 417 | err = pm_runtime_resume_and_get(ssi->device.parent);
|
| 418 | if (err < 0) {
|
| 419 | dev_err(&ssi->device, "runtime PM failed %d\n", err);
|
| 420 | return err;
|
| 421 | }
|
| 422 |
|
| 423 | writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
|
| 424 |
|
| 425 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
|
| 426 | dev_dbg(&ssi->device, "SSI fck rate %lu kHz\n", omap_ssi->fck_rate);
|
| 427 |
|
| 428 | writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
|
| 429 | omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
|
| 430 | pm_runtime_put_sync(ssi->device.parent);
|
| 431 |
|
| 432 | return 0;
|
| 433 | }
|
| 434 |
|
| 435 | static void ssi_remove_controller(struct hsi_controller *ssi)
|
| 436 | {
|
| 437 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 438 | int id = ssi->id;
|
| 439 | tasklet_kill(&omap_ssi->gdd_tasklet);
|
| 440 | hsi_unregister_controller(ssi);
|
| 441 | clk_notifier_unregister(omap_ssi->fck, &omap_ssi->fck_nb);
|
| 442 | ida_free(&platform_omap_ssi_ida, id);
|
| 443 | }
|
| 444 |
|
| 445 | static inline int ssi_of_get_available_ports_count(const struct device_node *np)
|
| 446 | {
|
| 447 | struct device_node *child;
|
| 448 | int num = 0;
|
| 449 |
|
| 450 | for_each_available_child_of_node(np, child)
|
| 451 | if (of_device_is_compatible(child, "ti,omap3-ssi-port"))
|
| 452 | num++;
|
| 453 |
|
| 454 | return num;
|
| 455 | }
|
| 456 |
|
| 457 | static int ssi_remove_ports(struct device *dev, void *c)
|
| 458 | {
|
| 459 | struct platform_device *pdev = to_platform_device(dev);
|
| 460 |
|
| 461 | if (!dev->of_node)
|
| 462 | return 0;
|
| 463 |
|
| 464 | of_node_clear_flag(dev->of_node, OF_POPULATED);
|
| 465 | of_device_unregister(pdev);
|
| 466 |
|
| 467 | return 0;
|
| 468 | }
|
| 469 |
|
| 470 | static int ssi_probe(struct platform_device *pd)
|
| 471 | {
|
| 472 | struct platform_device *childpdev;
|
| 473 | struct device_node *np = pd->dev.of_node;
|
| 474 | struct device_node *child;
|
| 475 | struct hsi_controller *ssi;
|
| 476 | int err;
|
| 477 | int num_ports;
|
| 478 |
|
| 479 | if (!np) {
|
| 480 | dev_err(&pd->dev, "missing device tree data\n");
|
| 481 | return -EINVAL;
|
| 482 | }
|
| 483 |
|
| 484 | num_ports = ssi_of_get_available_ports_count(np);
|
| 485 |
|
| 486 | ssi = hsi_alloc_controller(num_ports, GFP_KERNEL);
|
| 487 | if (!ssi) {
|
| 488 | dev_err(&pd->dev, "No memory for controller\n");
|
| 489 | return -ENOMEM;
|
| 490 | }
|
| 491 |
|
| 492 | platform_set_drvdata(pd, ssi);
|
| 493 |
|
| 494 | err = ssi_add_controller(ssi, pd);
|
| 495 | if (err < 0) {
|
| 496 | hsi_put_controller(ssi);
|
| 497 | goto out1;
|
| 498 | }
|
| 499 |
|
| 500 | pm_runtime_enable(&pd->dev);
|
| 501 |
|
| 502 | ssi->device.dma_mask = &ssi->device.coherent_dma_mask;
|
| 503 |
|
| 504 | err = dma_set_mask_and_coherent(&ssi->device, DMA_BIT_MASK(32));
|
| 505 | if (err)
|
| 506 | goto out2;
|
| 507 |
|
| 508 | err = ssi_hw_init(ssi);
|
| 509 | if (err < 0)
|
| 510 | goto out2;
|
| 511 | #ifdef CONFIG_DEBUG_FS
|
| 512 | err = ssi_debug_add_ctrl(ssi);
|
| 513 | if (err < 0)
|
| 514 | goto out2;
|
| 515 | #endif
|
| 516 |
|
| 517 | for_each_available_child_of_node(np, child) {
|
| 518 | if (!of_device_is_compatible(child, "ti,omap3-ssi-port"))
|
| 519 | continue;
|
| 520 |
|
| 521 | childpdev = of_platform_device_create(child, NULL, &pd->dev);
|
| 522 | if (!childpdev) {
|
| 523 | err = -ENODEV;
|
| 524 | dev_err(&pd->dev, "failed to create ssi controller port\n");
|
| 525 | of_node_put(child);
|
| 526 | goto out3;
|
| 527 | }
|
| 528 | }
|
| 529 |
|
| 530 | dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n",
|
| 531 | ssi->id, num_ports);
|
| 532 | return err;
|
| 533 | out3:
|
| 534 | device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
|
| 535 | #ifdef CONFIG_DEBUG_FS
|
| 536 | ssi_debug_remove_ctrl(ssi);
|
| 537 | #endif
|
| 538 | out2:
|
| 539 | ssi_remove_controller(ssi);
|
| 540 | pm_runtime_disable(&pd->dev);
|
| 541 | out1:
|
| 542 | platform_set_drvdata(pd, NULL);
|
| 543 |
|
| 544 | return err;
|
| 545 | }
|
| 546 |
|
| 547 | static void ssi_remove(struct platform_device *pd)
|
| 548 | {
|
| 549 | struct hsi_controller *ssi = platform_get_drvdata(pd);
|
| 550 |
|
| 551 |
|
| 552 | device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
|
| 553 |
|
| 554 | #ifdef CONFIG_DEBUG_FS
|
| 555 | ssi_debug_remove_ctrl(ssi);
|
| 556 | #endif
|
| 557 | ssi_remove_controller(ssi);
|
| 558 | platform_set_drvdata(pd, NULL);
|
| 559 |
|
| 560 | pm_runtime_disable(&pd->dev);
|
| 561 | }
|
| 562 |
|
| 563 | #ifdef CONFIG_PM
|
| 564 | static int omap_ssi_runtime_suspend(struct device *dev)
|
| 565 | {
|
| 566 | struct hsi_controller *ssi = dev_get_drvdata(dev);
|
| 567 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 568 |
|
| 569 | dev_dbg(dev, "runtime suspend!\n");
|
| 570 |
|
| 571 | if (omap_ssi->get_loss)
|
| 572 | omap_ssi->loss_count =
|
| 573 | omap_ssi->get_loss(ssi->device.parent);
|
| 574 |
|
| 575 | return 0;
|
| 576 | }
|
| 577 |
|
| 578 | static int omap_ssi_runtime_resume(struct device *dev)
|
| 579 | {
|
| 580 | struct hsi_controller *ssi = dev_get_drvdata(dev);
|
| 581 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
|
| 582 |
|
| 583 | dev_dbg(dev, "runtime resume!\n");
|
| 584 |
|
| 585 | if ((omap_ssi->get_loss) && (omap_ssi->loss_count ==
|
| 586 | omap_ssi->get_loss(ssi->device.parent)))
|
| 587 | return 0;
|
| 588 |
|
| 589 | writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG);
|
| 590 |
|
| 591 | return 0;
|
| 592 | }
|
| 593 |
|
| 594 | static const struct dev_pm_ops omap_ssi_pm_ops = {
|
| 595 | SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume,
|
| 596 | NULL)
|
| 597 | };
|
| 598 |
|
| 599 | #define DEV_PM_OPS (&omap_ssi_pm_ops)
|
| 600 | #else
|
| 601 | #define DEV_PM_OPS NULL
|
| 602 | #endif
|
| 603 |
|
| 604 | #ifdef CONFIG_OF
|
| 605 | static const struct of_device_id omap_ssi_of_match[] = {
|
| 606 | { .compatible = "ti,omap3-ssi", },
|
| 607 | {},
|
| 608 | };
|
| 609 | MODULE_DEVICE_TABLE(of, omap_ssi_of_match);
|
| 610 | #else
|
| 611 | #define omap_ssi_of_match NULL
|
| 612 | #endif
|
| 613 |
|
| 614 | static struct platform_driver ssi_pdriver = {
|
| 615 | .probe = ssi_probe,
|
| 616 | .remove = ssi_remove,
|
| 617 | .driver = {
|
| 618 | .name = "omap_ssi",
|
| 619 | .pm = DEV_PM_OPS,
|
| 620 | .of_match_table = omap_ssi_of_match,
|
| 621 | },
|
| 622 | };
|
| 623 |
|
| 624 | static int __init ssi_init(void) {
|
| 625 | int ret;
|
| 626 |
|
| 627 | ret = platform_driver_register(&ssi_pdriver);
|
| 628 | if (ret)
|
| 629 | return ret;
|
| 630 |
|
| 631 | ret = platform_driver_register(&ssi_port_pdriver);
|
| 632 | if (ret) {
|
| 633 | platform_driver_unregister(&ssi_pdriver);
|
| 634 | return ret;
|
| 635 | }
|
| 636 |
|
| 637 | return 0;
|
| 638 | }
|
| 639 | module_init(ssi_init);
|
| 640 |
|
| 641 | static void __exit ssi_exit(void) {
|
| 642 | platform_driver_unregister(&ssi_port_pdriver);
|
| 643 | platform_driver_unregister(&ssi_pdriver);
|
| 644 | }
|
| 645 | module_exit(ssi_exit);
|
| 646 |
|
| 647 | MODULE_ALIAS("platform:omap_ssi");
|
| 648 | MODULE_AUTHOR("Carlos Chinea <[email protected]>");
|
| 649 | MODULE_AUTHOR("Sebastian Reichel <[email protected]>");
|
| 650 | MODULE_DESCRIPTION("Synchronous Serial Interface Driver");
|
| 651 | MODULE_LICENSE("GPL v2");
|